公开(公告)号：US5464784A

公开(公告)日：1995-11-07

申请号：US129689

申请日：1993-09-30

Applicant: Giuseppe Crisenza ,  Cesare Clementi

Inventor： Giuseppe Crisenza ,  Cesare Clementi

IPC: H01L21/8234 ,  H01L21/8238 ,  H01L21/8247 ,  H01L27/088 ,  H01L27/092 ,  H01L27/10 ,  H01L27/105 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/266

CPC classification number: H01L27/11526 ,  H01L21/823842 ,  H01L27/0922 ,  H01L27/11546 ,  H01L27/105

Abstract: A method comprising the steps of depositing a first and second polysilicon layer, separated by an oxide layer; selectively etching the second polysilicon layer to form first gate regions; forming first substrate regions in the substrate and laterally in relation to the first gate regions; selectively etching the first polysilicon layer to form second gate regions of a length greater than the first gate regions; and forming in the substrate, laterally in relation to the second gate regions and partially overlapping the first substrate regions, second substrate regions of a higher doping level than the first substrate regions.

Abstract translation: 一种方法，包括沉积由氧化物层分离的第一和第二多晶硅层的步骤; 选择性地蚀刻第二多晶硅层以形成第一栅极区; 在所述衬底中形成第一衬底区域并相对于所述第一栅极区域侧向地形成; 选择性地蚀刻第一多晶硅层以形成长度大于第一栅极区域的第二栅极区域; 以及在所述衬底中相对于所述第二栅极区域横向地形成并且部分地与所述第一衬底区域重叠的第二衬底区域具有比所述第一衬底区域更高的掺杂水平。

公开(公告)号：USRE35041E

公开(公告)日：1995-09-26

申请号：US990630

申请日：1992-12-14

Applicant: Domenico Rossi ,  Claudio Diazzi

Inventor： Domenico Rossi ,  Claudio Diazzi

IPC: H02M3/07 ,  H02M3/155 ,  H02M3/156 ,  H02M7/538 ,  H03K17/06 ,  H03K17/082 ,  H03K17/60 ,  H03K3/01 ,  H03L5/00

CPC classification number: H03K17/0826 ,  H02M3/156 ,  H02M7/538 ,  H03K17/063

Abstract: The circuit comprises a tank capacitance and a charge circuit supplied with the same voltage as the bridge and comprising an inductance and a control transistor. There is also provided a control circuit, which comprises an oscillator controlling the periodic switching of control transistor and a comparator which controls the momentary clamping of control transistor in the condition wherein the charge circuit is interrupted when the difference between the voltage across capacitance and the power supply voltage exceeds a present maximum value and the unclamping of the same transistor when such difference falls below a preset minimum value. A further comparator similarly clamps control transistor if there is an excess current in the transistor itself.

Abstract translation: 该电路包括一个槽电容和一个充电电路，该电荷被提供与电桥相同的电压，并包括一个电感和一个控制晶体管。 还提供了一种控制电路，其包括控制控制晶体管的周期性切换的振荡器和控制晶体管的瞬时钳位的比较器，其中当电容和功率之间的电压差异时，充电电路被中断 电源电压超过当前的最大值，并且当这种差异下降到预设的最小值以下时，同一晶体管的松开。 如果在晶体管本身中存在过量的电流，则另外的比较器也类似地钳位控制晶体管。

公开(公告)号：US5440612A

公开(公告)日：1995-08-08

申请号：US964612

申请日：1992-10-22

Applicant: Marco Siligoni, deceased ,  Ferdinando Lari

Inventor： Marco Siligoni, deceased ,  Ferdinando Lari

IPC: H04M3/00 ,  H04M3/30 ,  H04M1/24

CPC classification number: H04M3/30 ,  H04M3/005

Abstract: A method of measuring under running conditions operation parameters of an interface circuit and a telephone subscriber line connected to it, said interface circuit comprising a first integrated circuit operating on a high voltage with outputs connected to the line and second outputs on which transverse and longitudinal current values of the line are respectively present in normal operation, and a second integrated circuit operating on a low voltage between the first circuit and a telephone exchange, comprises the steps of: switching the outputs across an impedance of a predetermined value, and measuring through the first circuit the values of the currents present on the second outputs; switching said outputs back to across the line leads, and measuring through the first circuit the values of the transverse and longitudinal line current values; performing, for each measurement through the second circuit, a digital encoding of the measured values and transmitting such encoded values to the telephone exchange.

Abstract translation: 一种在运行条件下测量接口电路和连接到其的电话用户线的操作参数的方法，所述接口电路包括在高电压下操作的第一集成电路，其中连接到所述线路的输出端和第二输出端上具有横向和纵向电流 线的值分别存在于正常操作中，并且在第一电路和电话交换机之间工作在低电压上的第二集成电路包括以下步骤：跨越预定值的阻抗切换输出，并且通过 首先电路存在于第二输出端的电流值; 将所述输出切换回线引线，并且通过第一电路测量横向和纵向线电流值的值; 对于通过第二电路进行的每个测量，对测量值进行数字编码，并将这些编码值发送到电话交换机。

公开(公告)号：US5420535A

公开(公告)日：1995-05-30

申请号：US65672

申请日：1993-05-21

Applicant: Daniela Nebuloni ,  Andrea Fassina

Inventor： Daniela Nebuloni ,  Andrea Fassina

IPC: H03F1/00 ,  H03F1/30 ,  H03G3/34 ,  H03F1/14

CPC classification number: H03F1/305 ,  H03G3/348

Abstract: A circuit comprising a transistor which, when supply is turned off, locks the output of the audio amplifier to the supply line, the potential of which is reduced gradually by a filter capacitor, so that the output voltage follows the supply voltage with the same slope, and is so controlled by the filter capacitor, thus eliminating undesired noise ("popping") at the output caused by electric transients in the audio amplifier.

Abstract translation: 一种电路，包括晶体管，当电源关闭时，将音频放大器的输出锁定到电源线，其电位由滤波电容逐渐减小，使得输出电压以相同的斜率跟随电源电压 ，并被滤波电容器控制，从而消除由音频放大器中的电瞬变引起的输出处的不期望的噪声（“弹出”）。

公开(公告)号：US5416389A

公开(公告)日：1995-05-16

申请号：US916386

申请日：1992-07-20

Applicant: Mauro Merlo ,  Silvano Gornati

Inventor： Mauro Merlo ,  Silvano Gornati

IPC: H04N3/16 ,  H04N3/23 ,  H04N3/233 ,  G09G1/04 ,  H01J29/70

CPC classification number: H04N3/233

Abstract: A device for controlling the linearity of a horizontal deflection stage comprising a deflection yoke supplied with a yoke current controlled by a switch and series-connected to a capacitor for varying the yoke voltage according to the phase of the yoke current; the device comprising a circuit for detecting and generating a real signal proportional to the yoke current, a ramp generator for generating an ideal ramp signal having rising portions defining a given S-shaped wave:form, and an error amplifier for receiving the real and ideal ramp signals and generating an error signal for driving a power transistor having its emitter and collector terminals connected parallel to the capacitor for modifying the voltage in the capacitor so that the yoke current assumes the required waveform.

Abstract translation: 一种用于控制水平偏转级的线性的装置，包括偏转线圈，该偏转线圈由提供由开关控制的轭电流并串联连接到电容器，用于根据轭电流的相位改变轭电压; 该装置包括用于检测和产生与轭电流成比例的实际信号的电路;斜坡发生器，用于产生具有限定给定S形波形的上升部分的理想斜坡信号;以及误差放大器，用于接收实际和理想的 产生用于驱动其发射极和集电极端子并联连接到电容器的功率晶体管的误差信号，用于修改电容器中的电压，使得磁轭电流呈现所需的波形。

公开(公告)号：US5412248A

公开(公告)日：1995-05-02

申请号：US960529

申请日：1992-10-13

Applicant: Bruno Murari ,  Giuseppe Libretti

Inventor： Bruno Murari ,  Giuseppe Libretti

IPC: H01L23/04 ,  B60R16/02 ,  H01L23/31 ,  H01L23/32 ,  H01R13/52 ,  H01R13/66 ,  H01R31/06 ,  H01L23/48 ,  H01L29/41 ,  H01L29/52 ,  H01L29/60

CPC classification number: B60R16/02 ,  H01L23/3107 ,  H01R13/665 ,  H01R31/06 ,  H01L2924/0002 ,  H01R13/5219

Abstract: A packaging structure is disclosed for a semiconductor device, having a body configured to include at least one part provided with contact terminals and shaped to form a connector member for direct coupling to a standard connector member from an external circuit. A connector assembly is also disclosed which is fully sealed from moisture and comprises the packaging structure.

Abstract translation: 公开了一种用于半导体器件的封装结构，其具有被配置为包括设置有接触端子的至少一个部分的主体并成形为形成用于从外部电路直接耦合到标准连接器构件的连接器构件。 还公开了一种连接器组件，其从湿气完全密封并且包括该包装结构。

公开(公告)号：US5372956A

公开(公告)日：1994-12-13

申请号：US153620

申请日：1993-11-17

Applicant: Livio Baldi

Inventor： Livio Baldi

IPC: H01L21/265 ,  H01L21/285 ,  H01L21/336 ,  H01L21/8238 ,  H01L23/485 ,  H01L27/092 ,  H01L29/78

CPC classification number: H01L21/28525 ,  H01L23/485 ,  H01L2924/0002

Abstract: Highly reliable direct contacts may be formed by defining a direct contact area within a larger area purposely implanted and diffused for ensuring electrical continuity in the semiconductor. Patterning may define the contacting polysilicon within an implanted direct contact area so that the definition edges thereof fall on a gate oxide layer thus preventing an etching of the semiconductor during the unavoidable over-etching that concludes the polysilicon patterning step. Preferably, a pre-definition of the direct contact area is performed through a first, deposited layer of polysilicon, which effectively protects a gate oxide layer during a HF wash prior to depositing a second, contacting layer of polysilicon of adequate thickness.

Abstract translation: 可以通过在有意植入和扩散的更大区域内限定直接接触区域来形成高度可靠的直接接触，以确保半导体中的电连续性。 图案化可以限定植入的直接接触区域内的接触多晶硅，使得其定义边缘落在栅极氧化物层上，从而防止了在不可避免的过蚀刻期间对半导体的蚀刻，从而得出结论多晶硅图案化步骤。 优选地，直接接触区域的预定义通过第一沉积多晶硅层进行，其在沉积足够厚度的多晶硅的第二接触层之前在HF洗涤期间有效地保护栅极氧化物层。

公开(公告)号：US5367483A

公开(公告)日：1994-11-22

申请号：US983799

申请日：1992-11-24

Applicant: Paolo Ghezzi ,  Federico Pio ,  Carlo Riva

Inventor： Paolo Ghezzi ,  Federico Pio ,  Carlo Riva

IPC: G11C17/00 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  G11C7/00 ,  H01L21/70

CPC classification number: H01L27/11521 ,  H01L27/11558

Abstract: A method for producing electrically erasable and programmable read-only memory cells with a single polysilicon level, including the use of a sacrificial layer of silicon oxide to produce a high-thickness silicon oxide layer on the active area. The active area of the cell is protected from heavy source and drain implantation in order to improve reliability.

Abstract translation: 一种用于制造具有单个多晶硅级别的电可擦除和可编程只读存储器单元的方法，包括使用氧化硅牺牲层在有源区上产生高厚度氧化硅层。 为了提高可靠性，保护电池的有源区域免受重的源极和漏极注入。

公开(公告)号：US5353369A

公开(公告)日：1994-10-04

申请号：US862003

申请日：1992-04-01

Applicant: Cirino Scarpa ,  Giuseppe Musco ,  Alberto Falzone

Inventor： Cirino Scarpa ,  Giuseppe Musco ,  Alberto Falzone

IPC: B01J19/00 ,  H01L21/00 ,  H04B1/02 ,  F24H1/10 ,  F28D1/047

CPC classification number: H01L21/67109 ,  H01L21/67086

Abstract: A device for heating chemical tanks includes at least one heat exchanger coil immersed inside a chemical tank. An inert gas, such as nitrogen, is heated and made to flow through the coil to heat a solution in the chemical tank to the desired temperature, which is sensed by a sensor. If microfractures form in the heat exchanger coil, the inert gas simply bubbles out of the solution and does not adversely impact the purity of the solution. In addition, the bubbling of the gas indicates the presence of a microfracture. A second heating coil is provided, and also provides heated inert fluid for heating the solution in the tank. The fluid flow through the first coil is controlled linearly to maintain the temperature at the desired temperature. The fluid flow through the second coil is controlled impulsively to quickly return the solution to the desired temperature after a temperature transient occurs, such as after a relatively cool object is immersed into the solution.

Abstract translation: 用于加热化学罐的装置包括浸入化学罐内的至少一个热交换器盘管。 惰性气体如氮气被加热并使其流过线圈，以将化学罐中的溶液加热至所需温度，该温度由传感器感测。 如果在热交换器盘管中形成微裂缝，则惰性气体将简单地从溶液中气泡出来，并且不会不利地影响溶液的纯度。 此外，气体的起泡指示存在微裂缝。 提供第二加热线圈，并且还提供用于加热罐中的溶液的加热惰性流体。 通过第一线圈的流体流动被线性控制以将温度保持在期望的温度。 通过第二线圈的流体流动被脉冲地控制以在温度瞬变发生之后，例如在相对较冷的物体浸入溶液中之后快速地将溶液返回到所需温度。

公开(公告)号：US5341005A

公开(公告)日：1994-08-23

申请号：US941520

申请日：1992-09-08

Applicant: Athos Canclini

Inventor： Athos Canclini

IPC: H01L27/04 ,  H01L21/331 ,  H01L21/822 ,  H01L27/02 ,  H01L27/06 ,  H01L29/73 ,  H01L29/732 ,  H01L29/866 ,  H01L29/08 ,  H01L29/44

CPC classification number: H01L27/0248

Abstract: An integrated protective structure provides protection from electrostatic discharges of structures to an integrated circuit functionally connected to a certain external pin. The protective structure is formed in a single epitaxial tub and includes a triggering Zener diode and a vertical bipolar transistor. The collector region of the vertical bipolar transistor is connected to the pin and constitutes also one of the two terminal regions of the triggering Zener. Around the emitter region and separated therefrom by the smallest distance feasible, is an annular region, having a heavier doping than the base region of the transistor formed with the purpose of intercepting the avalanche current of the Zener junction and distributing it in a uniform manner into the base region of the vertical transistor as well as acting as a shield for eventual electrons moving from the emitter region toward the breakdown junction. Optionally, a further emitter region, may be formed in front of the collector/cathode region and connected to the annular region in order to create a lateral bipolar transistor which triggers-on during an electrostatic discharge; thus, reducing the ohmic drop through the protective structure and the breakdown voltage.

Abstract translation: 集成的保护结构提供了防止结构静电放电到功能连接到某个外部引脚的集成电路的保护。 保护结构形成在单个外延槽中，并且包括触发齐纳二极管和垂直双极晶体管。 垂直双极晶体管的集电极区域连接到引脚，并且也构成触发齐纳二极管区域之一。 围绕发射极区域并且与其分离最小距离可行的是环形区域，其具有比形成的晶体管的基极区域更重的掺杂，其目的是截断齐纳结的雪崩电流并以均匀的方式将其分布 垂直晶体管的基极区域以及作为最终电子从发射极区域向击穿结移动的屏蔽。 可选地，另外的发射极区域可以形成在集电极/阴极区域的前面并连接到环形区域，以便产生在静电放电期间触发的横向双极晶体管; 从而减小了通过保护结构的电阻和击穿电压。