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公开(公告)号：US10116268B2
公开(公告)日：2018-10-30
申请号：US15401522
申请日：2017-01-09
Applicant: Analog Devices Global
Inventor： Sharad Vijaykumar , Gerard Mora-Puchalt
Abstract: The amplifier circuit includes a pair of differential input stages coupled to an output stage where both a selected input stage and an unselected input stage are active with one of either a differential input signal or a reference voltage. A switching network couples a first input differential signal to a first differential input stage and a reference voltage to a second differential input stage when an amplifier input signal is less than a threshold voltage. The switching circuit also couples the second input differential signal to the second differential input stage and the reference voltage to the first differential input stage when the amplifier input signal is greater than the threshold signal.
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62.发明授权公开(公告)号：US10110206B2
公开(公告)日：2018-10-23
申请号：US14713538
申请日：2015-05-15
Applicant: Analog Devices Global
Inventor： Derek J. Hummerston , Christopher Peter Hurrell
Abstract: According to a first aspect of this disclosure there is provided a voltage controlled current path. The voltage controlled current path comprises a first stage arranged to conduct current once the voltage at an input node of the first stage exceeds a threshold value. The amount of current that passes through the first stage is a function of the voltage at the input node. A second stage is arranged to pass a current that is a function of the current passing through the first stage.
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公开(公告)号：US20180284159A1
公开(公告)日：2018-10-04
申请号：US15472706
申请日：2017-03-29
Applicant: Analog Devices Global
Inventor： Andreas Callanan
CPC classification number: G01R19/2506 , G01R27/00 , G01R31/364 , H01M10/48
Abstract: Described are various current measurement techniques that can compensate for drift in shunt resistance. Determining a resistance of a shunt resistor, e.g., coupled to a battery terminal, can include introducing a known signal in sync with the chop phases of a dual system chop scheme, chopping the known signal out in the main signal path, and explicitly extracting the known signal in a parallel, additional signal deprocessing path.
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公开(公告)号：US10090940B2
公开(公告)日：2018-10-02
申请号：US14912065
申请日：2014-08-15
Applicant: Analog Devices Global
Inventor： Conor O'Keeffe , Michael O'Brien , Sean Sexton
Abstract: A method for calibrating an antenna array coupled to a plurality of transmitters via a plurality of couplers and a plurality of antenna element feeds is described. The method comprises, at a communication unit: selecting and coupling at least one coupler to a calibration receiver in a feedback path in the communication unit; scaling at least one first signal by at least one first beamform weight; applying the scaled at least one first signal to a first transmitter of the plurality of transmitters and routing the scaled at least one first signal via the selected at least one coupler to the calibration receiver; generating a reference signal by selecting and scaling the at least one first signal by at least one second beamform weight substantially equal to the at least one first beamform weight; comparing the at least one first signal scaled with the at least one first beamform weight with the at least one first signal reference signal scaled by the at least one second beamform weight to determine at least one first parameter result; storing the at least one first parameter result of the comparison associated with the first transmitter; repeating for subsequent transmitters the steps of selecting and coupling a further coupler, scaling, applying at least one further signal to a further transmitter of the plurality of transmitters, generating a further reference signal, comparing and storing at least one further parameter result until the plurality of couplers have been selected; and determining at least one calibration correction coefficient from a plurality of parameter results for applying to at least one second signal input to at least one transmitter of the plurality of transmitters coupled to the antenna array to substantially equalize a transfer function of a plurality of transmit paths to antenna element feeds for the at least one second signal having beamform weights applied thereto.
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公开(公告)号：US20180276157A1
公开(公告)日：2018-09-27
申请号：US15468781
申请日：2017-03-24
Applicant: Analog Devices Global
Inventor： Wes Vernon LOFAMIA , Jofrey Santillan , David Aherne
IPC: G06F13/364 , G06F1/08 , G06F13/42 , G06F13/40
CPC classification number: G06F13/364 , G06F13/404 , G06F13/4282
Abstract: SPI frame for simultaneously entering 8 bit daisy-chain mode from 16 bit register addressable mode. Some products that implement SPI may be connected in a daisy chain configuration, the first slave output being connected to the second slave input, etc. The SPI port of each slave is designed to send out during the second group of clock pulses an exact copy of the data it received during the first group of clock pulses. The whole chain acts as a communication shift register; daisy chaining is often done with shift registers to provide a bank of inputs or outputs through SPI. Large latency occurs during the entry into daisy-chain mode which increases as a function of the number of linked SPI devices. A means for simultaneously instructing all connected devices to enter/enable daisy-chain mode is disclosed.
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Patent Agency Ranking
公开(公告)号：US20180252748A1
公开(公告)日：2018-09-06
申请号：US15910805
申请日：2018-03-02
Applicant: Analog Devices Global
IPC: G01R15/14 , G01R35/04 , G01R21/133 , G01R11/25 , G01R15/04 , G01R19/00 , G01R27/02 , G01R23/02 , G01R21/14 , G01R1/20 , G01R19/02 , G01R21/00 , G01R27/16 , G01R27/26 , G01R27/28
CPC classification number: G01R15/146 , G01R1/203 , G01R11/24 , G01R11/25 , G01R15/04 , G01R15/14 , G01R19/0084 , G01R19/0092 , G01R19/02 , G01R21/00 , G01R21/133 , G01R21/14 , G01R22/066 , G01R22/068 , G01R23/02 , G01R27/02 , G01R27/14 , G01R27/16 , G01R27/26 , G01R27/28 , G01R35/04
Abstract: The present invention relates to current measurement apparatus 100. The current measurement apparatus 100 comprises a measurement arrangement 110, 114 which is configured to be disposed in relation to a load 108 which draws a current signal, the measurement arrangement being operative when so disposed to measure the load drawn current signal. The current measurement apparatus 100 also comprises a signal source 112 which is operative to apply a reference input signal to the measurement arrangement 110, 114 whereby an output signal from the measurement arrangement comprises a load output signal corresponding to the load drawn current signal and a reference output signal corresponding to the reference input signal. The current measurement apparatus 100 further comprises processing apparatus 116 which is operative to receive the output signal and to make a determination in dependence on the reference output signal and the load output signal, the determination being in respect of at least one of the load drawn current signal and electrical power consumed by the load.
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公开(公告)号：US20180203102A1
公开(公告)日：2018-07-19
申请号：US15409183
申请日：2017-01-18
Applicant: Analog Devices Global
Inventor： Chao WANG , Eoin ENGLISH , Javier CALPE MARAVILLA , Maurizio ZECCHINI
Abstract: Aspects of the embodiments are directed to a time-of-flight imaging system and methods of using the same. The time-of-flight imaging system includes a light emitter comprising at least one one-dimensional array of laser diodes; a photosensitive element for receiving reflected light from an object; and a light deflection device configured to deflect light from the light emitter to the object. In embodiments, the time-of-flight imaging system includes a lens structure to deflect emitting light from the laser diodes at a predetermined angle towards a light steering device.
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公开(公告)号：US20180172807A1
公开(公告)日：2018-06-21
申请号：US15385450
申请日：2016-12-20
Applicant: Analog Devices Global
Inventor： Levent Korkut , Sinan Alemdar
CPC classification number: G01S7/4865 , G01S7/484 , G01S17/10
Abstract: A system and method can be provided for introducing a varying time delay between a sequence of electrical pulses in a laser range finding system. A laser beam can be modulated with the sequence of electrical pulses. The laser beam can be transmitted towards a target and a photosensitive element can receive the modulated laser beam after reflection by the target. Control circuitry can determine a distance between the laser range finding system and the target based on the varying time delay, such as to provide a reduced error in the distance determination.
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公开(公告)号：US20180167091A1
公开(公告)日：2018-06-14
申请号：US15372723
申请日：2016-12-08
Applicant: Analog Devices Global
Inventor： Patrick Pratt , Michael O'Brien
CPC classification number: H04B1/0475 , H04B1/0483 , H04B7/0617 , H04B2001/0425 , Y02D70/40 , Y02D70/444
Abstract: Power amplifier circuits can behave in a non-linear manner particularly when operated to produce output signal swings approaching an amplifier saturation region. A pre-distortion signal can be applied to a signal to be transmitted to compensate for such power amplifier non-linearity. In applications where two or more transmitter power amplifiers are used, a beam-former can be configured to modify a digitally pre-distorted transmission signal by applying respective beam-forming weighting factors to the digitally pre-distorted transmission signal to provide input transmission signals for respective ones of the power amplifier circuits. The pre-distortion signal can be established at least in part using one or more of a sensed or estimated representation of a transmitted beam formed by spatially aggregating transmitted outputs from the two or more power amplifier circuits. In this manner, power amplifier efficiency can be enhanced without entirely separate pre-distortion compensation for each of the power amplifier circuits.
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公开(公告)号：US09985608B2
公开(公告)日：2018-05-29
申请号：US14863901
申请日：2015-09-24
Applicant: ANALOG DEVICES GLOBAL
Inventor： Sudarshan Onkar , Philip P. E. Quinlan , Kenneth J. Mulvaney
CPC classification number: H03H17/0283 , H03H17/04 , H03H2017/0245 , H03H2017/0488
Abstract: Embodiments of the present disclosure provide a digital filter module for use in receivers, particularly suitable for use in a narrow-band electromagnetic receiver. Design of the module is based on a recognition that providing to the module samples of a signal received by a receiver and sampled at a sampling frequency equal to four times the intermediate frequency of the receiver, eliminating zeros in the filter, and implementing the filter module as a resource-shared second-order filter structure that includes two sections advantageously enables saving some hardware components, particularly some multipliers and adders, in implementing a versatile digital filter module that can function either as two real filters or one complex filter. In this manner, substantial reduction of area and power consumption of the filter module may be achieved, while maintaining sufficiently high filtering performance.
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