Method and Apparatus For Reducing Jitter In A Phase-Locked Loop

    公开(公告)号:US20240305304A1

    公开(公告)日:2024-09-12

    申请号:US18117795

    申请日:2023-03-06

    CPC classification number: H03L7/091 H03L7/0891 H03L7/099

    Abstract: A method and apparatus for reducing jitter in a phase-locked loop (PLL). Clock signals provided to the PLL are resampled into the voltage domain of the VCO in the PLL rather than being merely level shifted into that voltage domain or input directly from digital domain clock dividers as in the prior art. The resampling is done with flip-flops in the analog domain using a faster synchronous clock in each case, and results in cleaner clock edges being presented to the PLL than those provided by the digital circuitry alone. A divided input clock signal is resampled using the undivided input clock, while a divided feedback clock signal is resampled using the feedback clock signal itself, i.e., the output of the VCO in the PLL. This removes jitter caused by the processing of clock signals in the digital voltage domain and thus reduces the jitter in the output signal.

    Determination of effects of physical activity on electrical load devices

    公开(公告)号:US10798479B2

    公开(公告)日:2020-10-06

    申请号:US16672473

    申请日:2019-11-03

    Abstract: An improved system and method for recognizing an audio signal due to physical activity and taking a predetermined action in response is disclosed. A “reverse noise signal” created by the sound pressure wave of the physical activity acting on the earpiece transducer is obtained. In some embodiments, an ambient noise signal is inverted and fed back, and the inverted signal is added to the intended audio signal being sent to the earpiece so that the ambient noise is cancelled. In other embodiments, a processor receives the ambient noise signal and predicts the modification to the intended audio signal needed to counteract the ambient noise. In other embodiments, the reverse noise signal may represent a motor or biological activity of a user; the system may take different actions in response to different physical activities, such as a heart beat of the user, or a tap, footfall, or swallowing by the user.

    Programmable Circuit Components With Recursive Architecture

    公开(公告)号:US20170126231A1

    公开(公告)日:2017-05-04

    申请号:US15339617

    申请日:2016-10-31

    Abstract: A circuit component that is adjustable at run time and a method of designing the circuit are disclosed. The component contains a hierarchy of recursive levels in which a bottom level is a compound element made from two connected simple elements, and each higher level contains two compound elements connected in the same fashion. The described circuit allows for a large number of available values of the component value to be arranged in a logarithmic fashion rather than a linear one as in the prior art, thus generally reducing errors between any desired value for the component and the available values. In addition, such compound elements reduce the power dissipated by the analog element and the susceptibility to noise as compared to prior art adjustable components without adversely affecting the overall gain of the circuit.

    Low Noise Audio Rendering Circuit
    65.
    发明申请

    公开(公告)号:US20170126196A1

    公开(公告)日:2017-05-04

    申请号:US15339827

    申请日:2016-10-31

    Abstract: A circuit and method for lowering noise in an audio rendering system is described. An analysis is made of the spectral content of an audio signal, i.e., the frequencies it contains, over a certain time interval. Cutoff frequencies of high pass and low pass filters that pass the audio signal are then adjusted for each interval by changing the effective values of adjustable impedance elements in the filters, so that the bandwidth of the system is adjusted to be what is sufficient to pass any frequencies in the resulting analog audio signal during any given time interval, rather than requiring the entire 20 kHz audio spectrum to be constantly present.

    Two differential amplifier configuration
    67.
    发明授权
    Two differential amplifier configuration 有权
    两个差分放大器配置

    公开(公告)号:US09595931B2

    公开(公告)日:2017-03-14

    申请号:US14569079

    申请日:2014-12-12

    Abstract: An apparatus is disclosed for providing a common mode voltage to the inputs of a first differential amplifier which outputs the difference between two signals. A second differential amplifier receives the output of the first differential amplifier, and the output of the second differential amplifier is fed back to the inputs of the first differential amplifier as a common mode voltage. Since both inputs of the first differential amplifier receive the fed back common mode voltage, the first differential amplifier still outputs only the difference in the two signals, but the presence of the common mode voltage allows the first differential amplifier to operate with lower noise if the voltage levels of the inputs to the first differential amplifier vary. The second differential amplifier may be of significantly lower quality and cost than the first differential amplifier, without affecting the performance of the first differential amplifier.

    Abstract translation: 公开了一种用于向输出两个信号之间的差的第一差分放大器的输入端提供共模电压的装置。 第二差分放大器接收第一差分放大器的输出,第二差分放大器的输出作为共模电压被反馈到第一差分放大器的输入端。 由于第一差分放大器的两个输入都接收反馈共模电压,所以第一差分放大器仍然仅输出两个信号的差值,但是共模电压的存在允许第一差分放大器以更低的噪声工作,如果 第一差分放大器的输入的电压电平变化。 第二差分放大器的质量和成本可以比第一差分放大器低得多,而不影响第一差分放大器的性能。

    Data input on audio device analog output port
    68.
    发明授权
    Data input on audio device analog output port 有权
    音频设备模拟输出端口的数据输入

    公开(公告)号:US09462368B2

    公开(公告)日:2016-10-04

    申请号:US14920791

    申请日:2015-10-22

    CPC classification number: H04R1/1041 H04M1/6058 H04R5/04 H04R2420/09

    Abstract: An apparatus is disclosed for inputting digital data on the output channel(s) of an audio subsystem in an audio device, without interfering with normal operation of the audio subsystem. The described circuit includes a resistive element in parallel with the expected load device, such as a headphone or speaker. The resistive element receives a modulated digital signal from a data source or a switch, and the instantaneous current through the resistive element due to the modulated digital signal is reflected in a current feedback mechanism of the audio subsystem. Demodulation logic retrieves the digital signal from the current measured by the current feedback mechanism. A capacitor is provided to prevent the current in the resistive element from the digital signal from impacting the average DC current that the feedback mechanism uses to evaluate the load device.

    Abstract translation: 公开了一种用于在音频设备中的音频子系统的输出通道上输入数字数据而不干扰音频子系统的正常操作的装置。 所描述的电路包括与期望的负载装置(例如耳机或扬声器)并联的电阻元件。 电阻元件从数据源或开关接收调制的数字信号,并且由于调制的数字信号引起的通过电阻元件的瞬时电流被反映在音频子系统的电流反馈机制中。 解调逻辑从当前反馈机制测量的电流中检索数字信号。 提供电容器以防止电阻元件中的电流数字信号影响反馈机构用于评估负载装置的平均DC电流。

    Voltage regulator using both shunt and series regulation
    69.
    发明授权
    Voltage regulator using both shunt and series regulation 有权
    电压调节器采用分流和串联调节

    公开(公告)号:US09383762B2

    公开(公告)日:2016-07-05

    申请号:US14580851

    申请日:2014-12-23

    CPC classification number: G05F1/575 G05F1/618

    Abstract: A voltage regulator for providing a constant voltage to a circuit is described in which a series regulator acts as the current source for a shunt regulator and the series regulator in turn is controlled by the current diverted from the output by the shunt regulator. The current being diverted by the shunt regulator is measured, either directly or by measuring a related operating parameter. When current below or above a certain desired amount is being diverted from the load by the shunt regulator, a signal is sent to the series regulator causing the series regulator to provide more or less current respectively, so that the shunt regulator again diverts the desired amount of current and the output voltage remains constant. This configuration results in efficiency near that of a series regulator while maintaining the better frequency response of a shunt regulator.

    Abstract translation: 描述了用于向电路提供恒定电压的电压调节器,其中串联调节器用作分流调节器的电流源,并且串联调节器又由分流调节器从输出转移的电流控制。 由分流调节器转移的电流可以直接测量或通过测量相关的操作参数进行测量。 当低于或高于一定期望量的电流由分流调节器从负载转移时,信号被发送到串联调节器,使得串联调节器分别提供更多或更少的电流,使得并联调节器再次转移所需量 的电流和输出电压保持不变。 该配置导致效率接近串联调节器的效率,同时保持分流调节器的更好的频率响应。

    Semi-Analog FIR Filter With High Impedance State
    70.
    发明申请
    Semi-Analog FIR Filter With High Impedance State 有权
    具有高阻抗状态的半模FIR滤波器

    公开(公告)号:US20160006416A1

    公开(公告)日:2016-01-07

    申请号:US14790448

    申请日:2015-07-02

    CPC classification number: H03H15/02

    Abstract: A system and method is disclosed for placing some of the elements of a FIR filter into a high impedance state in certain situations. When it is detected that the signal to an impedance element is the same as the previous value, then the driver of that impedance element is “turned off” or goes into a high impedance state, so that no current flows through that impedance element, and it no longer contributes to the filter output. Alternatively, if the impedance elements are the same between two adjacent taps of the delay line, the driver of one of those impedance elements may be turned off or go into a high impedance state. The technique may be particularly useful in differential output filters. Turning off a driver effectively removes the attached impedance element from the filter and reduces current flow and power consumption, thus extending battery life in mobile devices.

    Abstract translation: 公开了一种用于在某些情况下将FIR滤波器的一些元件置于高阻抗状态的系统和方法。 当检测到阻抗元件的信号与前一个值相同时,该阻抗元件的驱动器被“关断”或进入高阻抗状态,使得没有电流流过该阻抗元件,并且 它不再有助于滤波器输出。 或者,如果阻抗元件在延迟线的两个相邻抽头之间相同,那么这些阻抗元件中的一个的驱动器可能被关断或进入高阻抗状态。 该技术在差分输出滤波器中可​​能特别有用。 关闭驱动器可有效地从滤波器中去除附加的阻抗元件,并减少电流和功耗,从而延长移动设备的电池寿命。

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