公开(公告)号：US20170027995A1

公开(公告)日：2017-02-02

申请号：US15229028

申请日：2016-08-04

Applicant: Sang-Moon LEE

Inventor： Sang-Moon LEE

IPC: A61K35/57 ,  A61K35/58 ,  A61K9/00 ,  A61K35/60

Abstract: The present invention relates to a pharmaceutical composition for preventing and treating cell proliferative diseases comprising a feather of birds and a scale of fish, a scale transformed from the dermis, a degenerated or cornified variant of a scale, or a scale or horny scale of reptiles as an active ingredient. More particularly, the present invention relates to a pharmaceutical composition for preventing and treating cell proliferative diseases comprising a mixture of 70˜85 weight % of a feather of birds and 15˜30 weight % of a scale of fish, a scale transformed from the dermis, a degenerated or cornified variant of a scale, or a scale or horny scale of reptiles as an active ingredient. The inventive composition has the effect of inhibiting and preventing growth of cancer cells. Accordingly, the inventive composition may be used for anticancer purposes to prevent, ameliorate or treat cancer.

Abstract translation: 本发明涉及一种用于预防和治疗细胞增殖性疾病的药物组合物，其包括鸟类羽毛和鱼鳞，从真皮转化的鳞片，鳞屑的变性或角化变体，或爬行动物的鳞片或角质鳞 作为活性成分。 更具体地，本发明涉及用于预防和治疗细胞增殖性疾病的药物组合物，其包含70〜85重量％的羽毛和15〜30重量％的鱼鳞，从真皮转化的标度 ，鳞片的退化或角质变体，或作为活性成分的爬行动物的鳞屑或角质鳞片。 本发明的组合物具有抑制和预防癌细胞生长的作用。 因此，本发明的组合物可用于抗癌目的以预防，改善或治疗癌症。

公开(公告)号：US09425104B2

公开(公告)日：2016-08-23

申请号：US14259569

申请日：2014-04-23

Applicant: Moon-seung Yang ,  Mohammad Rakib Uddin ,  Myoung-jae Lee ,  Sang-moon Lee ,  Sung-hun Lee ,  Seong-ho Cho

Inventor： Moon-seung Yang ,  Mohammad Rakib Uddin ,  Myoung-jae Lee ,  Sang-moon Lee ,  Sung-hun Lee ,  Seong-ho Cho

IPC: H01L21/70 ,  H01L21/8238 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/06 ,  H01L27/092

CPC classification number: H01L21/8238 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/092

Abstract: Provided are a complementary metal oxide semiconductor (CMOS) device and a method of manufacturing the same. In the CMOS device, a buffer layer is disposed on a silicon substrate, and a first layer including a group III-V material is disposed on the buffer layer. A second layer including a group IV material is disposed on the buffer layer or the silicon substrate while being spaced apart from the first layer.

Abstract translation: 提供互补金属氧化物半导体（CMOS）器件及其制造方法。 在CMOS器件中，在硅衬底上设置缓冲层，并且在缓冲层上设置包括III-V族材料的第一层。 包含IV族材料的第二层设置在缓冲层或硅衬底上，同时与第一层间隔开。

公开(公告)号：US20160197161A1

公开(公告)日：2016-07-07

申请号：US15069148

申请日：2016-03-14

Applicant: Young-jin CHO ,  Kyoung-yeon KIM ,  Sang-moon LEE ,  Ki-ha HONG ,  Eui-chul HWANG

Inventor： Young-jin CHO ,  Kyoung-yeon KIM ,  Sang-moon LEE ,  Ki-ha HONG ,  Eui-chul HWANG

IPC: H01L29/66 ,  H01L29/423 ,  H01L29/12

CPC classification number: H01L29/7784 ,  H01L21/02538 ,  H01L29/122 ,  H01L29/127 ,  H01L29/158 ,  H01L29/20 ,  H01L29/205 ,  H01L29/42376 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/66795 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/785

Abstract: A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well.

公开(公告)号：US09263176B2

公开(公告)日：2016-02-16

申请号：US13596606

申请日：2012-08-28

Applicant: Yong Suk Kim ,  Sung Kwon Wi ,  Sang Moon Lee ,  Young Seuck Yoo ,  Jeong Bok Kwak

Inventor： Yong Suk Kim ,  Sung Kwon Wi ,  Sang Moon Lee ,  Young Seuck Yoo ,  Jeong Bok Kwak

IPC: H01F5/00 ,  H01F27/28 ,  H01F17/00 ,  H01F41/04

CPC classification number: H01F17/0006 ,  H01F41/041 ,  H01F2017/0066 ,  H01F2017/0073

Abstract: Disclosed herein are a conductor pattern of an electronic component formed in an oval coil shape on a magnetic substrate, the conductor pattern including: a straight part; and a curved part connected to the straight part at both sides thereof, wherein a line width of the curved part is smaller than that of the straight part, and an electronic component including the same. With the conductor pattern and the electronic component including the same according to the present invention, the high precision fine line width and the high resolution conductor pattern may be implemented to improve connectivity, thereby improving characteristics and reliability of the electronic component.

Abstract translation: 这里公开了在磁性基板上形成为椭圆线圈形状的电子部件的导体图案，该导体图案包括：直部; 以及弯曲部分，其两侧连接到所述直线部分，其中所述弯曲部分的线宽小于所述直线部分的线宽度，以及包括所述弯曲部分的电子部件。 利用根据本发明的导体图案和包括它们的电子部件，可以实现高精度细线宽度和高分辨率导体图案以改善连接性，从而提高电子部件的特性和可靠性。

公开(公告)号：US09099234B2

公开(公告)日：2015-08-04

申请号：US13427829

申请日：2012-03-22

Applicant: Sang Moon Lee ,  Sung Kwon Wi ,  Jeong Bok Kwak ,  Won Chul Sim ,  Young Seuck Yoo ,  Yong Suk Kim

Inventor： Sang Moon Lee ,  Sung Kwon Wi ,  Jeong Bok Kwak ,  Won Chul Sim ,  Young Seuck Yoo ,  Yong Suk Kim

IPC: H03H7/01 ,  H01F17/00 ,  H03H1/00 ,  H01F3/10

CPC classification number: H01F17/0013 ,  H01F2003/106 ,  H01F2017/0066 ,  H03H7/0153 ,  H03H2001/0092

Abstract: The present invention discloses a filter for removing noise, which includes: a lower magnetic body; an insulating layer provided on the lower magnetic body and including at least one conductor pattern; and an upper magnetic body including a primary ferrite composite provided on the insulating layer and a secondary ferrite composite provided on the primary ferrite composite to cover a pore formed on a surface of the primary ferrite composite, and a method of manufacturing the same.According to the present invention, it is possible to implement a filter for removing noise with high performance and characteristics by increasing magnetic permeability and improving impedance characteristics through simple structure and process.

Abstract translation: 本发明公开了一种消除噪声的滤波器，包括：下磁体; 绝缘层，设置在下磁体上并且包括至少一个导体图案; 以及设置在所述绝缘层上的初级铁氧体复合体的上磁体及在所述一次铁氧体复合体上设置的次级铁氧体复合体，以覆盖在所述一次铁氧体复合体的表面上形成的孔及其制造方法。 根据本发明，通过简单的结构和工艺，通过提高磁导率和改善阻抗特性，可以实现具有高性能和特性的噪声去除滤波器。

公开(公告)号：US20150069517A1

公开(公告)日：2015-03-12

申请号：US14259569

申请日：2014-04-23

Applicant: Moon-seung YANG ,  Mohammad Rakib UDDIN ,  Myoung-jae LEE ,  Sang-moon LEE ,  Sung-hun LEE ,  Seong-ho CHO

Inventor： Moon-seung YANG ,  Mohammad Rakib UDDIN ,  Myoung-jae LEE ,  Sang-moon LEE ,  Sung-hun LEE ,  Seong-ho CHO

IPC: H01L21/8238 ,  H01L27/092

CPC classification number: H01L21/8238 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/092

Abstract: Provided are a complementary metal oxide semiconductor (CMOS) device and a method of manufacturing the same. In the CMOS device, a buffer layer is disposed on a silicon substrate, and a first layer including a group III-V material is disposed on the buffer layer. A second layer including a group IV material is disposed on the buffer layer or the silicon substrate while being spaced apart from the first layer.

Abstract translation: 提供互补金属氧化物半导体（CMOS）器件及其制造方法。 在CMOS器件中，在硅衬底上设置缓冲层，并且在缓冲层上设置包括III-V族材料的第一层。 包含IV族材料的第二层设置在缓冲层或硅衬底上，同时与第一层间隔开。

公开(公告)号：US08956936B2

公开(公告)日：2015-02-17

申请号：US13568555

申请日：2012-08-07

Applicant: Sang-moon Lee ,  Young-jin Cho

Inventor： Sang-moon Lee ,  Young-jin Cho

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/423 ,  H01L29/778

CPC classification number: H01L29/1033 ,  H01L29/42376 ,  H01L29/7787

Abstract: A method of forming a group III-V material layer, a semiconductor device including the group III-V material layer, and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate; a group III-V channel layer formed on the substrate; a gate insulating layer formed on the group III-V channel layer; and a gate electrode and source and drain electrodes formed on the gate insulating layer, the source and drain electrodes having intervals from the gate electrode, wherein voids exist between a lower portion of the group III-V channel layer and an insulating layer. The group III-V channel layer may include a binary, ternary, or quaternary material.

Abstract translation: 形成III-V族材料层的方法，包括III-V族材料层的半导体器件，以及制造半导体器件的方法。 半导体器件包括衬底; 形成在所述基板上的III-V沟道层; 形成在III-V沟道层上的栅极绝缘层; 以及形成在栅极绝缘层上的栅极电极和源极和漏极，源极和漏极具有与栅极电极的间隔，其中在III-V族沟道层的下部和绝缘层之间存在空隙。 III-V族沟道层可以包括二元，三元或四元材料。

公开(公告)号：US20140370280A1

公开(公告)日：2014-12-18

申请号：US14377231

申请日：2013-03-13

Applicant: Keun Bong Jung ,  Dong Kweon Lee ,  Sang Moon Lee ,  Dong Jin Lee

Inventor： Keun Bong Jung ,  Dong Kweon Lee ,  Sang Moon Lee ,  Dong Jin Lee

IPC: C09J169/00 ,  B32B27/08 ,  B32B7/12

CPC classification number: C08L69/00 ,  B32B7/12 ,  B32B27/08 ,  B32B27/306 ,  B32B27/32 ,  B32B27/34 ,  B32B2270/00 ,  B32B2323/00 ,  B32B2369/00 ,  B32B2605/08 ,  C08L23/02 ,  C09J169/00 ,  Y10T428/2848 ,  Y10T428/2878 ,  Y10T428/31507 ,  C08L23/00

Abstract: Disclosed are a polyalkylene carbonate and polyolefin-based adhesive member and an adhesive structure including the same and, more particularly, an adhesive member manufactured using a mixed composition including polyalkylene carbonate, polyolefin, an initiator, and a blending aid, wherein an amount of the polyalkylene carbonate is 35 wt % to 65 wt %, a total amount of the initiator, the blending aid, and the polyolefin is 35 wt % to 65 wt %, and the adhesive member has a co-continuous morphology in which at least a portion of each of the polyalkylene carbonate and the polyolefin is exposed on an outer surface of the adhesive member and an adhesive structure including the same.

Abstract translation: 公开了一种聚亚烷基碳酸酯和聚烯烃基粘合剂构件以及包含该聚烯烃的粘合剂组合物，更具体地，使用包含聚碳酸亚烷基酯，聚烯烃，引发剂和共混助剂的混合组合物制造的粘合剂构件，其中， 聚碳酸亚烷基酯占35重量％至65重量％，引发剂，共混助剂和聚烯烃的总量为35重量％至65重量％，并且粘合剂部件具有共连续形态，其中至少部分 的聚碳酸亚烷基酯和聚烯烃被暴露在粘合剂部件的外表面和包含该聚烯烃的粘合剂结构体上。

公开(公告)号：US08825600B2

公开(公告)日：2014-09-02

申请号：US13090203

申请日：2011-04-19

Applicant: Soon-Churl Shin ,  Sang-Moon Lee ,  Woo-Jin Yang

Inventor： Soon-Churl Shin ,  Sang-Moon Lee ,  Woo-Jin Yang

IPC: G06F17/30

CPC classification number: G06F11/1451

Abstract: A file backup apparatus and method estimates whether a file has been changed in a directory based on directory property information, and backs up the directory which includes a changed file according to the estimation result.

Abstract translation: 文件备份装置和方法基于目录属性信息来估计目录中的文件是否被改变，并且根据估计结果来备份包括改变的文件的目录。

公开(公告)号：US20140105803A1

公开(公告)日：2014-04-17

申请号：US14116875

申请日：2012-05-22

Applicant: Sung Ho Hong ,  Sung Pill Cho ,  Chang Hoon Shin ,  Bok Yeon Yang ,  Sang Woo Shin ,  Sung Chang Hong ,  Kwang Hee Park ,  Sung Su Kim ,  Sang Moon Lee ,  Dong Wook Kwon

Inventor： Sung Ho Hong ,  Sung Pill Cho ,  Chang Hoon Shin ,  Bok Yeon Yang ,  Sang Woo Shin ,  Sung Chang Hong ,  Kwang Hee Park ,  Sung Su Kim ,  Sang Moon Lee ,  Dong Wook Kwon

IPC: B01J23/28 ,  B01D53/56 ,  B01J23/22

CPC classification number: B01D53/565 ,  B01D53/8628 ,  B01D2255/2063 ,  B01D2255/20707 ,  B01D2255/20723 ,  B01D2255/20769 ,  B01D2255/20776 ,  B01J23/22 ,  B01J23/28 ,  B01J23/30 ,  B01J35/002 ,  B01J37/0036 ,  B01J37/04

Abstract: Disclosed is a method for preparing a deNOx catalyst for removing nitrogen oxides (NOx) included in exhaust gas and the like. One embodiment of the present invention discloses a V2O5(vanadium pentoxide)-TiO2(titanium dioxide)-based deNOx catalyst for removing nitrogen oxides through selective catalytic reduction by dry-ball-milling crystalline titanium dioxide (TiO2) powder and crystalline vanadium pentoxide (V2O5) powder.

Abstract translation: 公开了一种制备用于除去废气等中所含的氮氧化物（NOx）的脱硝催化剂的方法。 本发明的一个实施方案公开了通过干球磨结晶二氧化钛（TiO 2）粉末和结晶五氧化二钒（V 2 O 5）的选择性催化还原来除去氮氧化物的V 2 O 5（五氧化二钒）-TiO 2（二氧化钛） ）粉。