Non-quiescing key setting facility
    62.
    发明授权
    Non-quiescing key setting facility 有权
    非静音键设置

    公开(公告)号:US08806179B2

    公开(公告)日:2014-08-12

    申请号:US12638314

    申请日:2009-12-15

    IPC分类号: G06F9/00 G06F9/30 G06F9/455

    摘要: A non-quiescing key setting facility is provided that enables manipulation of storage keys to be performed without quiescing operations of other processors of a multiprocessor system. With this facility, a storage key, which is accessible by a plurality of processors of the multiprocessor system, is updated absent a quiesce of operations of the plurality of processors. Since the storage key is updated absent quiescing of other operations, the storage key may be observed by a processor as having one value at the start of an operation performed by the processor and a second value at the end of the operation. A mechanism is provided to enable the operation to continue, avoiding a fatal exception.

    摘要翻译: 提供了一种非静音密钥设置设备,其能够执行存储密钥的操作而不停止多处理器系统的其他处理器的操作。 利用这种设施,不需要多个处理器的操作的静止,更新可由多处理器系统的多个处理器访问的存储密钥。 由于存储密钥在没有其他操作的停顿的情况下更新,所以存储密钥可以被处理器观察到在处理器执行的操作开始时具有一个值,并且在操作结束时观察到第二值。 提供了一种机制,以使操作能够继续,避免致命的异常。

    TRANSACTION DIAGNOSTIC BLOCK
    65.
    发明申请

    公开(公告)号:US20130339806A1

    公开(公告)日:2013-12-19

    申请号:US13524916

    申请日:2012-06-15

    IPC分类号: G06F11/14

    摘要: When an abort of a transaction occurs, a determination is made as to whether diagnostic information is to be stored in one or more transaction diagnostic blocks (TDBs). There are different types of transaction diagnostic blocks to accept diagnostic information depending on the type of abort and other considerations. As examples, there are a program-specified TDB in which information is stored if a valid TDB address is provided in a transaction begin instruction; a program interruption TDB, which is stored into when the program is aborted due to an interruption; and a program interception TDB, which is stored into when an abort results in an interception.

    CONSTRAINED TRANSACTION EXECUTION
    67.
    发明申请
    CONSTRAINED TRANSACTION EXECUTION 有权
    受约束的交易执行

    公开(公告)号:US20130339325A1

    公开(公告)日:2013-12-19

    申请号:US13524788

    申请日:2012-06-15

    IPC分类号: G06F17/30

    摘要: Constrained transactional processing is provided. A constrained transaction is initiated by execution of a Transaction Begin constrained instruction. The constrained transaction has a number of restrictions associated therewith. Absent violation of a restriction, the constrained transaction is to complete. If an abort condition is encountered, the transaction is re-executed starting at the Transaction Begin instruction. Violation of a restriction may cause an interrupt.

    摘要翻译: 提供约束事务处理。 受约束的事务通过执行Transaction Begin约束指令来启动。 受约束的事务具有与其相关联的许多限制。 没有违反限制,受约束的交易即将完成。 如果遇到中止条件,则从事务开始指令开始重新执行事务。 违反限制可能会导致中断。

    Instruction for Pre-Fetching Data and Releasing Cache Lines
    68.
    发明申请
    Instruction for Pre-Fetching Data and Releasing Cache Lines 有权
    预取数据和释放缓存行的指令

    公开(公告)号:US20120144125A1

    公开(公告)日:2012-06-07

    申请号:US13344636

    申请日:2012-01-06

    IPC分类号: G06F12/02

    摘要: A prefetch data machine instruction having an M field performs a function on a cache line of data specifying an address of an operand. The operation comprises either prefetching a cache line of data from memory to a cache or reducing the access ownership of store and fetch or fetch only of the cache line in the cache or a combination thereof. The address of the operand is either based on a register value or the program counter value pointing to the prefetch data machine instruction.

    摘要翻译: 具有M字段的预取数据机器指令在指定操作数的地址的数据的高速缓存行上执行功能。 该操作包括将来自存储器的数据的高速缓存行预取到高速缓存或减少对高速缓存中的存储和获取或仅获取高速缓存行的访问所有权或其组合。 操作数的地址是基于寄存器值或指向预取数据机器指令的程序计数器值。

    Load Relative and Store Relative Facility and Instructions Therefore
    70.
    发明申请
    Load Relative and Store Relative Facility and Instructions Therefore 审中-公开
    因此,加载相对和存储相对设施和说明

    公开(公告)号:US20090182992A1

    公开(公告)日:2009-07-16

    申请号:US11972740

    申请日:2008-01-11

    IPC分类号: G06F9/44

    摘要: A method, system and program product for loading or storing memory data wherein the address of the memory operand is based an offset of the program counter rather than an explicitly defined address location. The offset is defined by an immediate field of the instruction which is sign extended and is aligned as a halfword address when added to the value of the program counter.

    摘要翻译: 一种用于加载或存储存储器数据的方法,系统和程序产品,其中存储器操作数的地址基于程序计数器的偏移而不是明确定义的地址位置。 偏移量由符号扩展的指令的立即字段定义,并在被添加到程序计数器的值时作为半字地址对齐。