公开(公告)号：US06429835B1

公开(公告)日：2002-08-06

申请号：US09201490

申请日：1998-11-30

Applicant: Jim Browning ,  Charles M. Watkins ,  David A. Cathey

Inventor： Jim Browning ,  Charles M. Watkins ,  David A. Cathey

IPC: G09G322

CPC classification number: G01R31/257 ,  G01R35/002 ,  Y10S345/904

Abstract: A method of electrically testing pixel functionality is provided comprising releasably disposing a wafer in a socket. The wafer has at least one baseplate comprised of cathode emitters arranged in pixels. The socket has pads. The socket pads are contacted with test pins, and each of the pixels is addressed individually, thereby causing the cathode emitters to emit electrons in a current. The current is collected from each of the pixels on an anode screen. Alternatively, the anode card may have pins, and these pins contact pads on the baseplate. The baseplate, or substrate with baseplates, does not require a socket with pins.

Abstract translation: 提供了一种电测试像素功能性的方法，包括将晶片可释放地设置在插座中。 晶片具有至少一个由以像素排列的阴极发射体组成的基板。 插座有垫。 插座焊盘与测试引脚接触，并且每个像素被单独寻址，从而使阴极发射体以电流发射电子。 从阳极屏幕上的每个像素收集电流。 或者，阳极卡可以具有引脚，并且这些引脚接触基板上的焊盘。 底板或带基板的基板不需要带插脚的插座。

公开(公告)号：US06423239B1

公开(公告)日：2002-07-23

申请号：US09591192

申请日：2000-06-08

Applicant: David A. Cathey ,  Kevin Tjaden

Inventor： David A. Cathey ,  Kevin Tjaden

IPC: H01J900

CPC classification number: H01J9/025 ,  H01J2201/30403

Abstract: A method for fabricating sharp asperities. A substrate is provided which has a mask layer disposed thereon, and a layer of micro-spheres is disposed superjacent the mask layer. The micro-spheres are for patterning the mask layer. Portions of the mask layer are selectively removed, thereby forming circular masks. The substrate is isotropically etched, thereby creating sharp asperities.

Abstract translation: 一种制造尖锐凹凸的方法。 提供了具有设置在其上的掩模层的基板，并且在该掩模层的上方布置一层微球。 微球用于图案化掩模层。 选择性地去除掩模层的一部分，从而形成圆形掩模。 基板被各向同性地蚀刻，从而产生尖锐的凹凸。

公开(公告)号：US06266034B1

公开(公告)日：2001-07-24

申请号：US09181232

申请日：1998-10-27

Applicant: David A. Cathey ,  Glen E. Hush ,  Manny K. F. Ma ,  Craig M. Dunham ,  David A. Zimlich

Inventor： David A. Cathey ,  Glen E. Hush ,  Manny K. F. Ma ,  Craig M. Dunham ,  David A. Zimlich

IPC: G09G322

CPC classification number: H01J31/127 ,  H01J3/022 ,  H01J2201/319 ,  H01J2329/92

Abstract: A field emission display includes electrostatic discharge protection circuits coupled to an emitter substrate and an extraction grid. In the preferred embodiment, the electrostatic discharge circuit includes diodes reverse biased between grid sections and a first reference potential or between row lines and a second reference potential. The diodes provide a current path to discharge static voltage and thereby prevent a high voltage differential from being maintained between the emitter sets and the extraction grids. The diodes thereby prevent the emitter sets from emitting electrons at a high rate that may damage or destroy the emitter sets. In one embodiment, the diodes are coupled directly between the grid sections and the row lines. In one embodiment, the diodes are formed in an insulative layer carrying the grid sections. In another embodiment, the diodes are integrated into the emitter substrate.

Abstract translation: 场发射显示器包括耦合到发射极衬底和提取栅极的静电放电保护电路。 在优选实施例中，静电放电电路包括在网格部分和第一参考电位之间或在行线和第二参考电位之间反向偏置的二极管。 二极管提供电流路径来放电静电压，从而防止在发射极组和提取栅之间保持高电压差。 因此，二极管可防止发射极组以可能损坏或破坏发射极组的高速率发射电子。 在一个实施例中，二极管直接连接在网格部分和行线之间。 在一个实施例中，二极管形成在承载网格部分的绝缘层中。 在另一个实施例中，二极管被集成到发射器衬底中。

公开(公告)号：US06255772B1

公开(公告)日：2001-07-03

申请号：US09032127

申请日：1998-02-27

Applicant: David A. Cathey ,  Jimmy J. Browning

Inventor： David A. Cathey ,  Jimmy J. Browning

IPC: H01J1942

CPC classification number: H01J31/123 ,  H01J9/025 ,  H01J9/185 ,  H01J9/242 ,  H01J29/028 ,  H01J29/864 ,  H01J31/127 ,  H01J2329/863

Abstract: A large-area field emission device (“FED”) which is sealed under a predetermined level of vacuum pressure and method for making same includes a large-area substrate, an emitter electrode structure disposed on the substrate such that the emitter structure is disposed over a substantial portion of the substrate, a plurality of groups of micropoints, with each group having a predetermined number of micropoints and with each group being disposed at discrete positions on the emitter electrode structure, an insulating layer disposed over the substrate, with the insulating layer having openings therethrough which have a diameter within a predetermined range, and with each openings surrounding at least a portion a micropoint, an extraction structure disposed on the insulating layer, with the extraction structure having openings therethrough which have a diameter within a predetermined range, with each openings surrounding at least a portion of a micropoint, and with the openings in the extraction structure being aligned with openings in the insulating layer, a faceplate disposed above and spaced away from the extraction structure that is transparent predetermined wavelengths of light, an indium tin oxide (“ITO”) layer disposed on a surface of the faceplate towards the extraction structure, a matrix member disposed on the ITO layer, with the matrix member defining areas of the ITO surface that are to serve as pixel areas, with the pixel areas being aligned with the micropoints of a group micropoints, cathodoluminescent material disposed on the ITO in a plurality pixel areas, with the cathodoluminescent material at a particular pixel area being aligned to receive electron emitted from the micropoints associated that pixel area, and a plurality of spacers disposed between the faceplate and the extraction structure at predetermined locations, with each spacer having a height and cross-sectional shape commensurate with stresses that spacer will encounter caused by the vacuum pressure within the FED.

公开(公告)号：US06222257B1

公开(公告)日：2001-04-24

申请号：US09370080

申请日：1999-08-06

Applicant: David A. Cathey ,  J. Brett Rolfson ,  Valerie A. Ward ,  Karen M. Winchester

Inventor： David A. Cathey ,  J. Brett Rolfson ,  Valerie A. Ward ,  Karen M. Winchester

IPC: H01L2358

CPC classification number: H01L21/31116 ,  H01L21/3185 ,  Y10S438/97

Abstract: A etch stop layer for use in a silicon oxide dry fluorine etch process is made of silicon nitride with hydrogen incorporated in it either in the form of N—H bonds, Si—H bonds, or entrapped free hydrogen. The etch stop layer is made by either increasing the NH3 flow, decreasing the SiH4 flow, decreasing the nitrogen flow, or all three, in a standard PECVD silicon nitride fabrication process. The etch stop can alternatively be made by pulsing the RF field in either a PECVD process or an LPCVD process.

Abstract translation: 用于氧化硅干氟蚀刻工艺中的蚀刻停止层由氮化物制成，其中以N-H键，Si-H键或截留的游离氢的形式掺入氢。 蚀刻停止层是通过在标准PECVD氮化硅制造工艺中增加NH 3流，降低SiH4流量，降低氮气流量或全部三种来制备的。 替代地，蚀刻停止可以通过在PECVD工艺或LPCVD工艺中脉冲RF场来制造。

公开(公告)号：US06176752B1

公开(公告)日：2001-01-23

申请号：US09152772

申请日：1998-09-10

Applicant: Kevin Tjaden ,  David A. Cathey ,  John K. Lee

Inventor： Kevin Tjaden ,  David A. Cathey ,  John K. Lee

IPC: H01J900

CPC classification number: H01J9/025

Abstract: The present invention is a baseplate that has a supporting substrate with a primary surface upon which an array of emitters is formed. An insulator layer with a plurality of cavities aligned with respective emitters is disposed on the primary surface, and an extraction grid with a plurality of cavity openings aligned with respective emitters is deposited on the insulator layer. The extraction grid is made from a silicon based layer of material. A current control substrate formed from the silicon based layer of material of the extraction grid is provided such that the current control substrate is electrically isolated from the extraction grid and electrically connected to the emitters. The current control substrate has sufficient resistivity to limit the current from the emitters.

公开(公告)号：US6027619A

公开(公告)日：2000-02-22

申请号：US769936

申请日：1996-12-19

Applicant: David A. Cathey ,  Jimmy J. Browning ,  Zhong-Yi Xia

Inventor： David A. Cathey ,  Jimmy J. Browning ,  Zhong-Yi Xia

IPC: C23C14/04 ,  C23C14/32 ,  H01J9/02 ,  H01J37/32

CPC classification number: H01J37/32055 ,  C23C14/046 ,  C23C14/325 ,  H01J9/025

Abstract: A filtered cathodic vacuum arc is used as a source of metal to generate a highly directional beam of metal ions having substantially larger velocity parallel to the axis of the beam (perpendicular to the surface of the target) than perpendicular to the axis of the beam. This ion beam, with energies ranging up to 80 eV, is used to deposit metal into the bottom of high aspect (typically greater than 3 to 1) openings, for example, to deposit titanium in the bottom of deep contact holes in semiconductor devices or to deposit molybdenum to form tips for emitters for a field emission display. Gases can be introduced into the vacuum deposition chamber during deposition to change the nature of the deposit. The substrate or target bias can be adjusted to control the deposition rate.

Abstract translation: 过滤的阴极真空电弧用作金属源，以产生具有与垂直于光束轴线垂直的光束平行于光束轴线（垂直于目标表面）的基本上更大的速度的高度定向的金属离子束。 这种具有高达80eV的能量的离子束用于将金属沉积到高方面的底部（通常大于3至1个）的开口中，例如将半导体器件中的深接触孔底部的钛沉积到 以沉积钼以形成用于场致发射显示器的发射器的尖端。 可以在沉积过程中将气体引入真空沉积室以改变沉积物的性质。 可以调整衬底或目标偏压以控制沉积速率。

公开(公告)号：US5984746A

公开(公告)日：1999-11-16

申请号：US764485

申请日：1996-12-12

Applicant: Robert T. Rasmussen ,  David A. Cathey

Inventor： Robert T. Rasmussen ,  David A. Cathey

IPC: H01J9/18 ,  H01J9/24 ,  H01J29/02 ,  H01J29/86 ,  H01J31/12 ,  H01J9/02

CPC classification number: H01J9/185 ,  H01J29/028 ,  H01J29/864 ,  H01J31/127 ,  H01J9/242 ,  H01J2329/8625 ,  H01J2329/8655 ,  H01J2329/866

Abstract: A faceplate in a flat panel display has attachment sites made with a method that includes steps of mixing frit and photoresist to form a mixture, applying the mixture to the substrate, softbaking the substrate and mixture, and exposing and developing the resist to define adhesion sites. Spacers are then attached to the faceplate at the adhesion sites.

公开(公告)号：US5980349A

公开(公告)日：1999-11-09

申请号：US856382

申请日：1997-05-14

Applicant: James J. Hofmann ,  Jason B. Elledge ,  Zhong-Yi Xia ,  David A. Cathey

Inventor： James J. Hofmann ,  Jason B. Elledge ,  Zhong-Yi Xia ,  David A. Cathey

IPC: H01J9/18 ,  H01J9/24 ,  H01J9/00

CPC classification number: H01J9/242 ,  H01J9/185 ,  H01J2329/8625 ,  H01J2329/863

Abstract: A process is disclosed for anodically bonding an array of spacer columns to one of the inner major faces on one of the generally planar plates of an evacuated, flat-panel video display. The process includes the steps of: providing a generally planar plate having a plurality of spacer column attachment sites; providing electrical interconnection between all attachment sites; coating each attachment site with a patch of oxidizable material; providing an array of unattached permanent glass spacer columns, each unattached permanent spacer columns being of uniform length and being positioned longitudinally perpendicular to a single plane, with the plane intersecting the midpoint of each unattached spacer column; positioning the array such that an end of one permanent spacer column is in contact with the oxidizable material patch at each attachment site; and anodically bonding the contacting end of each permanent spacer column to the oxidizable material layer. The invention also includes an evacuated flat panel display having spacer structures which are anodically bonded to an internal major face of the display, as well as a face plate assembly manufactured by the aforestated process.

Abstract translation: 公开了一种用于将隔离柱阵列阳极结合到抽空的平板显示器的一个平面板上的内主表面之一的工艺。 该方法包括以下步骤：提供具有多个间隔柱附着位点的大致平面的板; 提供所有附件位置之间的电气互连; 用一块可氧化材料涂覆每个附着部位; 提供一组未连接的永久性玻璃间隔柱，每个未连接的永久间隔柱具有均匀的长度并且纵向垂直于单个平面定位，其中平面与每个未连接的间隔柱的中点相交; 定位阵列使得一个永久间隔柱的末端在每个附着位置与可氧化材料贴片接触; 并将每个永久间隔柱的接触端阳极结合到可氧化材料层上。 本发明还包括具有阳极结合到显示器的内部主面的间隔结构的抽真空平板显示器以及通过前述方法制造的面板组件。

公开(公告)号：US5910705A

公开(公告)日：1999-06-08

申请号：US931811

申请日：1997-09-16

Applicant: David A. Cathey ,  Charles Watkins

Inventor： David A. Cathey ,  Charles Watkins

IPC: H01J29/90 ,  H01J29/94 ,  H01J31/12 ,  H01J63/00

CPC classification number: H01J29/94 ,  H01J29/90 ,  H01J31/127 ,  H01J2329/8625 ,  H01J2329/92

Abstract: A flat-panel field emission display comprises a luminescent faceplate, a rigid backplate, and an interposed or sandwiched emitter or cathode plate. A positioning spacer or connector ridge is formed on the rear surface of the faceplate to space the cathode plate a fixed distance behind the faceplate. A peripheral seal is formed between the faceplate and the backplate. The faceplate, backplate, and peripheral seal define an evacuated internal space which contains the cathode plate. The backplate is spaced behind the cathode plate to create a rearward vacuum space in which a getter is located.

Abstract translation: 平板场发射显示器包括发光面板，刚性背板以及插入或夹持的发射器或阴极板。 在面板的后表面上形成定位间隔件或连接器脊，以使阴极板在面板后面固定距离。 在面板和背板之间形成周边密封。 面板，背板和外围密封件限定了包含阴极板的抽真空的内部空间。 背板在阴极板之后隔开，以形成一吸气剂位于其中的向后真空空间。