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公开(公告)号：US20080232150A1
公开(公告)日：2008-09-25
申请号：US11689559
申请日：2007-03-22
IPC分类号： G11C17/00
摘要： A method and structure implementing a reprogrammable read only memory (ROM) include a pair of fuse elements having different lengths and selectively arranged to define an initial bit state. A group of a plurality of the pairs of fuse elements defines a predetermined data pattern of ones and zeros, providing initial states stored in the reprogrammable ROM. The reprogrammable ROM is reprogrammed when needed by selectively blowing a selected fuse or selected fuses to change the data pattern stored in the ROM.
摘要翻译： 实现可再编程只读存储器（ROM）的方法和结构包括具有不同长度的一对熔丝元件，并且选择性地布置以定义初始位状态。 一组多对熔丝元件定义了一个和零的预定数据模式，提供存储在可再编程ROM中的初始状态。 当需要时，通过选择性地吹送所选择的保险丝或选定的保险丝来改变存储在ROM中的数据模式，重编程ROM被重新编程。
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公开(公告)号：US07388273B2
公开(公告)日：2008-06-17
申请号：US11152750
申请日：2005-06-14
申请人： Geoffrey W. Burr , Chandrasekharan Kothandaraman , Chung Hon Lam , Xiao Hu Liu , Stephen M. Rossnagel , Christy S. Tyberg , Robert L. Wisnieff
发明人： Geoffrey W. Burr , Chandrasekharan Kothandaraman , Chung Hon Lam , Xiao Hu Liu , Stephen M. Rossnagel , Christy S. Tyberg , Robert L. Wisnieff
IPC分类号： H01L29/00
CPC分类号： H01L23/5256 , H01L23/5252 , H01L45/06 , H01L45/1206 , H01L45/1226 , H01L45/1286 , H01L45/1293 , H01L45/144 , H01L45/148 , H01L45/1683 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A reversible fuse structure in an integrated circuit is obtained through the implementation of a fuse cell having a short thin line of phase change materials in contact with via and line structures capable of passing current through the line of phase change material (fuse cell). The current is passed through the fuse cell in order to change the material from a less resistive material to a more resistive material through heating the phase change material in the crystalline state to the melting point then quickly quenching the material into the amorphous state. The reversible programming is achieved by passing a lower current through the fuse cell to convert the high resistivity amorphous material to a lower resistivity crystalline material. Appropriate sense-circuitry is integrated to read the information stored in the fuses, wherein said sense circuitry is used to enable or disable circuitry.
摘要翻译： 集成电路中的可逆熔丝结构通过实现具有短路相变材料的熔断电池获得，所述相变材料与能够使电流通过相变材料线（熔丝电池）的通孔和线结构相接触。 电流通过熔丝电池，以便通过将结晶状态的相变材料加热至熔点，从而将材料从较小电阻的材料转变为更电阻的材料，然后快速将材料淬火成非晶状态。 可逆编程通过使较低电流通过熔丝电池来实现，以将高电阻率无定形材料转换成较低电阻率的晶体材料。 集成适当的感测电路以读取存储在熔丝中的信息，其中所述感测电路用于启用或禁用电路。
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63.发明申请公开(公告)号：US20080048638A1
公开(公告)日：2008-02-28
申请号：US11923932
申请日：2007-10-25
CPC分类号： G01R31/31853 , G01R31/30 , G01R31/3004
摘要： An integrated circuit device having at least one fuse capable of being blown in order to provide measurements of fuse current-voltage characteristics is provided. The integrated circuit device also provides at least one pulse generation circuit associated with the fuse and capable of generating a pulse to blow the fuse through one or more DC input signals.
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公开(公告)号：US07270269B2
公开(公告)日：2007-09-18
申请号：US11162306
申请日：2005-09-06
IPC分类号： G07C13/00
CPC分类号： G07C13/00
摘要： A secure device for electronic voting employs a write-once vote-recording medium. The medium has an initial writing mode in which data can be written but not read and a subsequent reading mode whereby data can be read but writing is permanently disabled. Once switched from the writing mode to the reading mode, it cannot be switched back. A hardware mechanism provides successful write confirmation The medium can be installed like a cartridge into a vote-recording device. The voting device provides encryption/authorization that combines polling parameters with voter information to produce a “fuse string”. For each vote, a fuse string is written to the array. The poll is “closed” by switching the medium to “read” mode, preventing further modification or tampering. To read out the results of the poll, an auditor enters “password” information to decode/decrypt the recorded information.
摘要翻译： 用于电子投票的安全装置采用一次写入式记录介质。 该介质具有初始写入模式，其中可以写入数据但不能读取数据，以及随后的读取模式，从而可以读取数据，但写入永久禁用。 一旦从写入模式切换到读取模式，它就不能被切换回来。 硬件机制提供成功的写入确认介质可以像墨盒一样安装到投票记录设备中。 投票设备提供加密/授权，其将轮询参数与选民信息组合以产生“保险丝串”。 对于每次投票，将熔丝串写入阵列。 通过将介质切换到“读取”模式，轮询“关闭”，防止进一步修改或篡改。 为了读出投票结果，审核员输入“密码”信息来解密/解密记录的信息。
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公开(公告)号：US20060197179A1
公开(公告)日：2006-09-07
申请号：US10906718
申请日：2005-03-03
IPC分类号： H01L29/00
CPC分类号： H01L27/10 , G11C17/16 , H01L23/5256 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： The present invention provides a dense semiconductor fuse array having common cathodes. The dense semiconductor fuse array of the present invention occupies less area than conventional semiconductor fuse arrays, can comprise integrated diodic components, and can require only one metal wiring layer for making electrical connections to the fuse array.
摘要翻译： 本发明提供一种具有共同阴极的致密半导体熔丝阵列。 本发明的致密半导体熔丝阵列占据比常规半导体熔丝阵列小的面积，可以包括集成二极管部件，并且仅需要一个金属布线层来与熔丝阵列进行电连接。
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66.发明申请公开(公告)号：US20060158239A1
公开(公告)日：2006-07-20
申请号：US11037612
申请日：2005-01-18
IPC分类号： G06F1/04
CPC分类号： G01R31/31853 , G01R31/30 , G01R31/3004
摘要： An integrated circuit device having at least one fuse capable of being blown in order to provide measurements of fuse current-voltage characteristics is provided. The integrated circuit device also provides at least one pulse generation circuit associated with the fuse and capable of generating a pulse to blow the fuse through one or more DC input signals.
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公开(公告)号：US07075127B2
公开(公告)日：2006-07-11
申请号：US10769101
申请日：2004-01-29
IPC分类号： H01L27/105
CPC分类号： H01L27/115 , G11C16/0433 , G11C29/789 , G11C2216/10 , H01L23/5256 , H01L29/66825 , H01L29/7885 , H01L2924/0002 , H01L2924/00
摘要： An electrically programmable transistor fuse having a double-gate arrangement disposed in a single layer of polysilicon in which a first gate is disposed overlapping a portion of a source region and a second gate is insulated from the first gate and disposed overlapping a portion of a drain region. The first gate includes a terminal for receiving an externally applied control signal and the second gate is capacitively couple to the drain region in which a coupling device is included for increasing the capacitive coupling of the second gate and the drain region for enabling reduction in fuse programming voltage.
摘要翻译： 具有设置在单层多晶硅中的双栅极布置的电可编程晶体管熔丝，其中第一栅极被布置成与源极区域的一部分重叠并且第二栅极与第一栅极绝缘，并且与漏极的一部分重叠 地区。 第一栅极包括用于接收外部施加的控制信号的端子，并且第二栅极电容耦合到其中包括耦合装置的漏极区域，以增加第二栅极和漏极区域的电容耦合，以便能够减少熔丝编程 电压。
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公开(公告)号：US06781436B2
公开(公告)日：2004-08-24
申请号：US10202943
申请日：2002-07-25
IPC分类号： H01H3776
摘要： A transistor (such as a MOSFET) is operated in its breakdown region, as opposed to its saturation region, to program an electric fuse. With the programming transistor operated in the breakdown region, a much higher current is enabled than the associated saturation current for the same size transistor. Thus, a smaller transistor can be used for programming the fuse. Cooperative with transistor operation in the breakdown region, a dynamic current compliance device is used to limit the peak current to prevent damage than can result from excessive current flowing through the transistor. The current compliance device can be external to the integrated fuse and programming transistor circuit.
摘要翻译： 晶体管（例如MOSFET）在其击穿区域中操作，与其饱和区域相反，以对电熔丝进行编程。 在编程晶体管工作在击穿区域的情况下，相同尺寸晶体管的相关饱和电流能够实现更高的电流。 因此，可以使用较小的晶体管来编程保险丝。 与击穿区域中的晶体管工作合作，使用动态电流一致性装置来限制峰值电流，以防止由过大的电流流过晶体管而导致的损坏。 电流兼容装置可以在集成保险丝和编程晶体管电路外部。
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公开(公告)号：US20130285694A1
公开(公告)日：2013-10-31
申请号：US13457692
申请日：2012-04-27
CPC分类号： H01L22/14 , G01R31/2853 , H01L21/76898 , H01L2924/00 , H01L2924/0002
摘要： A TSV structure, method of making the TSV structure and methods of testing the TSV structure. The structure including: a trench extending from a top surface of a semiconductor substrate to a bottom surface of the semiconductor substrate, the trench surrounding a core region of the semiconductor substrate; a dielectric liner on all sidewalls of the trench; and an electrical conductor filling all remaining space in the trench, the dielectric liner electrically isolating the electrical conductor from the semiconductor substrate and from the core region.
摘要翻译： TSV结构，制造TSV结构的方法和TSV结构测试方法。 该结构包括：从半导体衬底的顶表面延伸到半导体衬底的底表面的沟槽，沟槽围绕半导体衬底的芯区; 在沟槽的所有侧壁上的电介质衬垫; 以及电导体填充沟槽中的所有剩余空间，电介质衬垫将电导体与半导体衬底和芯区域电隔离。
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公开(公告)号：US08384145B2
公开(公告)日：2013-02-26
申请号：US12692923
申请日：2010-01-25
IPC分类号： H01L29/76
CPC分类号： H01L29/7923 , H01L29/66833
摘要： Each of a hot-carrier non-volatile memory device and a method for fabricating the hot carrier non-volatile memory device is predicated upon a semiconductor structure and related method that includes a metal oxide semiconductor field effect transistor structure. The semiconductor structure and related method include at least one of: (1) a spacer that comprises a dielectric material having a dielectric constant greater than 7 (for enhanced hot carrier derived charge capture and retention); and (2) a drain region that comprises a semiconductor material that has a narrower bandgap than a bandgap of a semiconductor material from which is comprised a channel region (for enhanced impact ionization and charged carrier generation).
摘要翻译： 热载体非易失性存储器件和用于制造热载体非易失性存储器件的方法中的每一种都取决于包括金属氧化物半导体场效应晶体管结构的半导体结构和相关方法。 半导体结构和相关方法包括以下中的至少一个：（1）包括介电常数大于7的介电材料的间隔物（用于增强热载体导电的电荷捕获和保留）; 和（2）包括半导体材料的漏极区，该半导体材料具有比半导体材料的带隙窄的带隙，其包括沟道区（用于增强的冲击电离和带电载流子的生成）。
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