公开(公告)号：US07421643B2

公开(公告)日：2008-09-02

申请号：US11029148

申请日：2005-01-04

申请人： Hongwei Song ,  German Feyh

发明人： Hongwei Song ,  German Feyh

IPC分类号： H03M13/00

CPC分类号： H04L1/0054 ,  H03M13/098 ,  H03M13/29 ,  H03M13/2909 ,  H03M13/2933 ,  H03M13/4146 ,  H03M13/6343 ,  H04L1/0063

摘要： A data detection and decoding system in which a single parity bit added to the end of each code word by the encoder is used in the channel detector to improve the accuracy with which bit decisions are made in the channel detector. The bit estimates and the reliability estimates are then processed by the decoder to recover the original input bits. By using single parity for this dual purpose in combination with a decoder that follows the channel detector and uses the bit estimates and reliability estimates to recover the original input bits, performance of the data detection and decoding system is greatly improved while also overcoming the disadvantages of known digital recording systems.

摘要翻译： 一种数据检测和解码系统，其中在信道检测器中使用由编码器添加到每个码字的末尾的单个奇偶校验位，以提高在信道检测器中进行位决定的精度。 然后由解码器处理比特估计和可靠性估计以恢复原始输入比特。 通过将这种双重目的的单一奇偶校验与跟随信道检测器的解码器结合使用，并使用比特估计和可靠性估计来恢复原始输入比特，数据检测和解码系统的性能大大提高，同时克服了 已知的数字录音系统。

公开(公告)号：US20070192666A1

公开(公告)日：2007-08-16

申请号：US11341963

申请日：2006-01-26

申请人： Hongwei Song ,  Weijun Tan

发明人： Hongwei Song ,  Weijun Tan

IPC分类号： H03M13/00

CPC分类号： H03M13/29 ,  G11B20/10296 ,  G11B20/1833 ,  G11B2020/1836 ,  H03M13/098 ,  H03M13/1515 ,  H03M13/3746 ,  H03M13/6331

摘要： Various systems and methods for error reduction in a digital information system are disclosed herein. As one example, a digital storage system is provided that includes a storage medium that with an encoded data set accessible via a buffer. The systems further include a soft output Viterbi algorithm channel detector operable to receive the encoded data set, and to provide a hard and a soft output representing the encoded data set. The hard and the soft output from the soft output Viterbi algorithm channel detector are provided to a single parity row decoder that provides another hard output that is an error reduced representation of the encoded data set. The encoded data set is additionally provided from the buffer to another channel detector via a delay element. The delay element time shifts the encoded data set to create a time shifted encoded data set. The hard output from the single parity row decoder and the time shifted encoded data set are provided to coincident with each other to another channel detector. This other channel detector provides a recovered output that exhibits a reduction in errors compared with the encoded data set.

摘要翻译： 本文公开了用于数字信息系统中的差错减少的各种系统和方法。 作为一个示例，提供数字存储系统，其包括具有经由缓冲器可访问的编码数据集的存储介质。 所述系统还包括软输出维特比算法信道检测器，其可操作以接收编码数据集，并提供表示编码数据集的硬和软输出。 来自软输出维特比算法信道检测器的硬和软输出被提供给单个奇偶校验行解码器，其提供作为编码数据集的错误减少表示的另一硬输出。 编码数据集通过延迟元件从缓冲器附加地提供给另一个通道检测器。 延迟元件时间移动编码数据集以创建时移编码数据集。 提供来自单个奇偶校验行解码器和时移编码数据组的硬输出以彼此重合到另一个通道检测器。 该另一通道检测器提供了与编码数据集相比显示出差错的恢复输出。

公开(公告)号：US20060168493A1

公开(公告)日：2006-07-27

申请号：US11041694

申请日：2005-01-24

申请人： Hongwei Song

发明人： Hongwei Song

IPC分类号： H03M13/00 ,  G06F11/00

CPC分类号： G11B20/1803 ,  G06F11/1008 ,  H03M13/41 ,  H03M13/4146 ,  H03M13/4153 ,  H03M13/6502

摘要： A data detection and decoding system includes a SOVA channel detector that uses single parity (SOVASP) to improve the accuracy with which the detector estimates bits. Each column or row read back from the read channel constitutes a code word and each code word is encoded to satisfy single parity. Because the SOVASP channel detector detects whether each code word satisfies single parity, it is unnecessary to use both a column decoder and a row decoder in the channel decoder. Either the row decoder or the column decoder can be eliminated depending on whether bits are read back on a column-by-column basis or on a row-by-row basis. This reduction in components reduces hardware complexity and improves system performance. The output of the row or column decoder is received by a second detector that processes the output received from the decoder to recover the original information bits.

摘要翻译： 数据检测和解码系统包括使用单个奇偶校验（SOVASP）的SOVA信道检测器来提高检测器估计比特的精度。 从读取通道读回的每个列或行构成一个代码字，每个代码字被编码以满足单个奇偶校验。 因为SOVASP信道检测器检测每个码字是否满足单个奇偶校验，所以不必在信道解码器中使用列解码器和行解码器。 取决于是逐列还是逐行读取位是否可以排除行解码器或列解码器。 组件的这种减少降低了硬件复杂性并提高了系统性能。 行或列解码器的输出由处理从解码器接收的输出的第二检测器接收以恢复原始信息位。

公开(公告)号：US08838660B2

公开(公告)日：2014-09-16

申请号：US12972942

申请日：2010-12-20

申请人： Yu Liao ,  Hongwei Song ,  Lingyan Sun

发明人： Yu Liao ,  Hongwei Song ,  Lingyan Sun

IPC分类号： G06F17/10 ,  H03H21/00 ,  G11B20/10

CPC分类号： H03H21/0012 ,  G11B20/10055 ,  G11B20/10462 ,  G11B2220/2516 ,  H03H21/0067

摘要： Various embodiments of the present invention provide systems and methods for reducing filter sensitivities. As an example, reduced sensitivity filter circuits are discussed that include a digital filter and a filter tap adaptation circuit. The digital filter is operable to filter a received input based at least in part on a plurality of filter taps, and to provide a filtered output. The filter tap adaptation circuit is operable to receive an error value and a weighting control value, and to adaptively calculate at least one of the filter taps using the error value and the weighting control value.

摘要翻译： 本发明的各种实施例提供了用于降低过滤器灵敏度的系统和方法。 作为示例，讨论了包括数字滤波器和滤波器抽头适配电路的降低灵敏度滤波器电路。 数字滤波器可操作以至少部分地基于多个滤波器抽头对接收到的输入进行滤波，并提供滤波输出。 滤波器抽头适配电路可操作以接收误差值和加权控制值，并且使用误差值和加权控制值自适应地计算滤波器抽头中的至少一个。

公开(公告)号：US08675298B2

公开(公告)日：2014-03-18

申请号：US12992933

申请日：2009-01-09

申请人： Jingfeng Liu ,  Hongwei Song

发明人： Jingfeng Liu ,  Hongwei Song

IPC分类号： G11B5/035 ,  G11B20/10

CPC分类号： G11B20/10009 ,  G11B5/035 ,  G11B5/09 ,  G11B20/10046 ,  G11B20/10212 ,  G11B20/10481 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide data processing circuits that include both a main data processing circuit and an adaptive setting determination circuit. The main data processing circuit receives a series of data samples and includes: an equalizer circuit and a data detector circuit. The equalizer circuit receives the series of data samples and provides an equalized output. The equalizer circuit is controlled at least in part by a coefficient. The data detector circuit receives the equalizer output and provides a main data output based at least in part on a target. The adaptive setting determination circuit receives the series of data samples and the main data output, and operates in parallel with the main data processing circuit to adaptively determine the coefficient and the target.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 例如，本发明的一些实施例提供了包括主数据处理电路和自适应设置确定电路的数据处理电路。 主数据处理电路接收一系列数据样本，包括：均衡器电路和数据检测器电路。 均衡器电路接收一系列数据样本并提供均衡的输出。 均衡器电路至少部分地由系数控制。 数据检测器电路接收均衡器输出并且至少部分地基于目标提供主数据输出。 自适应设置确定电路接收一系列数据样本和主数据输出，并与主数据处理电路并行操作，以自适应地确定系数和目标。

公开(公告)号：US08516348B2

公开(公告)日：2013-08-20

申请号：US13495922

申请日：2012-06-13

申请人： Weijun Tan ,  Hongwei Song ,  Shaohua Yang

发明人： Weijun Tan ,  Hongwei Song ,  Shaohua Yang

IPC分类号： H03M13/00

CPC分类号： G11B5/09 ,  G11B20/10009 ,  G11B20/10046 ,  G11B20/10055 ,  H03M13/3905

摘要： Various embodiments of the present invention provide systems and methods for detecting storage medium defects. As one example, a media defect detection system is disclosed that includes a data detector circuit that applies a detection algorithm to the data input and provides a hard output and a soft output. A first circuit combines a first derivative of the hard output with a derivative of the data input to yield a first combined signal. A second circuit combines a second derivative of the hard output with a derivative of the first combined signal to yield a second combined signal. A third circuit combines a derivative of the soft output with the second combined signal and a threshold value to yield a defect signal.

摘要翻译： 本发明的各种实施例提供了用于检测存储介质缺陷的系统和方法。 作为一个示例，公开了一种媒体缺陷检测系统，其包括将检测算法应用于数据输入并提供硬输出和软输出的数据检测器电路。 第一电路将硬输出的一阶导数与数据输入的导数组合以产生第一组合信号。 第二电路将硬输出的二阶导数与第一组合信号的导数组合以产生第二组合信号。 第三电路将软输出的导数与第二组合信号和阈值组合以产生缺陷信号。

公开(公告)号：US08441752B1

公开(公告)日：2013-05-14

申请号：US11844090

申请日：2007-08-23

申请人： Hongwei Song ,  Zining Wu ,  Toai Doan

发明人： Hongwei Song ,  Zining Wu ,  Toai Doan

IPC分类号： G11B5/09

CPC分类号： G11B20/10277 ,  G11B20/10462 ,  G11B2220/2516

摘要： A receiving device may be configured to derive an oversampled dibit pulse response estimate using symbols sampled at substantially the read channel symbol rate of the receiving device. The receiving device may include a data acquisition circuit configured to digitize data derived from a memory medium, as well as a dibit pulse estimation circuit configured to estimate the oversampled dibit pulse response using symbols sampled at the read channel rate of the receiving device.

摘要翻译： 接收设备可以被配置为使用在接收设备的基本读取的信道符号率处采样的符号来导出过采样的双位脉冲响应估计。 接收装置可以包括数据获取电路，其被配置为数字化从存储介质导出的数据，以及双向脉冲估计电路，其被配置为使用在接收装置的读取信道速率采样的符号来估计过采样的双脉冲响应。

公开(公告)号：US08422609B2

公开(公告)日：2013-04-16

申请号：US12570326

申请日：2009-09-30

申请人： Jingfeng Liu ,  Haotian Zhang ,  Hongwei Song ,  Lingyan Sun

发明人： Jingfeng Liu ,  Haotian Zhang ,  Hongwei Song ,  Lingyan Sun

IPC分类号： H04B1/10

CPC分类号： G11B20/10009 ,  G11B20/10046 ,  G11B20/10055 ,  G11B20/10481 ,  H03H17/0294

摘要： In one embodiment, a (hard-drive) read channel has a (DFIR equalization) filter, whose tap coefficients are adaptively updated. A reset controller monitors an (LLR) signal generated downstream of the filter to automatically determine when to reset the filter, e.g., by reloading an initial set of user-specified tap coefficients. For LLR values, the reset controller determines to reset the filter when the reset controller detects that too many recent LLR values have confidence values that are too low. When implemented in a hard-drive read channel, the reset controller can reset the filter one or more times during read operations within a sector of the hard drive.

摘要翻译： 在一个实施例中，（硬盘驱动器）读通道具有（DFIR均衡）滤波器，其抽头系数被自适应地更新。 复位控制器监视在滤波器下游产生的（LLR）信号，以自动确定何时复位滤波器，例如通过重新加载用户指定的抽头系数的初始集合。 对于LLR值，当复位控制器检测到过多的近期LLR值具有太低的置信度值时，复位控制器确定复位滤波器。 当在硬盘驱动器读取通道中实现时，复位控制器可以在硬盘驱动器的扇区内的读取操作期间复位一次或多次过滤器。

公开(公告)号：US08416520B1

公开(公告)日：2013-04-09

申请号：US13453567

申请日：2012-04-23

申请人： Hongwei Song

发明人： Hongwei Song

IPC分类号： G11B5/035

CPC分类号： G11B20/10009 ,  G11B5/035 ,  G11B5/09 ,  G11B20/10046 ,  G11B20/10296 ,  G11B20/24 ,  G11B2220/2516 ,  G11B2220/2562

摘要： Devices, systems, and techniques for equalization and detection include, in at least some implementations, first circuitry configured to produce first equalized data responsive to input data by reducing a first characteristic of the input data wherein the first characteristic is noise, inter symbol interference (ISI) or both, a first detector that produces first output data responsive to the first equalized data, second circuitry configured to reduce a second characteristic different from the first characteristic to produce second equalized data, the second equalized data being generated based on the first equalized data, and a second detector that produces second output data responsive to the second equalized data.

摘要翻译： 用于均衡和检测的装置，系统和技术包括在至少一些实施方式中，第一电路被配置为通过减少输入数据的第一特性来产生第一均衡数据，所述第一特性是噪声，符号间干扰（ ISI）或两者，第一检测器，其响应于所述第一均衡数据产生第一输出数据;第二电路，被配置为减少与所述第一特性不同的第二特性以产生第二均衡数据，所述第二均衡数据基于所述第一均衡数据生成 数据和第二检测器，其响应于第二均衡数据产生第二输出数据。

公开(公告)号：US08358480B1

公开(公告)日：2013-01-22

申请号：US13176318

申请日：2011-07-05

申请人： Hongwei Song ,  Ke Han ,  Michael Madden ,  Zining Wu

发明人： Hongwei Song ,  Ke Han ,  Michael Madden ,  Zining Wu

IPC分类号： G11B5/09

CPC分类号： G11B20/18 ,  G11B20/10009 ,  G11B20/10222 ,  G11B20/1037 ,  G11B20/10462 ,  G11B20/10509 ,  G11B2220/2516

摘要： A system for identifying and compensating for non-linear transition shift in a magnetic medium data storage device is disclosed. The non-linear transition shift compensation system includes a non-linear transition shift estimation module adapted to generate non-linear transition shift estimates for specific bit patterns. The system further includes a pre-compensation module adapted to adjust the temporal spacing of binary transitions written to the magnetic medium based on the non-linear transition shift estimates generated by the non-linear transition shift estimation module for specific bit patterns corresponding to bit patterns appearing in the data being written to the magnetic medium.

摘要翻译： 公开了一种用于识别和补偿磁介质数据存储装置中的非线性跃迁的系统。 非线性跃迁偏移补偿系统包括适于产生特定比特模式的非线性跃迁偏移估计的非线性跃迁偏移估计模块。 该系统还包括预补偿模块，其适于基于由非线性跃迁偏移估计模块针对与位模式对应的特定比特模式生成的非线性跃迁移位估计来调整写入到磁介质的二进制转换的时间间隔 出现在写入磁介质的数据中。