公开(公告)号：US6107206A

公开(公告)日：2000-08-22

申请号：US152350

申请日：1998-09-14

申请人： Li-Chih Chao ,  Chao-Cheng Chen

发明人： Li-Chih Chao ,  Chao-Cheng Chen

IPC分类号： H01L21/3065 ,  H01L21/762 ,  H01L21/302 ,  H01L21/461

CPC分类号： H01L21/3065 ,  H01L21/76232

摘要： A method of etching closely spaced trenches in a silicon body wherein a masked silicon body is introduced into a plasma etching apparatus. An object having an exposed silicon surface that is consumable by a plasma environment is provided in the apparatus. A reactive plasma environment is established in the apparatus which removes silicon from the body and the silicon object. The additional silicon from the object in the plasma influences the silicon removal from the body to thereby provide tapered trench side walls.

摘要翻译： 在硅体中蚀刻紧密间隔的沟槽的方法，其中将掩模的硅体引入等离子体蚀刻装置中。 在该装置中设置有具有由等离子体环境消耗的暴露的硅表面的物体。 在从身体和硅物体中去除硅的装置中建立了反应等离子体环境。 来自等离子体中的物体的附加硅影响硅体从硅体移除，从而提供锥形的沟槽侧壁。

公开(公告)号：US5970376A

公开(公告)日：1999-10-19

申请号：US999075

申请日：1997-12-29

申请人： Chao-Cheng Chen

发明人： Chao-Cheng Chen

IPC分类号： H01L21/311 ,  H01L21/4763

CPC分类号： H01L21/02063 ,  H01L21/31116 ,  H01L21/31138 ,  Y10S438/963

摘要： A method for forming a via through a dielectric layer within a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate a low dielectric constant dielectric layer, where the low dielectric constant dielectric layer is formed from a silsesquioxane spin-on-glass (SOG) dielectric material. There is then formed over the low dielectric constant dielectric layer a patterned photoresist layer. There is then etched through use of a fluorine containing plasma etch method while employing the patterned photoresist layer as a photoresist etch mask layer the low dielectric constant dielectric layer to form a patterned low dielectric constant dielectric layer having a via formed therethrough. The fluorine containing plasma etch method employing a fluorine containing etchant gas composition which simultaneously forms a fluorocarbon polymer residue layer upon a sidewall of the via. There is then treated through use of a plasma treatment method the fluorocarbon polymer residue layer to form a plasma treated fluorocarbon polymer residue layer. The plasma treated fluorocarbon polymer residue layer is susceptible, in comparison with the fluorocarbon polymer residue layer, to being stripped from the sidewall of the via through an oxygen containing plasma stripping method employed in stripping from the microelectronics fabrication the patterned photoresist layer with attenuated lateral etching of the patterned low dielectric constant dielectric layer. Finally, there is then stripping through use of the oxygen containing plasma stripping method the patterned photoresist layer from over patterned low dielectric constant dielectric layer and the plasma treated fluorocarbon polymer residue layer from upon the sidewall of the via.

摘要翻译： 在微电子学制造中通过介电层形成通孔的方法。 首先提供了在微电子制造中使用的衬底。 然后在衬底上形成低介电常数介电层，其中低介电常数电介质层由倍半硅氧烷旋涂玻璃（SOG）介电材料形成。 然后在低介电常数电介质层上形成图案化的光致抗蚀剂层。 然后通过使用含氟等离子体蚀刻方法蚀刻，同时使用图案化的光致抗蚀剂层作为光致抗蚀剂蚀刻掩模层的低介电常数介电层，以形成具有穿过其中形成的通孔的图案化的低介电常数介电层。 含氟等离子体蚀刻方法使用含氟蚀刻剂气体组合物，其同时在通孔的侧壁上形成氟碳聚合物残余层。 然后通过使用等离子体处理方法处理氟碳聚合物残余层以形成等离子体处理的氟碳聚合物残渣层。 等离子体处理的碳氟化合物聚合物残余层与氟碳聚合物残余物层相比，通过用于从微电子学制造中剥离的含氧等离子体剥离方法从通孔的侧壁剥离，使得具有衰减的横向蚀刻 的图案化低介电常数介电层。 最后，然后通过使用含氧等离子体剥离方法从图案化的低介电常数电介质层和经过该侧壁的等离子体处理的碳氟化合物残余物层剥离图案化的光致抗蚀剂层。

公开(公告)号：US20230015410A1

公开(公告)日：2023-01-19

申请号：US17455033

申请日：2021-11-16

申请人： Chao-Cheng Chen

发明人： Chao-Cheng Chen

IPC分类号： A61K31/716 ,  A61K9/70 ,  A61K35/74 ,  A61P1/04

摘要： Provided is a method of preventing or treating gastroesophageal reflux disease, including administering to an subject in need thereof a composition including a plurality of fibers formed of β-1-4-glucan, wherein the fibers have a diameter between 15 nm and 35 nm and a mean length of between 1.5 μm and 3.5 μm.

公开(公告)号：US20220284685A1

公开(公告)日：2022-09-08

申请号：US17674004

申请日：2022-02-17

申请人： Chao-Cheng Chen ,  Chao-Yu Chen

发明人： Chao-Cheng Chen ,  Chao-Yu Chen

IPC分类号： G06T19/20 ,  G06T7/00 ,  G06T7/10

摘要： In many applications, the assessment of the internal structures of tubular structures (such as in medical imaging, blood vessels, bronchi, and colon) has become a topic of high interest. Many 3D visualization techniques, such as “fly-through” and curved planar reformation (CPR), have been used for visualization of the lumens for medical applications. However, all the existing visualization techniques generate highly distorted images of real objects. This invention provides direct manipulation based on the centerline of the object and visualization of the 3D internal structures of a tubular object without any noticeable distortion. For the first time ever, the lumens of a human colon is visualized as it is in reality. In many medical applications, this can be used for diagnosis, planning of surgery or stent placements, etc. and consequently improves the quality of healthcare significantly. The same technique can be used in many other applications.

公开(公告)号：US09287179B2

公开(公告)日：2016-03-15

申请号：US13353975

申请日：2012-01-19

申请人： Yuan-Sheng Huang ,  Tzu-Yen Hsieh ,  Ming-Ching Chang ,  Chao-Cheng Chen ,  Chia-Jen Chen

发明人： Yuan-Sheng Huang ,  Tzu-Yen Hsieh ,  Ming-Ching Chang ,  Chao-Cheng Chen ,  Chia-Jen Chen

IPC分类号： H01L29/78 ,  H01L21/8238 ,  H01L29/66 ,  H01L27/092

CPC分类号： H01L29/66545 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823828 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/66795 ,  H01L29/785

摘要： The present disclosure involves a FinFET. The FinFET includes a fin structure formed over a substrate. A gate dielectric layer is least partially wrapped around a segment of the fin structure. The gate dielectric layer contains a high-k gate dielectric material. The FinFET includes a polysilicon layer conformally formed on the gate dielectric layer. The FinFET includes a metal gate electrode layer formed over the polysilicon layer. The present disclosure provides a method of fabricating a FinFET. The method includes providing a fin structure containing a semiconductor material. The method includes forming a gate dielectric layer over the fin structure, the gate dielectric layer being at least partially wrapped around the fin structure. The method includes forming a polysilicon layer over the gate dielectric layer, wherein the polysilicon layer is formed in a conformal manner. The method includes forming a dummy gate layer over the polysilicon layer.

摘要翻译： 本公开涉及FinFET。 FinFET包括在衬底上形成的翅片结构。 栅介质层最少部分地缠绕在翅片结构的一段上。 栅介质层包含高k栅介质材料。 FinFET包括在栅介质层上共形形成的多晶硅层。 FinFET包括在多晶硅层上形成的金属栅极电极层。 本公开提供了制造FinFET的方法。 该方法包括提供包含半导体材料的翅片结构。 该方法包括在鳍结构上方形成栅极电介质层，栅介质层至少部分地围绕翅片结构缠绕。 该方法包括在栅介质层上形成多晶硅层，其中多晶硅层以保形方式形成。 该方法包括在多晶硅层上形成伪栅极层。

公开(公告)号：US09054130B2

公开(公告)日：2015-06-09

申请号：US12841763

申请日：2010-07-22

申请人： Eric Peng ,  Chao-Cheng Chen ,  Ming-Hua Yu ,  Ying Hao Hsieh ,  Tze-Liang Lee ,  Chii-Horng Li ,  Syun-Ming Jang ,  Shih-Hao Lo

发明人： Eric Peng ,  Chao-Cheng Chen ,  Ming-Hua Yu ,  Ying Hao Hsieh ,  Tze-Liang Lee ,  Chii-Horng Li ,  Syun-Ming Jang ,  Shih-Hao Lo

IPC分类号： H01L21/302 ,  H01L29/66 ,  H01L21/306 ,  H01L21/3065 ,  H01L29/165

CPC分类号： H01L29/7848 ,  H01L21/30608 ,  H01L21/3065 ,  H01L29/165 ,  H01L29/66636

摘要： The present disclosure provides a method for fabricating a semiconductor device that includes providing a silicon substrate, forming a gate stack over the silicon substrate, performing a biased dry etching process to the substrate to remove a portion of the silicon substrate, thereby forming a recess region in the silicon substrate, performing a non-biased etching process to the recess region in the silicon substrate, thereby forming a bottle-neck shaped recess region in the silicon substrate, and epi-growing a semiconductor material in the bottle-neck shaped recess region in the silicon substrate. An embodiment may include a biased dry etching process including adding HeO2 gas and HBr gas. An embodiment may include performing a first biased dry etching process including N2 gas and performing a second biased dry etching process not including N2 gas. An embodiment may include performing an oxidation process to the recess region in the silicon substrate by adding oxygen gas to form silicon oxide on a portion of the recess region in the silicon substrate. As such, these processes form polymer protection to help form the bottle-neck shaped recess.

摘要翻译： 本公开提供了一种制造半导体器件的方法，其包括提供硅衬底，在硅衬底上形成栅极堆叠，对衬底执行偏置的干蚀刻工艺以去除硅衬底的一部分，从而形成凹陷区域 在硅衬底中，对硅衬底中的凹陷区域进行非偏置蚀刻工艺，从而在硅衬底中形成瓶颈形凹部区域，并且在瓶颈形凹部区域中生长半导体材料 在硅衬底中。 一个实施例可以包括偏置的干蚀刻工艺，包括加入HeO2气体和HBr气体。 实施例可以包括执行包括N 2气体的第一偏压干法蚀刻工艺，并执行不包括N 2气体的第二偏压干式蚀刻工艺。 一个实施例可以包括通过在硅衬底中的一部分凹陷区域上添加氧气以形成氧化硅，来对硅衬底中的凹陷区域进行氧化处理。 因此，这些方法形成聚合物保护以帮助形成瓶颈形凹部。

公开(公告)号：US08765556B2

公开(公告)日：2014-07-01

申请号：US12645834

申请日：2009-12-23

申请人： Yu-Rung Hsu ,  Chen-Hua Yu ,  Chao-Cheng Chen ,  Ming-Huan Tsai ,  Hsien-Hsin Lin ,  Hsueh-Chang Sung

发明人： Yu-Rung Hsu ,  Chen-Hua Yu ,  Chao-Cheng Chen ,  Ming-Huan Tsai ,  Hsien-Hsin Lin ,  Hsueh-Chang Sung

IPC分类号： H01L21/336

CPC分类号： H01L29/7848 ,  H01L21/30608 ,  H01L21/3065 ,  H01L21/3083 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834

摘要： The present disclosure provides a semiconductor device that includes a semiconductor substrate, a gate structure disposed on a portion of the substrate, and strained structures disposed at either side of the portion of the substrate and formed of a semiconductor material different from the semiconductor substrate. The portion of the substrate is T shaped having a horizontal region and a vertical region that extends from the horizontal region in a direction away from a surface of the substrate.

摘要翻译： 本公开提供了一种半导体器件，其包括半导体衬底，设置在衬底的一部分上的栅极结构以及设置在衬底的该部分的任一侧的应变结构，并且由与半导体衬底不同的半导体材料形成。 衬底的部分是具有水平区域的垂直区域和从远离衬底表面的方向从水平区域延伸的垂直区域。

公开(公告)号：US20130273711A1

公开(公告)日：2013-10-17

申请号：US13449118

申请日：2012-04-17

申请人： Chia-Chu Liu ,  Kuei-Shun Chen ,  Chih-Hsiung Peng ,  Chi-Kang Chang ,  Chiang Mu-Chi ,  Sheng-Yu Chang ,  Hua Feng Chen ,  Chao-Cheng Chen ,  Ryan Chia-Jen Chen

发明人： Chia-Chu Liu ,  Kuei-Shun Chen ,  Chih-Hsiung Peng ,  Chi-Kang Chang ,  Chiang Mu-Chi ,  Sheng-Yu Chang ,  Hua Feng Chen ,  Chao-Cheng Chen ,  Ryan Chia-Jen Chen

IPC分类号： H01L21/762

CPC分类号： H01L21/3086 ,  H01L21/76224

摘要： A method for fabricating a device is disclosed. An exemplary method includes providing a substrate and forming a plurality of fins over the substrate. The method further includes forming a first opening in the substrate in a first longitudinal direction. The method further includes forming a second opening in the substrate in a second longitudinal direction. The first and second longitudinal directions are different. The method further includes depositing a filling material in the first and second openings.

摘要翻译： 公开了一种制造装置的方法。 一种示例性的方法包括提供衬底并在衬底上形成多个鳍。 该方法还包括在第一纵向方向上在基板中形成第一开口。 该方法还包括在第二纵向方向上在基板中形成第二开口。 第一和第二纵向是不同的。 该方法还包括在第一和第二开口中沉积填充材料。

公开(公告)号：US20130047101A1

公开(公告)日：2013-02-21

申请号：US13586856

申请日：2012-08-15

申请人： Lih-Shyang Chen ,  Chih-Ching Yang ,  Chao-Cheng Chen ,  Chao-Yu Chen

发明人： Lih-Shyang Chen ,  Chih-Ching Yang ,  Chao-Cheng Chen ,  Chao-Yu Chen

IPC分类号： G06F3/01

CPC分类号： G06F3/0482 ,  G06F8/38

摘要： A personal service menu construction system is provided for an application software to construct a homemade function menu, including: a selection module for setting required function options from a plurality of function options of the application software; an integration module for receiving the function options set by the selection module such that the function options set by the selection module are edited or packaged and integrated as a personal service menu; and a construction module for inputting the personal service menu to the application software. A personal service menu provision method is provided such that the personal service menu can be saved in a storage device and inputted to the same application software of another electronic device.

摘要翻译： 提供个人服务菜单构建系统，用于应用软件构建自制功能菜单，包括：选择模块，用于根据应用软件的多个功能选项设置所需的功能选项; 集成模块，用于接收由选择模块设置的功能选项，使得由选择模块设置的功能选项被编辑或打包并集成为个人服务菜单; 以及用于将个人服务菜单输入到应用软件的构建模块。 提供个人服务菜单提供方法，使得个人服务菜单可以保存在存储设备中并输入到另一电子设备的相同应用软件。

公开(公告)号：US20120108046A1

公开(公告)日：2012-05-03

申请号：US13281862

申请日：2011-10-26

申请人： Yu Chao Lin ,  Ming-Ching Chang ,  Yih-Ann Lin ,  Ryan Chia-Jen Chen ,  Chao-Cheng Chen

发明人： Yu Chao Lin ,  Ming-Ching Chang ,  Yih-Ann Lin ,  Ryan Chia-Jen Chen ,  Chao-Cheng Chen

IPC分类号： H01L21/28 ,  H01L21/308

CPC分类号： H01L21/32139 ,  H01L21/0276 ,  H01L21/28194 ,  H01L21/31122 ,  H01L21/31138 ,  H01L21/823437 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

摘要： The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a patternable layer over a substrate. The method includes forming a first layer over the patternable layer. The method includes forming a second layer over the first layer. The second layer is substantially thinner than the first layer. The method includes patterning the second layer with a photoresist material through a first etching process to form a patterned second layer. The method includes patterning the first layer with the patterned second layer through a second etching process to form a patterned first layer. The first and second layers have substantially different etching rates during the second etching process. The method includes patterning the patternable layer with the patterned first layer through a third etching process.

摘要翻译： 本公开提供了制造半导体器件的方法。 该方法包括在衬底上形成可图案化层。 该方法包括在可图案层上形成第一层。 该方法包括在第一层上形成第二层。 第二层比第一层薄得多。 该方法包括通过第一蚀刻工艺用光致抗蚀剂材料图案化第二层以形成图案化的第二层。 该方法包括通过第二蚀刻工艺将具有图案化的第二层的第一层图案化以形成图案化的第一层。 第一和第二层在第二蚀刻工艺期间具有显着不同的蚀刻速率。 该方法包括通过第三蚀刻工艺对具有图案化的第一层的图案化层进行图案化。