公开(公告)号：US20060007366A1

公开(公告)日：2006-01-12

申请号：US11153331

申请日：2005-06-16

申请人： Hiroshi Gotoh ,  Toshihiro Kugimiya ,  Katsufumi Tomihisa ,  Junichi Nakai

发明人： Hiroshi Gotoh ,  Toshihiro Kugimiya ,  Katsufumi Tomihisa ,  Junichi Nakai

IPC分类号： G02F1/136

CPC分类号： G02F1/136227 ,  G02F1/1368

摘要： A display device and a method for production thereof. The display device comprises a substrate, thin film transistors and a transparent conductive film which are formed on the substrate, and an aluminum alloy film which electrically connects the thin film transistors to the transparent conductive film, such that there exists an oxide film of said aluminum alloy at the interface between said aluminum alloy film and said transparent conductive film, said oxide film having a thickness of 1 to 10 nm and containing oxygen in an amount no more than 44 atom %. The display device has the aluminum alloy film and the transparent conducive film in direct contact with each other, obviating the necessity of barrier metal between them.

摘要翻译： 一种显示装置及其制造方法。 显示装置包括形成在基板上的基板，薄膜晶体管和透明导电膜，以及将薄膜晶体管与透明导电膜电连接的铝合金膜，使得存在所述铝的氧化物膜 合金在所述铝合金膜和所述透明导电膜之间的界面处，所述氧化物膜具有1至10nm的厚度并且含有不超过44原子％的氧。 显示装置具有铝合金膜和透明导电膜彼此直接接触，从而避免了它们之间的屏障金属的需要。

公开(公告)号：US10365520B2

公开(公告)日：2019-07-30

申请号：US14241600

申请日：2012-09-03

申请人： Hiroyuki Okuno ,  Toshihiro Kugimiya

发明人： Hiroyuki Okuno ,  Toshihiro Kugimiya

IPC分类号： H01L23/532 ,  G02F1/1343 ,  C22C21/00 ,  H01J31/12 ,  H01J11/46 ,  H01L27/12 ,  B32B15/01 ,  C23C14/06 ,  H01L21/48 ,  G02F1/1362 ,  C23C14/00 ,  C23C14/02 ,  C22C14/00 ,  C22C27/02 ,  C22C27/04

摘要： Provided is a wiring structure for display device which does not generate hillocks even when exposed to high temperatures at levels around 450 to 600° C., has excellent high-temperature heat resistance, keeps electrical resistance (wiring resistance) of the entire wiring structure low, and further has excellent resistance to hydrofluoric acid. This wiring structure for a display device comprises a structure in which are laminated, in order from the substrate side, a first layer of an Al alloy that contains at least one chemical element selected from the group (group X) consisting of Ta, Nb, Re, Zr, W, Mo, V, Hf, Ti, Cr, and Pt and contains at least one rare earth element, and a second layer of an Al alloy nitride, or a nitride of at least one chemical element selected from the group Y consisted of Ti, Mo, Al, Ta, Nb, Re, Zr, W, V, Hf, and Cr.

公开(公告)号：US09305470B2

公开(公告)日：2016-04-05

申请号：US13810949

申请日：2011-07-21

申请人： Aya Miki ,  Toshihiro Kugimiya ,  Yasuaki Terao

发明人： Aya Miki ,  Toshihiro Kugimiya ,  Yasuaki Terao

IPC分类号： B32B17/06 ,  B32B15/04 ,  G09F9/30 ,  C22C9/00 ,  C22C9/01 ,  C22C9/04 ,  C22C9/05 ,  C22C9/06 ,  C22F1/08 ,  H01L21/285 ,  H01L21/3205 ,  H01L23/532 ,  H01L29/45 ,  H01L29/49 ,  G02F1/1362 ,  C23C28/00 ,  H01L27/12 ,  C23C14/18 ,  H01L27/32 ,  H01L29/786

CPC分类号： G09F9/30 ,  C22C9/00 ,  C22C9/01 ,  C22C9/04 ,  C22C9/05 ,  C22C9/06 ,  C22F1/08 ,  C23C14/185 ,  C23C28/321 ,  C23C28/322 ,  C23C28/345 ,  G02F1/136286 ,  G02F2001/136295 ,  H01L21/2855 ,  H01L21/32051 ,  H01L23/53233 ,  H01L23/53238 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/3279 ,  H01L29/45 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/78669 ,  H01L29/7869 ,  H01L2924/0002 ,  Y10T428/12535 ,  Y10T428/12611 ,  H01L2924/00

摘要： The present invention provides a display device which is provided with a Cu alloy film having high adhesion to an oxygen-containing insulator layer and a low electrical resistivity. The present invention relates to a Cu alloy film for a display device, said film having a stacked structure including a first layer (Y) composed of a Cu alloy containing, in total, 1.2-20 atm % of at least one element selected from among a group composed of Zn, Ni, Ti, Al, Mg, Ca, W, Nb and Mn, and a second layer (X) composed of pure Cu or a Cu alloy having Cu as a main component and an electrical resistivity lower than that of the first layer (Y). A part of or the whole first layer (Y) is directly in contact with an oxygen-containing insulator layer (27), and in the case where the first layer (Y) contains Zn or Ni, the thickness of the first layer (Y) is 10-100 nm, and in the case where the first layer (Y) does not contain Zn and Ni, the thickness of the first layer (Y) is 12-100 nm. The present invention also relates to a display device having the Cu alloy film.

摘要翻译： 本发明提供一种显示装置，其具有与含氧绝缘体层具有高粘附性和低电阻率的Cu合金膜。 本发明涉及一种用于显示装置的Cu合金膜，所述膜具有堆叠结构，该层叠结构包括由Cu合金构成的第一层（Y），其中总共含有1.2-20atm％的至少一种选自 由Zn，Ni，Ti，Al，Mg，Ca，W，Nb和Mn组成的组以及以Cu为主要成分的纯Cu或Cu合金构成的第二层（X），电阻率低于Cu 的第一层（Y）。 一部分或全部第一层（Y）与含氧绝缘体层（27）直接接触，在第一层（Y）含有Zn或Ni的情况下，第一层（Y ）为10〜100nm，在第一层（Y）不含有Zn和Ni的情况下，第一层（Y）的厚度为12〜100nm。 本发明还涉及具有Cu合金膜的显示装置。

公开(公告)号：US09190523B2

公开(公告)日：2015-11-17

申请号：US13554393

申请日：2012-07-20

申请人： Byung Du Ahn ,  Je Hun Lee ,  Sei-Yong Park ,  Jun Hyun Park ,  Gun Hee Kim ,  Ji Hun Lim ,  Jae Woo Park ,  Jin Seong Park ,  Toshihiro Kugimiya ,  Aya Miki ,  Shinya Morita ,  Tomoya Kishi ,  Hiroaki Tao

发明人： Byung Du Ahn ,  Je Hun Lee ,  Sei-Yong Park ,  Jun Hyun Park ,  Gun Hee Kim ,  Ji Hun Lim ,  Jae Woo Park ,  Jin Seong Park ,  Toshihiro Kugimiya ,  Aya Miki ,  Shinya Morita ,  Tomoya Kishi ,  Hiroaki Tao

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L29/66 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L21/02565 ,  H01L27/1225 ,  H01L29/66969

摘要： An oxide semiconductor includes a first material including at least one selected from the group consisting of zinc (Zn) and tin (Sn), and a second material, where a value acquired by subtracting an electronegativity difference value between the second material and oxygen (O) from the electronegativity difference value between the first material and oxygen (O) is less than about 1.3.

摘要翻译： 氧化物半导体包括包含选自锌（Zn）和锡（Sn）中的至少一种的第一材料和第二材料，其中通过减去第二材料和氧之间的电负性差值获得的值（O ）从第一材料和氧（O）之间的电负性差值小于约1.3。

公开(公告)号：US09184298B2

公开(公告)日：2015-11-10

申请号：US13991247

申请日：2011-12-01

申请人： Shinya Morita ,  Aya Miki ,  Satoshi Yasuno ,  Toshihiro Kugimiya

发明人： Shinya Morita ,  Aya Miki ,  Satoshi Yasuno ,  Toshihiro Kugimiya

IPC分类号： H01L27/14 ,  H01L29/786 ,  C23C14/08 ,  H01L21/02 ,  C23C14/14 ,  C23C14/34

CPC分类号： H01L29/7869 ,  C23C14/086 ,  C23C14/14 ,  C23C14/34 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02573 ,  H01L21/02581 ,  H01L21/02614 ,  H01L21/02631 ,  H01L29/78693

摘要： The interconnect structure of the present invention includes at least a gate insulator layer and an oxide semiconductor layer on a substrate, wherein the oxide semiconductor layer is a layered product having a first oxide semiconductor layer containing at least one element (Z group element) selected from the group consisting of In, Ga, Zn and Sn; and a second oxide semiconductor layer containing at least one element (X group element) selected from the group consisting of In, Ga, Zn and Sn and at least one element (Y group element) selected from the group consisting of Al, Si, Ti, Hf, Ta, Ge, W and Ni, and wherein the second oxide semiconductor layer is interposed between the first oxide semiconductor layer and the gate insulator layer. The present invention makes it possible to obtain an interconnect structure having excellent switching characteristics and high stress resistance, and in particular, showing a small variation of threshold voltage before and after the stress tests, and thereby having high stability.

摘要翻译： 本发明的互连结构在基板上至少包括栅极绝缘体层和氧化物半导体层，其中氧化物半导体层是具有第一氧化物半导体层的层叠体，所述第一氧化物半导体层含有至少一种选自以下的元素（Z族元素） 由In，Ga，Zn和Sn组成的组; 和包含选自In，Ga，Zn和Sn中的至少一种元素（X族元素）的第二氧化物半导体层和选自Al，Si，Ti中的至少一种元素（Y族元素） ，Hf，Ta，Ge，W和Ni，并且其中所述第二氧化物半导体层插入在所述第一氧化物半导体层和所述栅极绝缘体层之间。 本发明使得可以获得具有优异的开关特性和高应力阻力的互连结构，特别是在应力测试之前和之后显示出小的阈值电压变化，从而具有高稳定性。

公开(公告)号：US09093542B2

公开(公告)日：2015-07-28

申请号：US14113322

申请日：2012-04-19

申请人： Takeaki Maeda ,  Toshihiro Kugimiya ,  Jun Ho Song ,  Je Hun Lee ,  Byung Du Ahn ,  Gun Hee Kim

发明人： Takeaki Maeda ,  Toshihiro Kugimiya ,  Jun Ho Song ,  Je Hun Lee ,  Byung Du Ahn ,  Gun Hee Kim

IPC分类号： H01L29/10 ,  H01L29/786 ,  G02F1/1368 ,  H01L27/12

CPC分类号： H01L29/7869 ,  G02F1/1368 ,  H01L27/1222 ,  H01L29/78693

摘要： There is provided an oxide semiconductor layer capable of making stable the electric characteristics of a thin-film transistor without requiring an oxidatively-treated layer when depositing a passivation layer or the like in display devices such as organic EL displays and liquid crystal displays. The thin-film transistor structure of the present invention at least having, on a substrate, an oxide semiconductor layer, a source-drain electrode, and a passivation layer in order from the substrate side, wherein the oxide semiconductor layer is a stacked product of a first oxide semiconductor layer and a second oxide semiconductor layer; the first oxide semiconductor layer has a Zn content of 50 atomic % or more as a percentage of all metal elements contained therein, and the first oxide semiconductor layer is formed on the source-drain electrode and passivation layer side; the second oxide semiconductor layer contains Sn and at least one element selected from the group consisting of In, Ga, and Zn, and the second oxide semiconductor layer is formed on the substrate side; and the first oxide semiconductor layer is in direct contact both with the source-drain electrode and with the passivation layer.

摘要翻译： 提供了一种氧化物半导体层，当在有机EL显示器和液晶显示器等显示装置中沉积钝化层等时，能够使薄膜晶体管的电特性稳定，而不需要氧化处理层。 本发明的薄膜晶体管结构至少在衬底上具有氧化物半导体层，源 - 漏电极和钝化层，从衬底侧开始，其中氧化物半导体层是 第一氧化物半导体层和第二氧化物半导体层; 第一氧化物半导体层的Zn含量占所有金属元素的百分比为50原子％以上，第一氧化物半导体层形成在源 - 漏电极和钝化层侧; 所述第二氧化物半导体层含有Sn和选自In，Ga和Zn中的至少一种元素，并且所述第二氧化物半导体层形成在所述基板侧; 并且第一氧化物半导体层与源 - 漏电极和钝化层直接接触。

公开(公告)号：US09024322B2

公开(公告)日：2015-05-05

申请号：US14116935

申请日：2012-03-12

申请人： Aya Miki ,  Toshihiro Kugimiya

发明人： Aya Miki ,  Toshihiro Kugimiya

IPC分类号： H01L29/04 ,  H01L27/12 ,  H01L29/45 ,  H01L29/786 ,  H01L29/49

CPC分类号： H01L27/124 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/7869

摘要： Provided is a technique that allows oxidation of Cu wires to be effectively prevented during plasma processing when forming a passivation film for a display device that utilizes an oxide semiconductor layer. This wiring structure comprises a semiconductor layer (oxide semiconductor) for a thin film transistor, a Cu alloy film (laminated structure comprising a first layer (X) and a second layer (Z)), and a passivation film that are formed on a substrate, starting from the substrate side. The first layer (X) is made of an element that exhibits low electrical resistivity, such as pure Cu; and the second layer contains a plasma-oxidation-resistance improving element. The second layer (Z) is directly connected, at least partially, to the passivation film.

摘要翻译： 提供一种技术，当形成利用氧化物半导体层的显示装置的钝化膜时，允许在等离子体处理期间有效地防止Cu线的氧化。 该布线结构包括用于薄膜晶体管的半导体层（氧化物半导体），Cu合金膜（包括第一层（X）和第二层（Z）的层压结构））和形成在衬底上的钝化膜 从基板侧开始。 第一层（X）由纯Cu表现出低电阻率的元素制成; 第二层含有抗氧化性改善元件。 至少部分地将第二层（Z）连接到钝化膜。

公开(公告)号：US08350303B2

公开(公告)日：2013-01-08

申请号：US13286284

申请日：2011-11-01

申请人： Hiroshi Gotoh ,  Toshihiro Kugimiya ,  Katsufumi Tomihisa

发明人： Hiroshi Gotoh ,  Toshihiro Kugimiya ,  Katsufumi Tomihisa

IPC分类号： H01L27/085

CPC分类号： H01L29/458 ,  G02F2001/136295 ,  H01L27/12 ,  H01L27/124 ,  H01L29/4908 ,  H01L2224/73204

摘要： A display device in which an Al alloy film and a conductive oxide film are directly connected without interposition of refractory metal and some or all of Al alloy components deposit or are concentrated at the interface of contact between the Al alloy film and the conductive oxide film. The Al alloy film contains 0.1 to 6 at % of at least one element selected from the group consisting of Ni, Ag, Zn, Cu and Ge, and further contains 1) 0.1 to 2 at % of at least one element selected from the group consisting of Mg, Cr, Mn, Ru, Rh, Pd, Ir, Pt, La, Ce, Pr, Gd, Tb, Sm, Eu, Ho, Er, Tm, Yb, Lu and Dy or 2) 0.1 to 1 at % of at least one element selected from the group consisting of Ti, V, Zr, Nb, Mo, Hf, Ta and W, as the alloy components.

公开(公告)号：US20090134393A1

公开(公告)日：2009-05-28

申请号：US12090883

申请日：2006-12-01

申请人： Hiroshi Gotoh ,  Toshihiro Kugimiya ,  Katsufumi Tomihisa

发明人： Hiroshi Gotoh ,  Toshihiro Kugimiya ,  Katsufumi Tomihisa

IPC分类号： H01L33/00

CPC分类号： H01L27/124 ,  G02F2001/136295 ,  H01L29/458 ,  H01L29/4908

摘要： A thin-film transistor substrate in which an aluminum alloy film composing a source/drain wiring is directly connected with a transparent electrode. The thin-film transistor substrate includes a gate wiring, and source wiring and drain wiring, the gate wiring and the source and drain wiring being arranged orthogonally to each other. The single-layer aluminum alloy film composing the gate wiring and the single-layer aluminum alloy film composing the source wiring and the drain wiring are the same in composition. Furthermore, display devices can be mounted with the above thin-film transistor substrates.

摘要翻译： 其中构成源极/漏极布线的铝合金膜与透明电极直接连接的薄膜晶体管基板。 薄膜晶体管基板包括栅极布线，源极布线和漏极布线，栅极布线和源极和漏极布线彼此正交布置。 构成栅极布线的单层铝合金膜和构成源极布线和漏极布线的单层铝合金膜的组成相同。 此外，显示装置可以安装有上述薄膜晶体管基板。

公开(公告)号：US20080223718A1

公开(公告)日：2008-09-18

申请号：US11931336

申请日：2007-10-31

申请人： Katsutoshi TAKAGI ,  Masaya Ehira ,  Toshihiro Kugimiya ,  Yoichiro Yoneda ,  Hiroshi Gotou

发明人： Katsutoshi TAKAGI ,  Masaya Ehira ,  Toshihiro Kugimiya ,  Yoichiro Yoneda ,  Hiroshi Gotou

IPC分类号： C23C14/00 ,  B21C1/00

CPC分类号： C23C14/3414 ,  C22C21/00 ,  Y10T428/12229

摘要： The present invention relates to an Al-based alloy sputtering target, comprising Ni in an amount of 0.05 to 10 atomic percent, wherein the Al-based alloy sputtering target satisfies: (1) that a ratio of a P value to a total area of a sputtering surface is 70% or more, wherein the P value indicates a total of area fractions of ±15°, ±15°, ±15° and ±15°; (2) that a ratio of the area fraction of ±15° to the P value is 30% or more; and (3) that a ratio of the area fraction of ±15° to the P value is 10% or less, when crystallographic orientations , , and in a normal line direction to a sputtering surface of the Al-based alloy sputtering target are observed in accordance with the electron backscatter diffraction pattern method.

摘要翻译： 本发明涉及一种Al系合金溅射靶，其特征在于，含有0.05〜10原子％的Ni，其中，所述Al系合金溅射靶满足：（1）P值与总面积的比值 溅射表面为70％以上，其中P值表示<001>±15°，<011>±15°，<111>±15°和±311±15°的面积分数的总和。 （2）<011>±15°的面积分数与P值的比例为30％以上; 和（3）当在正常线中的结晶取向<001>，<011>，<111>和<311>时，面积分数<111>±15°与P值的比例为10％以下 根据电子背散射衍射图法观察Al基合金溅射靶的溅射表面的方向。