公开(公告)号：US5559344A

公开(公告)日：1996-09-24

申请号：US8359

申请日：1993-01-22

申请人： Genshiro Kawachi

发明人： Genshiro Kawachi

IPC分类号： G02F1/1368 ,  H01L21/223 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/786 ,  H01L29/04

CPC分类号： H01L29/78696 ,  H01L21/2236 ,  H01L27/1214 ,  H01L29/66765 ,  G02F1/1368

摘要： A thin-film semiconductor device includes a plurality of thin-film semiconductor elements each having a gate electrode formed on a substrate, an insulating film formed on the gate electrode, a semiconductor film formed on the insulating film and doped with an n-type impurity, and source and drain electrodes formed on the semiconductor film and separated from each other, that region of the semiconductor film which corresponds to a gap between the source electrode and the drain electrode, being doped with a p-type impurity so that the p-type impurity concentration is equal to or greater than the n-type impurity concentration, to form an intrinsic layer, scanning-signal transmitting electrode lines each formed so as to connect the gate electrodes of some of the thin-film semiconductor elements, video-signal transmitting electrode lines each formed so as to connect the drain electrodes of some of the thin-film semiconductor elements, and pixel electrodes each connected to the source electrode of one of the thin-film semiconductor elements. Preferably, the n-type impurity concentration and p-type impurity concentration in that region of the semiconductor film which corresponds to a gap between the source electrode and the drain electrode, decrease exponentially with the depth from the surface of the region, to obtain a thin-film semiconductor device having excellent characteristics.

摘要翻译： 薄膜半导体器件包括多个薄膜半导体元件，每个薄膜半导体元件具有形成在基板上的栅电极，形成在栅电极上的绝缘膜，形成在绝缘膜上并掺杂有n型杂质的半导体膜 以及形成在半导体膜上并且彼此分离的源电极和漏电极，对应于源电极和漏电极之间的间隙的半导体膜的区域被掺杂有p型杂质， 型杂质浓度等于或大于n型杂质浓度，形成本征层，扫描信号传输电极线各自形成为连接一些薄膜半导体元件的栅电极，视频信号 每个形成为连接一些薄膜半导体元件的漏电极的发射电极线以及各自连接到源极的像素电极 的一个薄膜半导体元件。 优选地，对应于源极电极和漏电极之间的间隙的半导体膜的该区域中的n型杂质浓度和p型杂质浓度随着从该区域的表面的深度而呈指数级降低，从而获得 具有优异特性的薄膜半导体器件。

公开(公告)号：US5008218A

公开(公告)日：1991-04-16

申请号：US408729

申请日：1989-09-18

申请人： Genshiro Kawachi ,  Akio Mimura ,  Nobutake Konishi ,  Kikuo Ono ,  Takashi Suzuki

发明人： Genshiro Kawachi ,  Akio Mimura ,  Nobutake Konishi ,  Kikuo Ono ,  Takashi Suzuki

IPC分类号： G02F1/136 ,  G02F1/1368 ,  G09F9/30 ,  H01L21/3213 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L27/1214 ,  H01L21/32139 ,  H01L29/4908 ,  H01L29/66757 ,  Y10S148/105 ,  Y10S148/106 ,  Y10S438/945

摘要： A method for fabricating an active matrix substrate is disclosed which includes the following steps: forming an island region of a first semiconductor film on a prescribed insulating substrate; forming a first insulating film and a second semiconductor film on said first insulating film; forming a second insulating film on said second semiconductor film and thereafter forming a prescribed pattern of the second insulating film; depositing prescribed metal on the pattern and thereafter forming a compound of the second semiconductor film and the metal; removing unreacted portion of the metal; and etching said second semiconductor film and said first insulating film using said compound as a mask.

摘要翻译： 公开了一种制造有源矩阵基板的方法，包括以下步骤：在规定的绝缘基板上形成第一半导体膜的岛区; 在所述第一绝缘膜上形成第一绝缘膜和第二半导体膜; 在所述第二半导体膜上形成第二绝缘膜，然后形成所述第二绝缘膜的规定图案; 在图案上沉积规定的金属，然后形成第二半导体膜和金属的化合物; 去除金属的未反应部分; 以及使用所述化合物作为掩模蚀刻所述第二半导体膜和所述第一绝缘膜。

公开(公告)号：US09178075B2

公开(公告)日：2015-11-03

申请号：US13984931

申请日：2012-02-27

申请人： Takahiro Kawashima ,  Hisao Nagai ,  Eiichi Satoh ,  Yuji Kishida ,  Genshiro Kawachi

发明人： Takahiro Kawashima ,  Hisao Nagai ,  Eiichi Satoh ,  Yuji Kishida ,  Genshiro Kawachi

IPC分类号： H01L29/02 ,  H01L29/786 ,  H01L29/66

CPC分类号： H01L29/78693 ,  H01L29/66742 ,  H01L29/66765 ,  H01L29/78678

摘要： A thin-film semiconductor device includes a gate electrode formed above a substrate; a gate insulating film formed to cover the gate electrode; a semiconductor layer formed above the gate insulating film and having a channel region; a channel protective layer formed above the semiconductor layer and containing an organic material which includes silicon, oxygen, and carbon; an interfacial layer which is formed in contact with the channel protective layer between the semiconductor layer and the channel protective layer, and which includes carbon as a major component, the carbon originating from the organic material; and a source electrode and a drain electrode which are electrically connected to the semiconductor layer.

摘要翻译： 薄膜半导体器件包括形成在衬底上的栅电极; 形成为覆盖所述栅电极的栅极绝缘膜; 形成在所述栅极绝缘膜的上方并具有沟道区域的半导体层; 沟道保护层，其形成在所述半导体层上方并且含有包含硅，氧和碳的有机材料; 形成为与半导体层和沟道保护层之间的沟道保护层接触并且包括碳作为主要成分的界面层，来自有机材料的碳; 以及与半导体层电连接的源电极和漏电极。

公开(公告)号：US20130320339A1

公开(公告)日：2013-12-05

申请号：US13984931

申请日：2012-02-27

申请人： Takahiro Kawashima ,  Hisao Nagai ,  Eiichi Satoh ,  Yuji Kishida ,  Genshiro Kawachi

发明人： Takahiro Kawashima ,  Hisao Nagai ,  Eiichi Satoh ,  Yuji Kishida ,  Genshiro Kawachi

IPC分类号： H01L29/786 ,  H01L29/66

CPC分类号： H01L29/78693 ,  H01L29/66742 ,  H01L29/66765 ,  H01L29/78678

摘要： A thin-film semiconductor device includes a gate electrode formed above a substrate; a gate insulating film formed to cover the gate electrode; a semiconductor layer formed above the gate insulating film and having a channel region; a channel protective layer formed above the semiconductor layer and containing an organic material which includes silicon, oxygen, and carbon; an interfacial layer which is formed in contact with the channel protective layer between the semiconductor layer and the channel protective layer, and which includes carbon as a major component, the carbon originating from the organic material; and a source electrode and a drain electrode which are electrically connected to the semiconductor layer.

摘要翻译： 薄膜半导体器件包括形成在衬底上的栅电极; 形成为覆盖所述栅电极的栅极绝缘膜; 形成在所述栅极绝缘膜的上方并具有沟道区域的半导体层; 沟道保护层，其形成在所述半导体层上方并且含有包含硅，氧和碳的有机材料; 形成为与半导体层和沟道保护层之间的沟道保护层接触并且包括碳作为主要成分的界面层，来自有机材料的碳; 以及与半导体层电连接的源电极和漏电极。

公开(公告)号：US08487395B2

公开(公告)日：2013-07-16

申请号：US13247254

申请日：2011-09-28

申请人： Arinobu Kanegae ,  Genshiro Kawachi

发明人： Arinobu Kanegae ,  Genshiro Kawachi

IPC分类号： H01L27/146 ,  H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L21/00

CPC分类号： H01L27/3248 ,  H01L27/124 ,  H01L27/3262 ,  H01L27/3279

摘要： A thin-film transistor array device includes a passivation film above first and second bottom gate transistors. A gate wire is below the passivation film. A source wire and a relay wire are above the passivation film. The source wire is electrically connected to a source electrode of the first transistor via a first hole in the passivation film. A conductive oxide film is between the passivation film and both the source wire and the relay electrode and not electrically connected between the source wire and the relay electrode. The conductive oxide film covers an end portion of the gate wire that is exposed via a second hole in the passivation film. The conductive oxide film is between the relay electrode and a current-supply electrode of the second transistor and electrically connects the relay electrode and the current-supply electrode via a third hole in the passivation film.

摘要翻译： 薄膜晶体管阵列器件包括在第一和第二底栅极晶体管之上的钝化膜。 栅极导线位于钝化膜的下面。 源极线和继电器导线位于钝化膜的上方。 源极线通过钝化膜中的第一孔电连接到第一晶体管的源电极。 导电氧化膜位于钝化膜与源极线和继电器电极之间，并且不电连接在源极线和继电器电极之间。 导电氧化物膜覆盖通过钝化膜中的第二孔露出的栅极线的端部。 导电氧化膜位于继电器电极和第二晶体管的电流供给电极之间，经由钝化膜中的第三孔电连接继电器电极和电流供给电极。

公开(公告)号：US08426870B2

公开(公告)日：2013-04-23

申请号：US13245256

申请日：2011-09-26

申请人： Arinobu Kanegae ,  Genshiro Kawachi

发明人： Arinobu Kanegae ,  Genshiro Kawachi

IPC分类号： H01L27/14 ,  H01L21/84

CPC分类号： H01L27/3248 ,  H01L27/124 ,  H01L27/3262 ,  H01L27/3279

摘要： A thin-film transistor array device includes a passivation film above first and second bottom gate transistors. A source wire is below the passivation film. A gate wire and a relay electrode are above the passivation film. The gate wire is electrically connected to a gate electrode of the first transistor via a first hole in the passivation film. A conductive oxide film is between the passivation film and both the gate wire and the relay electrode and not electrically connected between the gate wire and the relay electrode. The conductive oxide film covers an end portion of the source wire that is exposed via a second hole in the passivation film. The conductive oxide film is between the relay electrode and a current-supply electrode of the second transistor and electrically connects the relay electrode and the current-supply electrode via a third hole in the passivation film.

摘要翻译： 薄膜晶体管阵列器件包括在第一和第二底栅极晶体管之上的钝化膜。 源极线在钝化膜下面。 栅极线和继电器电极位于钝化膜的上方。 栅极导线经由钝化膜中的第一孔与第一晶体管的栅电极电连接。 导电氧化膜位于钝化膜与栅极线和继电器电极之间，并且不电连接在栅极线和继电器电极之间。 导电氧化物膜覆盖通过钝化膜中的第二孔暴露的源极线的端部。 导电氧化膜位于继电器电极和第二晶体管的电流供给电极之间，经由钝化膜中的第三孔电连接继电器电极和电流供给电极。

公开(公告)号：US08426264B2

公开(公告)日：2013-04-23

申请号：US13149175

申请日：2011-05-31

申请人： Genshiro Kawachi

发明人： Genshiro Kawachi

IPC分类号： H01L21/8238 ,  H01L21/00

CPC分类号： H01L27/1285 ,  H01L27/1214 ,  H01L27/1274 ,  H01L29/04 ,  H01L29/0657 ,  H01L29/7317 ,  H01L29/78696

摘要： In a lateral bipolar transistor including an emitter, a base and a collector which are formed in a semiconductor thin film formed on an insulating substrate, the semiconductor thin film is a semiconductor thin film which is crystallized in a predetermined direction. In addition, in a MOS-bipolar hybrid transistor formed in a semiconductor thin film formed on an insulating substrate, the semiconductor thin film is a semiconductor thin film which is crystallized in a predetermined direction.

摘要翻译： 在形成在形成于绝缘基板上的半导体薄膜中的发射极，基极和集电极的横向双极晶体管中，半导体薄膜是在规定方向结晶化的半导体薄膜。 此外，在形成在绝缘基板上形成的半导体薄膜中的MOS双极型混合型晶体管中，半导体薄膜是在预定方向结晶化的半导体薄膜。

公开(公告)号：US08330166B2

公开(公告)日：2012-12-11

申请号：US13115409

申请日：2011-05-25

申请人： Hiroshi Hayashi ,  Takahiro Kawashima ,  Genshiro Kawachi

发明人： Hiroshi Hayashi ,  Takahiro Kawashima ,  Genshiro Kawachi

IPC分类号： H01L27/14 ,  H01L29/04 ,  H01L29/10 ,  H01L21/00

CPC分类号： H01L29/78696 ,  H01L29/04 ,  H01L29/66765

摘要： A thin-film semiconductor device includes, in order, a substrate, a gate electrode, a gate insulating film, a first channel layer, and a second channel layer. The second channel layer includes a protrusion between first top surface end portions. The protrusion has first lateral surfaces that each extend between one of the first top surface end portions and a top surface of the protrusion. An insulation layer is on the top surface of the protrusion. The insulation layer has second lateral surfaces that each extend to one of second top surface end portions of the insulation layer. Two contact layers are each on one of the second top surface end portions of the insulation layer, adjacent one of the second lateral surfaces of the insulation layer, adjacent one of the first lateral surfaces of the protrusion, and on one of the first top surface end portions of the second channel layer. A source electrode is on one of the two contact layers, and a drain electrode is on the other of the two contact layers. The two contact layers and the upper portion of the protrusion of said second channel layer are of opposite conductivity types.

摘要翻译： 薄膜半导体器件依次包括衬底，栅电极，栅极绝缘膜，第一沟道层和第二沟道层。 第二通道层包括在第一顶表面端部之间的突起。 突起具有第一侧表面，每个侧表面在第一顶表面端部之一和突起的顶表面之间延伸。 绝缘层位于突起的顶表面上。 绝缘层具有第二侧表面，每个侧表面延伸到绝缘层的第二顶表面端部中的一个。 两个接触层分别位于绝缘层的第二顶表面端部中的一个上，邻近绝缘层的第二侧表面之一，邻近凸起的第一侧表面之一，并且在第一顶表面 第二通道层的端部。 源电极位于两个接触层之一上，漏电极位于两个接触层中的另一个上。 所述第二通道层的两个接触层和突起的上部具有相反的导电类型。

公开(公告)号：US08134524B2

公开(公告)日：2012-03-13

申请号：US12656519

申请日：2010-02-02

申请人： Toshihiro Sato ,  Genshiro Kawachi ,  Yoshiro Mikami ,  Masaya Adachi

发明人： Toshihiro Sato ,  Genshiro Kawachi ,  Yoshiro Mikami ,  Masaya Adachi

IPC分类号： G09G3/30

CPC分类号： H01L27/3276 ,  G09G3/2011 ,  G09G3/3233 ,  G09G2300/0417 ,  G09G2300/0439 ,  G09G2300/0809 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2320/02 ,  G09G2320/0233 ,  G09G2320/0238 ,  G09G2320/043 ,  H01L27/3246 ,  H01L27/326 ,  H01L27/3272 ,  H01L51/5284

摘要： In an organic electroluminescent light emitting display device comprising a plurality of pixels each of which includes an organic electroluminescent element emitting light by a current supplied thereto, a plurality of active elements including a first active element which acquires a data signal and a second active element which regulates the current supplied to the organic electroluminescent element in accordance with the data signal, and a capacitive element storing the data signal, the present invention utilizes a part of the capacitive element arranged in one of the pixels for a light shielding member which shields the plurality of active elements arranged the one of the pixels from light emitted by the organic electroluminescent element arranged therein or another pixel adjacent thereto so as to suppress image quality deterioration and smear appearing in an image display area of the organic electroluminescent light emitting display device.

摘要翻译： 在包括多个像素的有机电致发光显示装置中，每个像素包括通过提供给其的电流发光的有机电致发光元件，包括获取数据信号的第一有源元件和第二有源元件的多个有源元件， 调节根据数据信号提供给有机电致发光元件的电流和存储数据信号的电容元件，本发明利用布置在一个像素中的电容元件的一部分来遮蔽多个 有源元件将排列在其中的有机电致发光元件发出的光中的一个像素排列在与其相邻的其他像素上，以抑制出现在有机电致发光显示装置的图像显示区域中的图像质量恶化和拖尾。

公开(公告)号：US08044403B2

公开(公告)日：2011-10-25

申请号：US12846392

申请日：2010-07-29

申请人： Genshiro Kawachi

发明人： Genshiro Kawachi

IPC分类号： H01L27/108 ,  H01L29/04 ,  H01L29/76 ,  H01L31/036 ,  H01L31/112

CPC分类号： H01L27/1274 ,  G11C11/412 ,  H01L27/0722 ,  H01L27/1214 ,  H03F1/22 ,  H03F3/08 ,  H03F3/45089 ,  H03F3/45282 ,  H03F2200/534 ,  H03F2203/45024 ,  H03F2203/45032 ,  H03F2203/45371 ,  H03F2203/45702

摘要： An integrated circuit, which is configured such that a MOS transistor and a bipolar transistor are integrated at the same time, is formed on an insulating substrate which includes a display device. An electronic device or a display includes a plurality of semiconductor devices which are formed by using a semiconductor thin film and are formed in the semiconductor thin film that is provided on an insulating substrate and is crystallized in a predetermined direction. The plurality of semiconductor devices include a MOS transistor and at least either one of a lateral bipolar thin-film transistor and a MOS-bipolar hybrid thin film transistor.

摘要翻译： 在包括显示装置的绝缘基板上形成集成了MOS晶体管和双极晶体管的集成电路。 电子设备或显示器包括通过使用半导体薄膜形成并形成在设置在绝缘基板上并沿预定方向结晶的半导体薄膜中的多个半导体器件。 多个半导体器件包括MOS晶体管和横向双极型薄膜晶体管和MOS双极性混合薄膜晶体管中的至少一个。