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公开(公告)号:US20210019218A1
公开(公告)日:2021-01-21
申请号:US16784926
申请日:2020-02-07
Applicant: Micron Technology, Inc.
Inventor: Fangfang Zhu , Ying Yu Tai , Jiangli Zhu , Wei Wang
Abstract: In an embodiment, a system includes a plurality of memory components and a processing device. The processing device includes a command-lifecycle logger component that is configured to perform command-lifecycle-logging operations, which include detecting a triggering event for logging command-lifecycle debugging data, and responsively logging command-lifecycle debugging data. Logging command-lifecycle debugging data includes generating the command-lifecycle debugging data and storing the generated command-lifecycle debugging data in data storage.
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公开(公告)号:US20200110544A1
公开(公告)日:2020-04-09
申请号:US16153016
申请日:2018-10-05
Applicant: Micron Technology, Inc.
Inventor: Fangfang Zhu , Jiangli Zhu , Ning Chen , Ying Yu Tai
Abstract: Data is copied, from a second group of data blocks in a second plurality of groups of data blocks that are mapped, to a first group of data blocks in a first set of groups of data blocks that are not mapped to include the first group of data blocks in the second set of groups of data blocks that are mapped. A sub-total write counter associated with the first group of data blocks is reset. A value of the sub-total write counter indicates a number of write operations performed on the first group of data blocks since the first group of data blocks has been included in the second set of groups of data blocks. A wear leveling operation is performed on the first group of data blocks based on the sub-total write counter.
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63.
公开(公告)号:US20200066362A1
公开(公告)日:2020-02-27
申请号:US16107878
申请日:2018-08-21
Applicant: Micron Technology, Inc.
Inventor: Fangfang Zhu , Jiangli Zhu , Ying Yu Tai
IPC: G11C16/34 , G11C13/00 , G11C11/406 , G11C29/52
Abstract: One or more write operations are performed on a memory component. A determination is made as to whether a number of the plurality of write operations performed on the memory component since performance of a refresh operation on the memory component exceeds a threshold value. In response to determining that the number of write operations performed on the memory component exceeds the threshold value, a memory cell of the memory component is identified based on the plurality of write operations. Data stored at memory cells of the memory component that are proximate to the identified memory cell is refreshed.
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公开(公告)号:US20200026643A1
公开(公告)日:2020-01-23
申请号:US16039648
申请日:2018-07-19
Applicant: Micron Technology, Inc.
Inventor: Ying Yu Tai , Jiangli Zhu
Abstract: First data units can be sampled from a set of data units of a memory component. The first data units can be a subset of the set of data units. An initial data unit is determined from the first data units as a first candidate data unit based on a wear metric associated with the first data units. The wear metric is indicative of a level of physical wear of the first data units. A wear leveling operation can be performed in view of the first candidate data unit.
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公开(公告)号:US20190333548A1
公开(公告)日:2019-10-31
申请号:US16226626
申请日:2018-12-19
Applicant: Micron Technology, Inc.
Inventor: Edward McGlaughlin , Ying Yu Tai , Samir Mittal
IPC: G11C5/14 , G11C13/00 , G11C11/4074 , G06F3/06
Abstract: An indication of a power loss can be received at a cross point array memory dual in-line memory module (DIMM) operation component of a memory sub-system. The cross point array memory DIMM operation component includes a volatile memory component and a non-volatile cross point array memory component. In response to receiving the indication of the power loss, a type of write operation for the non-volatile cross point array memory component of the cross point array memory DIMM operation component is determined based on a characteristic of the memory sub-system. Data stored at the volatile memory component of the cross point array memory DIMM operation component is retrieved and written to the non-volatile cross point array memory component of the cross point array memory DIMM operation component by using the determined type of write operation.
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公开(公告)号:US12135876B2
公开(公告)日:2024-11-05
申请号:US16162905
申请日:2018-10-17
Applicant: Micron Technology, Inc.
Inventor: Samir Mittal , Gurpreet Anand , Ying Yu Tai , Cheng Yuan Wu
Abstract: A computing system having a memory component with an embedded media controller. The memory component is encapsulated within an integrated circuit (IC) package. The embedded controller within the IC package is configured to: receive incoming packets, via a serial communication interface of the controller, from a serial connection outside of the IC package; convert the incoming packets into commands and addresses according to a predetermined serial communication protocol; operate memory units encapsulated within the IC package according to the commands and the addresses; convert results of at least a portion of the commands into outgoing packets; and transmit the outgoing packets via the serial communication interface to the serial connection outside of the IC package.
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公开(公告)号:US11861167B2
公开(公告)日:2024-01-02
申请号:US17859816
申请日:2022-07-07
Applicant: Micron Technology, Inc.
Inventor: Ning Chen , Jiangli Zhu , Fangfang Zhu , Ying Yu Tai
IPC: G06F3/06
CPC classification number: G06F3/0604 , G06F3/0655 , G06F3/0679
Abstract: Methods, systems, and devices for performing an access operation on a memory cell, incrementing a value of a first counter based on performing the access operation on the memory cell, determining that the incremented value of the first counter satisfies a threshold, incrementing a value of a second counter based on determining that the incremented value of the first counter satisfies the threshold, and performing a maintenance operation on the memory cell based on determining that the incremented value of the first counter satisfies the threshold are described.
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公开(公告)号:US20230244822A1
公开(公告)日:2023-08-03
申请号:US18112834
申请日:2023-02-22
Applicant: Micron Technology, Inc.
Inventor: Juane Li , Jiangli Zhu , Ying Yu Tai
CPC classification number: G06F21/79 , G06F21/602 , H04L9/0866 , G11C29/44 , H04L9/0891 , G11C29/42 , H04L9/0869
Abstract: Methods, systems, and devices for cryptographic key management are described. A memory device can issue, by a firmware component, a command to generate a first cryptographic key for encrypting or decrypting user data stored on a memory device. The memory device can generate, by a hardware component, the first cryptographic key based on the command. The memory device can encrypt, by the hardware component, the first cryptographic key using a second cryptographic key and an initialization vector. The memory device can store the encrypted first cryptographic key in a nonvolatile memory device separate from the hardware component.
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公开(公告)号:US11709733B2
公开(公告)日:2023-07-25
申请号:US17216574
申请日:2021-03-29
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Tingjun Xie , Ying Yu Tai , Jiangli Zhu
CPC classification number: G06F11/1076 , G06F11/1004 , G06F12/023 , H03M13/13
Abstract: Data to be stored at a memory sub-system can be received from a host system. A portion of the host data that includes user data and another portion of the host data that includes system metadata can be determined. A mapping for a data structure can be received that identifies locations of the data structure that are fixed with respect to an encoding operation and locations of the data structure that are not fixed with respect to the encoding operation. The data structure can be generated for the user data and system metadata based on the mapping, and an encoding operation can be performed on the data structure to generate a codeword.
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公开(公告)号:US11632137B2
公开(公告)日:2023-04-18
申请号:US17240979
申请日:2021-04-26
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Tingjun Xie , Ying Yu Tai , Jiangli Zhu
Abstract: A method includes receiving a request for host data, receiving a codeword that is associated with the host data, performing a decoding operation for a first portion of the codeword to generate a segment of decoded data, determining whether the segment of the decoded data satisfies the request for the host data, and in response to determining that the segment of the decoded data satisfies the request for the host data, terminating the decoding operation for remaining portions of the codeword.
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