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    Memory systems and block copy methods thereof
    64.
    发明授权
    Memory systems and block copy methods thereof 有权
    存储器系统及其块复制方法

    公开(公告)号：US09280420B2

    公开(公告)日：2016-03-08

    申请号：US14695375

    申请日：2015-04-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sangyong Yoon ,  Kitae Park ,  Jinman Han

    IPC: G11C29/00 ,  G06F11/10 ,  G11C29/52

    CPC classification number: G06F11/1068 ,  G06F11/1008 ,  G06F11/1072 ,  G11C29/52

    Abstract: Methods of operating memory systems and nonvolatile memory devices include performing error checking and correction (ECC) operations on M pages of data read from a first “source” portion of M-bit nonvolatile memory cells within the nonvolatile memory device to thereby generate M pages of ECC-processed data, where M is a positive integer greater than two (2). A second “target” portion of M-bit nonvolatile memory cells within the nonvolatile memory device is then programmed with the M pages of ECC-processed data using an address-scrambled reprogramming technique, for example.

    Abstract translation: 操作存储器系统和非易失性存储器件的方法包括在从非易失性存储器件中的M位非易失性存储器单元的第一“源”部分读取的M页数据上执行错误校验和校正（ECC）操作，从而产生M页的 ECC处理的数据，其中M是大于2（2）的正整数。 例如，非易失性存储器件中的M位非易失性存储单元的第二“目标”部分然后使用地址加扰的重新编程技术用ECC处理数据的M页被编程。

    Memory system and driving method thereof
    65.
    发明授权
    Memory system and driving method thereof 有权
    存储系统及其驱动方法

    公开(公告)号：US09208886B2

    公开(公告)日：2015-12-08

    申请号：US14197723

    申请日：2014-03-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sang-Wan Nam ,  Kuihan Ko ,  Yang-Lo Ahn ,  Kitae Park

    IPC: G11C16/04 ,  G11C16/10 ,  G11C16/08 ,  G11C16/34 ,  G11C7/04

    CPC classification number: G11C16/10 ,  G11C7/04 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/3427

    Abstract: A driving method of a nonvolatile memory device includes receiving a program command and an address. The method includes changing a number of adjacent zones of a plurality of zones formed of unselected word lines according to a location of a selected word line corresponding to the received address. The method further includes applying different zone voltages to the number of adjacent zones and remaining zones. The nonvolatile memory device includes a plurality of strings formed to penetrate word lines stacked on a substrate in a plate shape.

    Abstract translation: 非易失性存储器件的驱动方法包括接收程序命令和地址。 该方法包括根据与所接收的地址相对应的所选择的字线的位置来改变由未选字线形成的多个区域中的多个相邻区域的数量。 该方法还包括将不同的区域电压施加到相邻区域和剩余区域的数量。 非易失性存储装置包括形成为穿过板状堆叠在基板上的字线的多个串。

    Memory system to select program operation method and method thereof
    67.
    发明授权
    Memory system to select program operation method and method thereof 有权
    存储系统选择程序操作方法及方法

    公开(公告)号：US09164889B2

    公开(公告)日：2015-10-20

    申请号：US13755144

    申请日：2013-01-31

    Applicant: SAMSUNG Electronics Co., Ltd.

    Inventor： Seung-Bum Kim ,  Jaeyong Jeong ,  Kitae Park

    IPC: G06F12/00 ,  G06F12/02 ,  G11C11/56 ,  G11C7/10 ,  G11C16/10 ,  G06F11/10

    CPC classification number: G06F12/0246 ,  G06F11/1068 ,  G11C7/1006 ,  G11C11/5628 ,  G11C16/10 ,  G11C2211/5641

    Abstract: A memory system includes a nonvolatile memory device having a first data area storing M-bit data using a buffer program operation and a second data area storing N-bit data (N being an integer larger than M) using a main program operation and a memory controller configured to control the nonvolatile memory device. When a main program operation using data stored at the first and second data areas is required, the memory controller calculates values indicating a performance of the required main program operation to be executed according to a plurality of main program manners, selects one of the plurality of main program manners based on the calculated values, and controls the nonvolatile memory device to perform the required main program operation according to the selected main program manner.

    Abstract translation: 存储器系统包括：非易失性存储器件，其具有使用缓冲器程序操作存储M位数据的第一数据区和使用主程序操作存储N位数据（N大于M的整数）的第二数据区;存储器 控制器被配置为控制非易失性存储器件。 当需要使用存储在第一和第二数据区域的数据的主程序操作时，存储器控制器根据多个主程序方式计算指示要执行的所需主程序操作的性能的值，选择多个 基于计算值的主程序方式，并且根据选择的主程序方式控制非易失性存储器件执行所需的主程序操作。

    Memory system and programming method thereof
    68.
    发明授权
    Memory system and programming method thereof 有权
    存储器系统及其编程方法

    公开(公告)号：US09142313B2

    公开(公告)日：2015-09-22

    申请号：US14060633

    申请日：2013-10-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sang-Won Shim ,  Sang-Wan Nam ,  Kitae Park

    IPC: G11C16/10 ,  G11C16/34

    CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/3427 ,  G11C16/3459

    Abstract: A program method of a nonvolatile memory device is provided, which includes programming a memory cell in one string selected from a plurality of vertical strings; determining whether a mode of operation of the nonvolatile memory device is a pre-pulse mode; when the mode of operation is determined to be the pre-pulse mode, applying a pre-pulse having a predetermined level to a string selection line connected with a gate of a string selection transistor of at least one unselected vertical string of the plurality of vertical strings for a particular time period; and performing a verification operation on the programmed memory cell.

    Abstract translation: 提供了一种非易失性存储器件的编程方法，其包括以多个垂直字符串中选择的一个串中的存储器单元进行编程; 确定所述非易失存储器件的工作模式是否是预脉冲模式; 当操作模式被确定为预脉冲模式时，将具有预定电平的预脉冲施加到与多个垂直线中的至少一个未选择垂直弦的串选择晶体管的栅极连接的串选择线 特定时间段的字符串; 以及对所编程的存储单元执行验证操作。

    Nonvolatile memory devices and methods of programming nonvolatile memory devices
    69.
    发明授权
    Nonvolatile memory devices and methods of programming nonvolatile memory devices 有权
    非易失性存储器件和非易失性存储器件编程方法

    公开(公告)号：US09064582B2

    公开(公告)日：2015-06-23

    申请号：US14316023

    申请日：2014-06-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Youngsun Song ,  Bogeun Kim ,  Ohsuk Kwon ,  Kitae Park ,  Seung-Hwan Shin ,  Sangyong Yoon

    IPC: G11C16/04 ,  G11C16/10 ,  G11C16/34 ,  G11C11/56 ,  G11C16/08

    CPC classification number: G11C16/10 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/08 ,  G11C16/34 ,  G11C16/3459

    Abstract: A nonvolatile memory device includes a memory cell array, a page buffer unit which output a verify-read result, a reference current generating unit which generates a reference current signal, a page buffer decoding unit which outputs currents according to the verify-read result. The nonvolatile memory device further includes an analog bit counting unit which counts the currents, a digital adding unit which calculates an accumulated sum of the counting result, a pass/fail checking unit which outputs a pass signal or fail signal according to the calculation result, and a control unit controlling a program operation.

    Abstract translation: 非易失性存储器件包括存储单元阵列，输出验证读取结果的页面缓冲器单元，产生参考电流信号的参考电流产生单元，根据验证读取结果输出电流的页面缓冲器解码单元。 非易失性存储装置还包括对电流进行计数的模拟比特计数单元，计算计数结果的累积和的数字加法单元，根据计算结果输出通过信号或失败信号的通过/失败检查单元， 以及控制程序操作的控制单元。

    DATA STORAGE SYSTEM HAVING MULTI-BIT MEMORY DEVICE AND OPERATING METHOD THEREOF
    70.
    发明申请
    DATA STORAGE SYSTEM HAVING MULTI-BIT MEMORY DEVICE AND OPERATING METHOD THEREOF 有权
    具有多位存储器件的数据存储系统及其操作方法

    公开(公告)号：US20140313824A1

    公开(公告)日：2014-10-23

    申请号：US14319137

    申请日：2014-06-30

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sangyong Yoon ,  Kitae Park ,  Jinman Han ,  Wonseok Lee

    IPC: G11C16/10 ,  G11C14/00

    CPC classification number: G11C16/10 ,  G11C11/56 ,  G11C11/5628 ,  G11C14/0018 ,  G11C16/0483 ,  G11C16/26 ,  G11C2211/5641 ,  G11C2211/5642 ,  G11C2211/5643

    Abstract: A data storage device includes a non-volatile memory device which includes a memory cell array; and a memory controller which includes a buffer memory. The operating method of the data storage device includes storing data in the buffer memory, and determining whether the data stored in the buffer memory is data accompanying a buffer program operation of the memory cell array. When the data stored in the buffer memory is data accompanying the buffer program operation, the method further includes determining whether a main program operation on the memory cell array is required, and when a main program operation on the memory cell array is required, determining a program pattern of the main program operation on the memory cell array. The method further includes issuing a set of commands for the main program operation on the memory cell array to the multi-bit memory device based on the program pattern.

    Abstract translation: 数据存储装置包括：非易失性存储装置，其包括存储单元阵列; 以及包括缓冲存储器的存储器控​​制器。 数据存储装置的操作方法包括将数据存储在缓冲存储器中，并且确定存储在缓冲存储器中的数据是否是伴随存储器单元阵列的缓冲器程序操作的数据。 当存储在缓冲存储器中的数据是伴随缓冲器程序操作的数据时，该方法还包括确定是否需要对存储单元阵列执行主程序操作，并且当需要存储单元阵列的主程序操作时， 存储单元阵列中的主程序操作的程序模式。 该方法还包括基于该程序模式向存储单元阵列发出用于主程序操作的一组命令到多位存储器件。

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