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公开(公告)号：US20200234768A1
公开(公告)日：2020-07-23
申请号：US16283464
申请日：2019-02-22
发明人： Lei Lin , Zhuojie Li , Tai-Yuan Tseng , Henry Chin , Gerrit Jan Hemink
摘要： Techniques are provided for predictively programming of non-volatile memory, which may reduce the number of verify operations. In one aspect, a programming circuit is configured to program memory cells to a verify low voltage and to program a set of the memory cells to target states. The set comprises memory cells having a threshold voltage between the verify low voltage and a verify high voltage. To program the set of the memory cells to the target states, the programming circuit is configured to apply two or more program pulses to memory cells in the set without verifying whether the memory cells have reached their respective target states, including: apply a first and second program enable voltages to the bit lines associated with the memory cells having different strengths.
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62.发明授权公开(公告)号：US10665313B1
公开(公告)日：2020-05-26
申请号：US16402151
申请日：2019-05-02
发明人： Ching-Huang Lu , Henry Chin , Jian Chen
IPC分类号： G11C29/00 , G11C29/02 , G11C16/14 , G11C16/26 , G11C16/04 , G11C29/38 , G11C16/34 , G11C29/12
摘要： Techniques are described for detecting a short circuit between a word line and a source line in a memory device, and to a method for recovering from such a short circuit. In one aspect, the short circuit is detected in a program operation when a selected word line completes programming after an unusually low number of program loops. A further check is performed to confirm that there is a short circuit. The short circuited word line is then erased and a recovery read is performed for previously-programmed word lines. In another aspect, a short circuit is detected in a read operation.
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公开(公告)号：US10665306B1
公开(公告)日：2020-05-26
申请号：US16377421
申请日：2019-04-08
发明人： Hong-Yan Chen , Henry Chin
摘要： Techniques are disclosed for reducing an injection type of program disturb in a memory device. In one aspect, a discharge operation is performed at the start of a program loop. This operation discharges residue electrons from the channel region on the source side of the selected word line, WLn, to the channel region on the drain side of WLn. As a result, in a subsequent channel pre-charge operation, the residue electrons can be more easily removed from the channel. The discharge operation involves applying a voltage pulse to WLn and a first set of drain-side word lines which is adjacent to WLn. The remaining unselected word lines may be held at ground during the voltage pulse.
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公开(公告)号：US10535401B2
公开(公告)日：2020-01-14
申请号：US16000413
申请日：2018-06-05
发明人： Lei Lin , Zhuojie Li , Henry Chin , Cynthia Hsu
摘要： An apparatus is provided that includes a plurality of memory cells, a programming circuit configured to apply a plurality of programming pulses to the memory cells, and a scanning circuit configured to repeatedly switch between performing an n-state bitscan after each programming pulse until first predetermined criteria are satisfied, and performing an m-state bitscan after each programming pulse until second predetermined criteria are satisfied, where m>n, and n>0.
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公开(公告)号：US20180173447A1
公开(公告)日：2018-06-21
申请号：US15381104
申请日：2016-12-16
发明人： Henry Chin , Sateesh Desireddi , Dana Lee , Ashwin D T , Harshul Gupta , Parth Amin , Jia Li
IPC分类号： G06F3/06
CPC分类号： G06F3/0634 , G06F3/0619 , G06F3/0632 , G06F3/0679 , G11C11/5642 , G11C16/0483 , G11C16/26
摘要： Apparatuses, systems, methods, and computer program products are disclosed for dynamic read table generation. One apparatus includes a set of non-volatile storage cells. A controller for a set of non-volatile storage cells is configured to, in response to unsuccessfully reading a storage cell of the set of non-volatile storage cells using a parameter, read the storage cell using one or more shifted values. A controller for a set of non-volatile storage cells is configured to, in response to successfully reading a storage cell using one or more shifted values, add the one or more shifted values to a storage device.
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