公开(公告)号：US07848231B2

公开(公告)日：2010-12-07

申请号：US10585569

申请日：2005-10-25

Applicant: Kazuhiro Hayakawa ,  Satoru Yoshida ,  Makoto Fukuda ,  Nobuo Shigeta ,  Kazuhiko Ogawa ,  Shin Hashimoto

Inventor： Kazuhiro Hayakawa ,  Satoru Yoshida ,  Makoto Fukuda ,  Nobuo Shigeta ,  Kazuhiko Ogawa ,  Shin Hashimoto

IPC: G01R31/08 ,  G06F11/00 ,  H04L12/28 ,  H04L12/56 ,  H04J3/02

CPC classification number: H04L45/04 ,  H04L45/50 ,  H04L47/2441 ,  H04L69/14

Abstract: A packet communication network is connected between a first external network and a second external network. The packet communication network includes a classifier, a parallel network that includes a plurality of physically or logically independent networks, and a multiplexing router. The classifier classifies a packet input from the first external network to one of the networks in the parallel network. Each of the networks in the parallel network transmits the packet to the multiplexing router. The multiplexing router multiplexes a packet received from the networks in the parallel network and outputs the multiplexed packet to the second external network.

Abstract translation: 分组通信网络连接在第一外部网络和第二外部网络之间。 分组通信网络包括分类器，包括多个物理上或逻辑上独立的网络的并行网络，以及复用路由器。 分类器将从第一外部网络输入的分组分类到并行网络中的一个网络。 并行网络中的每个网络将分组发送到复用路由器。 复用路由器复用从并行网络中的网络接收到的分组，并将复用的分组输出到第二外部网络。

公开(公告)号：US07808077B2

公开(公告)日：2010-10-05

申请号：US12185578

申请日：2008-08-04

Applicant: Kyoko Egashira ,  Shin Hashimoto

Inventor： Kyoko Egashira ,  Shin Hashimoto

IPC: H01L29/00

CPC classification number: H01L28/60 ,  H01L21/76838 ,  H01L21/76895 ,  H01L23/5223 ,  H01L23/5228 ,  H01L27/0805 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating film formed on a substrate; and a capacitor composed of a lower capacitor electrode made of the first conductive film, a dielectric film formed on the lower capacitor electrode, and an upper capacitor electrode made of the second conductive film and formed on the dielectric film.

Abstract translation: 半导体器件由以下部分构成：由第一导电膜和第二导电膜构成的互连，其从形成在基板上的绝缘膜上的互连下侧依次堆叠; 以及由第一导电膜制成的下部电容电极，形成在下部电容电极上的电介质膜和形成在该电介质膜上的由上述第二导电膜构成的上部电容电极构成的电容器。

公开(公告)号：US20100230687A1

公开(公告)日：2010-09-16

申请号：US12740770

申请日：2008-10-28

Applicant: Shin Hashimoto ,  Tatsuya Tanabe

Inventor： Shin Hashimoto ,  Tatsuya Tanabe

IPC: H01L29/205 ,  H01L29/80 ,  H01L29/20

CPC classification number: H01L29/205 ,  H01L21/02378 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/7787 ,  H01L29/872

Abstract: In a group III nitride hetero junction transistor 11a, a second AlY1InY2Ga1-Y1-Y2N layer 15 forms a hetero junction 21 with a first AlX1InX2Ga1-X1-X2N layer 13a. A first electrode 17 forms a Schottky junction with the first AlX1InX2Ga1-X1-X2N layer 13a. The first AlX1InX2Ga1-X1-X2N layer 13a and the second AlY1InY2Ga1-Y1-Y2N layer 15 are provided over a substrate 23. The electrodes 17a, 18a, and 19a include a source electrode, a gate electrode, and a drain electrode, respectively. The carbon concentration NC13 in the first AlX1InX2Ga1-X1-X2N layer 13a is less than 1×1017 cm−3. The dislocation density D in the second AlY1InY2Ga1-Y1-Y2N layer 15 is 1×108 cm−2. The hetero junction 21 generates a two-dimensional electron gas layer 25. These provide a low-loss gallium nitride based electronic device.

Abstract translation: 在III族氮化物异质结晶体管11a中，第二AlY1InY2Ga1-Y1-Y2N层15与第一AlX1InX2Ga1-X1-X2N层13a形成异质结21。 第一电极17与第一AlX1InX2Ga1-X1-X2N层13a形成肖特基结。 第一AlX1InX2Ga1-X1-X2N层13a和第二AlY1InY2Ga1-Y1-Y2N层15设置在衬底23上。电极17a，18a和19a分别包括源电极，栅极电极和漏电极。 第一AlX1InX2Ga1-X1-X2N层13a中的碳浓度NC13小于1×1017cm-3。 第二AlY1InY2Ga1-Y1-Y2N层15中的位错密度D为1×108cm-2。 异质结21产生二维电子气体层25.这些提供了一种低损耗氮化镓基电子器件。

公开(公告)号：US20090147793A1

公开(公告)日：2009-06-11

申请号：US10585569

申请日：2005-10-25

Applicant: Kazuhiro Hayakawa ,  Satoru Yoshida ,  Makoto Fukuda ,  Nobuo Shigeta ,  Kazuhiko Ogawa ,  Shin Hashimoto

Inventor： Kazuhiro Hayakawa ,  Satoru Yoshida ,  Makoto Fukuda ,  Nobuo Shigeta ,  Kazuhiko Ogawa ,  Shin Hashimoto

IPC: H04L12/56

CPC classification number: H04L45/04 ,  H04L45/50 ,  H04L47/2441 ,  H04L69/14

Abstract: A packet communication network is connected between a first external network and a second external network. The packet communication network includes a classifier, a parallel network that includes a plurality of physically or logically independent networks, and a multiplexing router. The classifier classifies a packet input from the first external network to one of the networks in the parallel network. Each of the networks in the parallel network transmits the packet to the multiplexing router. The multiplexing router multiplexes a packet received from the networks in the parallel network and outputs the multiplexed packet to the second external network.

Abstract translation: 分组通信网络连接在第一外部网络和第二外部网络之间。 分组通信网络包括分类器，包括多个物理上或逻辑上独立的网络的并行网络，以及复用路由器。 分类器将从第一外部网络输入的分组分类到并行网络中的一个网络。 并行网络中的每个网络将分组发送到复用路由器。 复用路由器复用从并行网络中的网络接收到的分组，并将复用的分组输出到第二外部网络。

公开(公告)号：US20070242684A1

公开(公告)日：2007-10-18

申请号：US10589990

申请日：2005-10-25

Applicant: Kazuhiro Hayakawa ,  Satoru Yoshida ,  Makoto Fukuda ,  Nobuo Shigeta ,  Kazuhiko Ogawa ,  Shin Hashimoto

Inventor： Kazuhiro Hayakawa ,  Satoru Yoshida ,  Makoto Fukuda ,  Nobuo Shigeta ,  Kazuhiko Ogawa ,  Shin Hashimoto

IPC: H04L12/56

CPC classification number: H04J14/0227 ,  H04J14/0241 ,  H04J14/0284 ,  H04L12/56 ,  H04Q11/0062 ,  H04Q11/0066 ,  H04Q11/0071 ,  H04Q2011/0098

Abstract: Full-mesh WDM transmission units, each of which includes n number of interfaces and is capable of establishing a bidirectional full-mesh communication between all of the interfaces using wavelength paths based on a wavelength division multiplexing technique, are connected in a multistage tree-shaped structure by internetwork connection units through edge-packet transfer units connected to the respective interfaces. Therefore, it is possible to hold a direct communication between user terminals connected to the edge-packet transfer units of the same full-mesh WDM transmission unit, and to realize scalability by a multistage connection configuration.

Abstract translation: 全网WDM传输单元，其中每个包括n个接口，并且能够使用基于波分复用技术的波长路径在所有接口之间建立双向全网状通信，以多级树状 通过互连网络连接单元通过连接到相应接口的边缘分组传送单元进行结构化。 因此，可以在连接到同一全网WDM传输单元的边缘分组传送单元的用户终端之间进行直接通信，并且通过多级连接配置来实现可扩展性。

公开(公告)号：US20050003745A1

公开(公告)日：2005-01-06

申请号：US10866040

申请日：2004-06-14

Applicant: Akihiro Tanoue ,  Yoshiharu Hidaka ,  Shin Hashimoto

Inventor： Akihiro Tanoue ,  Yoshiharu Hidaka ,  Shin Hashimoto

IPC: H01L21/304 ,  B24B37/04 ,  B24B57/02 ,  B24B1/00

CPC classification number: B24B37/04 ,  B24B57/02

Abstract: A slurry feeding apparatus includes closed slurry bottle, piping, wet nitrogen generator, wet nitrogen supply pipe, suction and spray nozzles, temperature regulator, flow rate control valves, slurry delivery pump and controller for controlling the operation and flow rate of the slurry delivery pump. While a wafer is being polished by a CMP polisher, the controller continuously operates the pump. On the other hand, while the polisher is idling, the controller starts and stops the pump intermittently at regular intervals. No stirrer like a propeller is inserted into the slurry bottle, but the slurry is stirred up by spraying the slurry through the spray nozzle.

Abstract translation: 浆料输送装置包括封闭的浆液瓶，管道，湿氮发生器，湿氮供给管，抽吸喷嘴，温度调节器，流量控制阀，浆料输送泵和控制器，用于控制浆料输送泵的操作和流速 。 当晶圆被CMP抛光机抛光时，控制器连续地操作泵。 另一方面，当抛光机空转时，控制器会间歇地间歇地启动和停止泵。 没有像螺旋桨那样的搅拌器被插入到浆料瓶中，但是通过喷雾喷雾浆料来搅拌浆料。

公开(公告)号：US06323663B1

公开(公告)日：2001-11-27

申请号：US09396884

申请日：1999-09-16

Applicant: Yoshirou Nakata ,  Toshio Yamada ,  Atsushi Fujiwara ,  Isao Miyanaga ,  Shin Hashimoto ,  Yukiharu Uraoka ,  Yasushi Okuda ,  Kenzou Hatada

Inventor： Yoshirou Nakata ,  Toshio Yamada ,  Atsushi Fujiwara ,  Isao Miyanaga ,  Shin Hashimoto ,  Yukiharu Uraoka ,  Yasushi Okuda ,  Kenzou Hatada

IPC: G01R1073

CPC classification number: G01R31/2886 ,  G01R1/0491 ,  G01R31/2831 ,  G01R31/2867

Abstract: A retainer board, holding a semiconductor wafer having a plurality of integrated circuit terminals for testing a semiconductor chip, is provided in confronting relation to a probe sheet having a plurality of probe terminals electrically connected to their corresponding integrated circuit terminals. An insulating substrate, having wiring electrically connected to the plural probe terminals, is provided on the probe sheet in opposed relation to the retainer board. An elastic member is interposed between the probe sheet and the insulating substrate. The retainer board and the probe sheet are brought into so closer relationship that each integrated circuit terminal of the semiconductor wafer held by the retainer board is electrically connected to its corresponding probe terminal of the probe sheet.

Abstract translation: 提供了一种保持板，其具有多个用于测试半导体芯片的集成电路端子的半导体晶片，与具有电连接到其相应的集成电路端子的多个探针端子的探针片相对。 具有与多个探针端子电连接的布线的绝缘基板设置在与保持板相对的探针片上。 在探针片和绝缘基片之间插入弹性部件。 保持板和探针片的关系使得由保持板保持的半导体晶片的每个集成电路端子电连接到其对应的探针片的探针端子。

公开(公告)号：US06308316B1

公开(公告)日：2001-10-23

申请号：US09004505

申请日：1998-01-08

Applicant: Shin Hashimoto ,  Reiji Masaki

Inventor： Shin Hashimoto ,  Reiji Masaki

IPC: G06F945

CPC classification number: G06F11/3404

Abstract: An apparatus analyzes the operations of a parallel processing system. The parallel processing system has a serial processing state, a redundant parallel processing state, and a parallel processing state. The apparatus carries out an interrupt process to provide information about the program executing conditions of the parallel processing system. This apparatus efficiently provides information about parallel processing carried out in a multiprocessor system.

Abstract translation: 一种装置分析并行处理系统的操作。 并行处理系统具有串行处理状态，冗余并行处理状态和并行处理状态。 该装置执行中断处理以提供关于并行处理系统的程序执行条件的信息。 该装置有效地提供关于在多处理器系统中执行的并行处理的信息。

公开(公告)号：US5825193A

公开(公告)日：1998-10-20

申请号：US575735

申请日：1995-12-18

Applicant: Yoshiro Nakata ,  Shin Hashimoto ,  Isao Miyanaga

Inventor： Yoshiro Nakata ,  Shin Hashimoto ,  Isao Miyanaga

IPC: G01R31/28 ,  H01L21/66 ,  H01L21/82 ,  H01L21/822 ,  H01L27/04

CPC classification number: G01R31/2884 ,  G01R31/2849

Abstract: A semiconductor integrated circuit apparatus having a plurality of semiconductor integrated circuit devices, each of the plurality of semiconductor devices including a semiconductor integrated circuit formed on a semiconductor substrate, a reference voltage input terminal formed on the semiconductor substrate which is operative for receiving a reference voltage input from outside of the semiconductor substrate, and a burn-in voltage control circuit formed on the semiconductor substrate operative for receiving the reference voltage which is output from the reference voltage input terminal. The burn-in voltage control circuit generates a burn-in supply voltage which is input to the semiconductor integrated circuit, and also maintains the burn-in supply voltage at the reference voltage level such that each of the integrated circuits receives a burn-in supply voltage having the same voltage level.

Abstract translation: 一种具有多个半导体集成电路器件的半导体集成电路器件，所述多个半导体器件中的每一个包括形成在半导体衬底上的半导体集成电路，形成在所述半导体衬底上的参考电压输入端子，所述参考电压输入端子用于接收参考电压 从半导体衬底的外部输入，以及形成在半导体衬底上的老化电压控制电路，用于接收从参考电压输入端子输出的参考电压。 老化电压控制电路产生输入到半导体集成电路的老化电源电压，并且将老化电源电压维持在参考电压电平，使得每个集成电路接收老化电源 电压具有相同的电压电平。

公开(公告)号：US5795828A

公开(公告)日：1998-08-18

申请号：US675667

申请日：1996-07-03

Applicant: Masayuki Endo ,  Akemi Kawaguchi ,  Mikio Nishio ,  Shin Hashimoto

Inventor： Masayuki Endo ,  Akemi Kawaguchi ,  Mikio Nishio ,  Shin Hashimoto

IPC: C23C18/34 ,  C23C18/40 ,  C23C18/44 ,  H01L21/44

CPC classification number: C23C18/40 ,  C23C18/34 ,  C23C18/44

Abstract: A contact hole and a wiring groove are formed in an insulating layer formed on a semiconductor substrate. A silver layer is formed inside of the contact hole and the wiring groove and on the insulating layer with the use of an electroless plating bath comprising: silver nitrate containing silver ions; tartaric acid serving as a reducing agent of the silver ions; ethylenediamine serving as a complexing agent of the silver ions; and metallic ions of tetramethylammoniumhydroxide serving as a pH control agent. Then, the silver layer on the insulating layer is removed by a chemical and mechanical polishing method such that an embedded wiring is formed in each of the contact hole and the wiring groove.

Abstract translation: 在半导体衬底上形成的绝缘层中形成接触孔和布线槽。 通过使用含有银离子的硝酸银的化学镀浴，在接触孔和布线槽内部和绝缘层上形成银层; 酒石酸作为银离子的还原剂; 乙二胺作为银离子的络合剂; 和作为pH调节剂的四甲基氢氧化铵的金属离子。 然后，通过化学和机械抛光方法去除绝缘层上的银层，使得在每个接触孔和布线槽中形成嵌入的布线。