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70 条记录 (耗时 0.033 秒)

    High-speed data sampler for optical interconnect
    63.
    发明授权
    High-speed data sampler for optical interconnect 有权
    用于光互连的高速数据采样器

    公开(公告)号：US07386080B2

    公开(公告)日：2008-06-10

    申请号：US10673218

    申请日：2003-09-30

    申请人： Fabrice Paillet ,  Tanay Karnik ,  Jianping Xu

    发明人： Fabrice Paillet ,  Tanay Karnik ,  Jianping Xu

    IPC分类号： H04L7/00

    CPC分类号： H04L7/0079 ,  H03L7/0812 ,  H04L7/0008

    摘要： A system and method for sampling a data stream generates a number of clock signals having equally spaced phases and then samples a data stream using the clock signals. The clock phases are preferably based on a predetermined fraction of a data rate frequency of the data stream, and sampling is performed based on predetermined combinations of the clock signals. While the system and method is suitable for sampling data transmitted for a wide variety of data rates, the system and method is especially well-suited to sampling at data transmitted at high rates, for example, equal to or greater than 20 Gb/s.

    摘要翻译： 用于对数据流进行采样的系统和方法产生具有相等间隔相位的多个时钟信号，然后使用时钟信号对数据流进行采样。 时钟相位优选地基于数据流的数据速率频率的预定分数，并且基于时钟信号的预定组合来执行采样。 虽然系统和方法适合于为各种数据速率传输的数据采样，但是该系统和方法特别适合于以高速率传输的数据进行采样，例如等于或大于20Gb / s。

    Wireless display systems and stylii
    64.
    发明授权
    Wireless display systems and stylii 失效
    无线显示系统和stylii

    公开(公告)号：US07248251B2

    公开(公告)日：2007-07-24

    申请号：US10794695

    申请日：2004-03-05

    申请人： Jianping Xu ,  Stephen H. Hunt

    发明人： Jianping Xu ,  Stephen H. Hunt

    IPC分类号： G09G5/00

    CPC分类号： G06F3/0433 ,  G06F3/03545

    摘要： A wireless coordinate input system for a display system includes a stylus that transmits ultrasonic energy to a plurality of ultrasonic receiving stations in a projection plane. In an embodiment, the stylus may include one ultrasonic transmitter used for determination of three-dimensional coordinates of the stylus relative to the projection plane. The stylus may also include a second ultrasonic transmitter controlled by a pressure-activated switch. When the stylus is pressed against the projection plane, the second transmitter turns on and is used for determination of two-dimensional coordinates of the stylus in the projection plane. The stylus may also include a higher frequency burst transmitter used to generate a time reference. One or more of the ultrasonic receiving stations may also include an ultrasonic transmitter for calibration.

    摘要翻译： 用于显示系统的无线坐标输入系统包括将超声波能量发送到投影平面中的多个超声波接收站的触笔。 在一个实施例中，触控笔可以包括用于确定触控笔相对于投影平面的三维坐标的一个超声发射器。 触针还可以包括由压力启动开关控制的第二超声波发射器。 当触控笔被按压在投影平面上时，第二个发射器接通并用于确定投影平面中触针的二维坐标。 触笔还可以包括用于产生时间参考的更高频率的串行发射机。 一个或多个超声波接收站还可以包括用于校准的超声波发射器。

    Symmetric and non-stacked XOR circuit
    65.
    发明授权
    Symmetric and non-stacked XOR circuit 有权

    公开(公告)号：US07088138B2

    公开(公告)日：2006-08-08

    申请号：US10929412

    申请日：2004-08-31

    申请人： Jianping Xu ,  Fabrice Paillet ,  Tanay Karnik

    发明人： Jianping Xu ,  Fabrice Paillet ,  Tanay Karnik

    IPC分类号： H03K19/21

    CPC分类号： H03K19/215

    摘要： A CML XOR logic circuit is provided that includes a pair of pull-up transistors, a pair of current source transistors and a logic switch network coupled between the pull-up transistors and the current source transistors. The logic switch network including a plurality of transistors divided into a first branch, a second branch and a third branch. A tail current flows through the first branch, the second branch or the third branch based on at least two input signals to the plurality of transistors.

    Low-swing level shifter
    66.
    发明申请
    Low-swing level shifter 有权
    低摆幅电平转换器

    公开(公告)号：US20060170481A1

    公开(公告)日：2006-08-03

    申请号：US11047442

    申请日：2005-01-31

    申请人： Fabrice Paillet ,  David Rennie ,  Tanay Karnik ,  Jianping Xu

    发明人： Fabrice Paillet ,  David Rennie ,  Tanay Karnik ,  Jianping Xu

    IPC分类号： H03B1/00

    CPC分类号： H03K19/018507

    摘要： In general, in one aspect, the disclosure describes an apparatus for shifting a low swing signal. The apparatus includes a first pair of transistors to receive a first input signal and a second input signal and to generate a first output signal that is a shifted version of the first input signal. The apparatus further includes a second pair of transistors to receive the first input signal and the second input signal and to generate a second output signal that is a shifted version of the second input signal.

    摘要翻译： 通常，在一个方面，本公开描述了一种用于移动低挥杆信号的装置。 该装置包括第一对晶体管，用于接收第一输入信号和第二输入信号，并产生作为第一输入信号的偏移版本的第一输出信号。 该装置还包括第二对晶体管，用于接收第一输入信号和第二输入信号，并产生作为第二输入信号的移位版本的第二输出信号。

    Oscillator delay stage with active inductor
    67.
    发明申请
    Oscillator delay stage with active inductor 失效
    具有有源电感的振荡器延迟级

    公开(公告)号：US20060103479A1

    公开(公告)日：2006-05-18

    申请号：US10991976

    申请日：2004-11-18

    申请人： Fabrice Paillet ,  Tanay Karnik ,  Jianping Xu

    发明人： Fabrice Paillet ,  Tanay Karnik ,  Jianping Xu

    IPC分类号： H03K3/03

    CPC分类号： H03K3/0322 ,  H03K5/133 ,  H03K2005/00208 ,  H03L7/0995

    摘要： According to some embodiments, a circuit includes a ring oscillator delay stage. The delay stage may include a first transistor, a second transistor, and an active inductor. A gate of the first transistor may receive a first input signal, a gate of the second transistor may receive a second input signal, a source of the second transistor may be coupled to a source of the first transistor, and the active inductor may be coupled to a drain of the first transistor.

    摘要翻译： 根据一些实施例，电路包括环形振荡器延迟级。 延迟级可以包括第一晶体管，第二晶体管和有源电感器。 第一晶体管的栅极可以接收第一输入信号，第二晶体管的栅极可以接收第二输入信号，第二晶体管的源极可以耦合到第一晶体管的源极，并且有源电感器可以耦合 到第一晶体管的漏极。

    Symmetric and non-stacked XOR circuit
    68.
    发明申请
    Symmetric and non-stacked XOR circuit 有权
    对称和非堆叠XOR电路

    公开(公告)号：US20060044010A1

    公开(公告)日：2006-03-02

    申请号：US10929412

    申请日：2004-08-31

    申请人： Jianping Xu ,  Fabrice Paillet ,  Tanay Karnik

    发明人： Jianping Xu ,  Fabrice Paillet ,  Tanay Karnik

    IPC分类号： H03K19/21

    CPC分类号： H03K19/215

    摘要： A CML XOR logic circuit is provided that includes a pair of pull-up transistors, a pair of current source transistors and a logic switch network coupled between the pull-up transistors and the current source transistors. The logic switch network including a plurality of transistors divided into a first branch, a second branch and a third branch. A tail current flows through the first branch, the second branch or the third branch based on at least two input signals to the plurality of transistors.

    摘要翻译： 提供了一种CML异或逻辑电路，其包括一对上拉晶体管，一对电流源晶体管和耦合在上拉晶体管和电流源晶体管之间的逻辑开关网络。 逻辑开关网络包括分成第一分支，第二分支和第三分支的多个晶体管。 基于至少两个到多个晶体管的输入信号，尾流通过第一分支，第二分支或第三分支。

    Laser driver for high speed short distance links
    69.
    发明申请
    Laser driver for high speed short distance links 有权
    用于高速短距离连接的激光驱动器

    公开(公告)号：US20050226279A1

    公开(公告)日：2005-10-13

    申请号：US10816321

    申请日：2004-03-31

    申请人： Jianping Xu ,  Fabrice Paillet ,  Tanay Karnik

    发明人： Jianping Xu ,  Fabrice Paillet ,  Tanay Karnik

    IPC分类号： H01S3/10 ,  H01S5/042 ,  H01S5/183 ,  H04B10/155

    CPC分类号： H04B10/564 ,  H01S5/0427 ,  H01S5/183 ,  H04B10/503

    摘要： One embodiment of a laser driver for high speed interconnections includes a buffered level shifter to shift the input voltage level to an appropriate level. In some embodiments the buffered level shifter may be tuned to provide a desired level shift with impedance matched to the driving load. Another embodiment converts a digital signal to a current train of a bias mode to represent logical zero and of a modulation mode to represent logical one, wherein one or both of the bias mode and modulation mode may be adjusted, for example by a programmable control circuit or by an adaptive control circuit. Some embodiments also provide circuitry for reducing overshoot of the output signal.

    摘要翻译： 用于高速互连的激光驱动器的一个实施例包括用于将输入电压电平转换到适当电平的缓冲电平移位器。 在一些实施例中，缓冲电平移位器可以被调谐以提供具有与驱动负载匹配的阻抗的期望电平移位。 另一个实施例将数字信号转换为偏置模式的当前列，以表示逻辑零和调制模式以表示逻辑1，其中偏置模式和调制模式中的一个或两个可以例如由可编程控制电路 或通过自适应控制电路。 一些实施例还提供用于减少输出信号的过冲的电路。