摘要:
There is provided a scaling operator for calculating a quotient in a first residue format obtained by dividing an input number in the first residue format by a second modulus in a residue number system for representing numbers by the first residue format of a set of residues obtained with respect to first modulus and residues obtained with respect to second modulus, having a subtracter for outputting inter-moduli values of difference which are values of difference between the residues obtained with respect to the first modulus and the residues obtained with respect to the second modulus and a quotient outputting section for outputting a set of residues of the quotient obtained with respect to the first modulus and residues of the quotient obtained with respect to the second modulus as the quotient based on the inter-moduli values of difference.
摘要:
A jitter measuring apparatus for measuring timing jitter of a signal-under-test is provided, wherein the jitter measuring apparatus includes a pulse generator for outputting a pulse signal of a predetermined pulse width for an edge of the signal-under-test, whose timing jitter is under test; and a jitter measuring sub-unit for extracting the timing jitter on the basis of a duty ratio of each cycle of the signal output by the pulse generator.
摘要:
There is provided a jitter estimating apparatus for calculating phase noise waveform of an input signal and for estimating a peak value, a peak-to-peak value and a worst value of jitter of the input signal, and probability to generate jitter based on the phase noise waveform. Timing jitter sequence, period jitter sequence, and cycle to cycle period jitter sequence of the input signal are calculated and the peak value and the peak to peak value for each jitter, as well as probability to generate jitter may be estimated.
摘要:
A testing apparatus for testing an electronic device, includes a deterministic jitter applying means for applying deterministic jitter to a given input signal without any amplitude variation component occurring and supplying the input signal applied with the deterministic jitter to the electronic device, a jitter amount controlling means for controlling magnitude of the deterministic jitter to be applied by the deterministic jitter applying means and a judging means for judging quality of the electronic device based on an output signal outputted by the electronic device in response to the input signal.
摘要:
A signal under measurement is transformed into a complex analytic signal using a Hilbert transformer and an instantaneous phase of this analytic signal is estimated. A linear phase is subtracted from the instantaneous phase to obtain a phase noise waveform. The phase noise waveform is sampled in the proximity of a zero crossing point of a real part of the analytic signal. A differential waveform of the sample phase noise waveform is calculated to obtain a differential phase noise waveform. An RMS jitter is obtained from the phase noise waveform, and a peak-to-peak jitter is obtained from the phase noise waveform.
摘要:
A clock signal xc(t) that has been converted into a digital signal is transformed into a complex analytic signal zc(t), and an instantaneous phase &THgr; of the zc(t) is estimated. A linear phase is removed from the &THgr; to obtain a phase noise waveform &Dgr;&phgr;(t). The &Dgr;&phgr;(t) is sampled at a timing close to a zero crossing timing of the xc(t) to extract the &Dgr;&phgr;(t) sample. A root-mean-square value &sgr;t of the &Dgr;&phgr;(t) samples is obtained, and a differential waveform of the extracted &Dgr;&phgr;(t) samples is also obtained to obtain a period jitter Jp. Then a root-mean-square value &sgr;p of the Jp is obtained to calculate a correlation coefficient &rgr;tt=1−(&sgr;p2/(2&sgr;t2)). If necessary, an SNRt=&rgr;tt2/(1−&rgr;tt2) is obtained. The &rgr;tt and/or the SNRt is defined as a quality measure of a clock signal.
摘要:
There is provided an apparatus for and a method of measuring a jitter wherein a clock waveform XC(t) is transformed into an analytic signal using Hilbert transform and a varying term &Dgr;&phgr;(t) of an instantaneous phase of this analytic signal is estimated.
摘要:
An image processing apparatus for detecting the inclination of an object is provided. This image processing apparatus has a read means which reads the object and outputs image data, an amount of change calculation means which calculates the sum of the amounts of change of the image data of the object in at least one direction, and an inclination calculation means which calculates the inclination of the object based on the sum calculated by the amount of change calculation means.
摘要:
In a rotary pump, an outer rotor and an inner rotor are assembled in a casing such that, when a clearance between an inner teeth portion of the outer rotor and an outer teeth portion of the inner rotor is substantially nullified at a first closed gap portion having a maximum volume formed between the inner teeth portion and the outer teeth portion, a clearance between the outer rotor and the casing on a side of the first closed gap portion and a clearance between the outer rotor and the casing on a side of a second closed gap portion having a minimum volume, become substantially an equivalent interval. As a result, the outer rotor and the casing can be brought into contact with each other on the side of the second closed gap portion rather than the central axis of the inner rotor. Even in a high pressure discharge operation, the outer rotor is not locked by being squeezed between the inner rotor and the casing.
摘要:
In a method for fabricating an LSI in which primitive devices such as transistors are formed on a semiconductor substrate and a plurality of interconnect layers are formed thereover to provide sub-circuits of successively larger scale and increasing complexity including sub-circuits which are formed by a connection of the primitive devices and sub-circuits of a larger scale which are formed by a connection of the sub-circuits, under a condition that an intermediate interconnect layer is formed, an exhaustive test, a functional test, a stuck-at fault test, a quiescent power supply current test or the like takes place with respect to the primitive devices or the sub-circuits which are wired together by the intermediate interconnect layer, and subsequently, a wiring connection test takes place after the formation of each subsequent interconnect layer. A fault coverage is improved while a testing cost and a fabricating cost are reduced.