Method for fabricating integrated circuit (IC) dies with multi-layered interconnect structures
    1.
    发明授权
    Method for fabricating integrated circuit (IC) dies with multi-layered interconnect structures 失效
    具有多层互连结构的集成电路(IC)芯片的制造方法

    公开(公告)号:US06423558B1

    公开(公告)日:2002-07-23

    申请号:US09512780

    申请日:2000-02-25

    IPC分类号: G01R3126

    摘要: In a method for fabricating an LSI in which primitive devices such as transistors are formed on a semiconductor substrate and a plurality of interconnect layers are formed thereover to provide sub-circuits of successively larger scale and increasing complexity including sub-circuits which are formed by a connection of the primitive devices and sub-circuits of a larger scale which are formed by a connection of the sub-circuits, under a condition that an intermediate interconnect layer is formed, an exhaustive test, a functional test, a stuck-at fault test, a quiescent power supply current test or the like takes place with respect to the primitive devices or the sub-circuits which are wired together by the intermediate interconnect layer, and subsequently, a wiring connection test takes place after the formation of each subsequent interconnect layer. A fault coverage is improved while a testing cost and a fabricating cost are reduced.

    摘要翻译: 在制造LSI的方法中,其中在半导体衬底上形成诸如晶体管的基本器件,并在其上形成多个互连层,以提供连续更大规模的子电路和增加复杂性的子电路,包括由 在形成中间互连层的条件下,通过子电路的连接形成的较大规模的原始器件和子电路的连接,穷举测试,功能测试,卡入故障测试 ,相对于通过中间互连层连接在一起的原始器件或子电路进行静态电源电流测试等,随后在形成每个后续互连层之后进行布线连接测试 。 提高了故障覆盖率,同时降低了测试成本和制造成本。

    Apparatus for measuring jitter and method of measuring jitter
    2.
    发明授权
    Apparatus for measuring jitter and method of measuring jitter 失效
    用于测量抖动的装置和测量抖动的方法

    公开(公告)号:US07460592B2

    公开(公告)日:2008-12-02

    申请号:US11122262

    申请日:2005-05-04

    IPC分类号: H04B3/46 H04B17/00 H03K9/00

    CPC分类号: G01R31/31709

    摘要: There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, having a signal converting section for calculating a spectrum of the signal-under-measurement, a bandwidth calculating section for calculating frequency where a saturation rate of a value of the integrated spectrum of the signal-under-measurement becomes almost equal to a saturation rate set in advance in a band-to-be-measured set in advance as upper cutoff frequency of the band-to-be-measured to calculate the jitter and a jitter calculating section for measuring the jitter in the signal-under-measurement based on the spectaum in the band-to-be-measured of the signal-under-measurement.

    摘要翻译: 提供了一种用于测量测量信号中的抖动的抖动测量装置,具有用于计算测量信号的频谱的信号转换部分,用于计算频率的饱和率的频率的带宽计算部分, 信号未测量的综合频谱几乎等于预先设定在要测量的频带中的设定​​的饱和速率,作为要测量的频带的上限截止频率以计算抖动,并且 抖动计算部分,用于根据待测信号的测量范围内的光谱测量测量信号中的抖动。

    Apparatus for and method of measuring clock skew
    3.
    发明授权
    Apparatus for and method of measuring clock skew 失效
    仪器和测量时钟偏移的方法

    公开(公告)号:US07356109B2

    公开(公告)日:2008-04-08

    申请号:US11585526

    申请日:2006-10-23

    IPC分类号: H04L7/00

    摘要: Timing jitter sequences Δφj[n] and Δφk[n] of respective clock signals under measurement xj(t) and xk(t) are estimated, and a timing difference sequence between those timing jitter sequences is calculated. In addition, initial phase angles φ0j and φ0k of linear instantaneous phases of the xj(t) and xk(t) are estimated, respectively. A sum of a difference between those initial angles and the timing difference sequence is calculated to obtain a clock skew sequence between the xj(t) and xk(t).

    摘要翻译: (t)和x k(t),并且计算那些定时抖动序列之间的定时差异序列。 另外,x 0 和< 0< 0> (t)和x(k)分别被估计。 计算出这些初始角度和定时差分序列之间的差值的和,以获得x j(t)和x k(t)之间的时钟偏移序列。

    Apparatus for and method of measuring clock skew
    4.
    发明申请
    Apparatus for and method of measuring clock skew 失效
    仪器和测量时钟偏移的方法

    公开(公告)号:US20070036256A1

    公开(公告)日:2007-02-15

    申请号:US11585526

    申请日:2006-10-23

    IPC分类号: H04L7/00

    摘要: Timing jitter sequences Δφj[n] and Δφk[n] of respective clock signals under measurement xj(t) and xk(t) are estimated, and a timing difference sequence between those timing jitter sequences is calculated. In addition, initial phase angles φ0j and φ0k of linear instantaneous phases of the xj(t) and xk(t) are estimated, respectively. A sum of a difference between those initial angles and the timing difference sequence is calculated to obtain a clock skew sequence between the xj(t) and xk(t).

    摘要翻译: (t)和x k(t),并且计算那些定时抖动序列之间的定时差异序列。 另外,x 0 和< 0< 0> (t)和x(k)分别被估计。 计算出这些初始角度和定时差分序列之间的差值的和,以获得x j(t)和x k(t)之间的时钟偏移序列。

    Apparatus for measuring jitter and method of measuring jitter

    公开(公告)号:US20060268970A1

    公开(公告)日:2006-11-30

    申请号:US11137786

    申请日:2005-05-25

    IPC分类号: H04B3/46

    CPC分类号: G01R31/31709

    摘要: There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, including a pulse generating section having first pulse generating means for detecting edges of the data-signal-under-measurement to output a first pulse signal having a pulse width set in advance corresponding to the edge and second pulse generating means for detecting boundaries of data sections where data values do not change in the data-signal-under-measurement to output a second pulse signal having a pulse width set in advance over the edge timings of the boundaries of the detected data sections and a jitter calculating section for calculating timing jitter in the data-signal-under-measurement based on the first and second pulse signals.

    Apparatus for and method of measuring a jitter
    7.
    发明授权
    Apparatus for and method of measuring a jitter 有权
    用于测量抖动的装置和方法

    公开(公告)号:US06687629B1

    公开(公告)日:2004-02-03

    申请号:US09408280

    申请日:1999-09-29

    IPC分类号: G01R2926

    CPC分类号: G01R29/26

    摘要: A clock waveform XC(t) is transformed into a complex analytic signal using a Hilbert transformer and an instantaneous phase of this analytic signal is estimated. A linear phase is subtracted from the instantaneous phase to obtain a varying term &Dgr;&phgr;(t). A difference between the maximum value and the minimum value of the varying term &Dgr;&phgr;(t) is obtained as a peak-to-peak jitter, and a root-mean-square of the varying term &Dgr;&phgr;(t) is calculated to obtain an RMS jitter.

    摘要翻译: 使用希尔伯特变换器将时钟波形XC(t)变换为复数分析信号,并估计该分析信号的瞬时相位。 从瞬时相位减去线性相位以获得变化项Deltaphi(t)。 获得变化项Deltaphi(t)的最大值和最小值之间的差作为峰 - 峰抖动,并且计算变化项Deltaphi(t)的均方根以获得RMS 抖动。

    Apparatus for and method of measuring a peak jitter
    9.
    发明授权
    Apparatus for and method of measuring a peak jitter 失效
    用于测量峰值抖动的装置和方法

    公开(公告)号:US06460001B1

    公开(公告)日:2002-10-01

    申请号:US09538135

    申请日:2000-03-29

    IPC分类号: G06F1900

    CPC分类号: G01R29/26 H04L1/205

    摘要: An input clock signal is transformed into a complex analytic signal zc(t) by an analytic signal transforming means 13 and an instantaneous phase of its real part xc(t) is estimated using the analytic signal zc(t). A linear phase is removed from the instantaneous phase to obtain a phase noise waveform &Dgr;&phgr;(t). A peak value &Dgr;&phgr;max of absolute values of the &Dgr;&phgr;(t) is obtained, and 4&Dgr;&phgr;max is defined as the worst value of period jitter of the input signal. The &Dgr;&phgr;(t) is sampled at a timing close to a zero-crossing point of the xc(t) to extract the sample value. A differential between adjacent samples is obtained in the sequential order to calculate a root-mean-square value of the differentials (period jitters). An exp(−(2&Dgr;&phgr;max)2/(2&sgr;j2)) is calculated from the mean-square value &sgr;j and 2&Dgr;&phgr;max, and the calculated value is defined as a probability that a period jitter exceeds 2&Dgr;&phgr;max.

    摘要翻译: 通过分析信号变换装置13将输入时钟信号变换为复数分析信号zc(t),并使用分析信号zc(t)估计其实部xc(t)的瞬时相位。 从瞬时相位除去线性相位以获得相位噪声波形DELTAphi(t)。 获得DELTAphi(t)绝对值的峰值DELTAphimax,将4DELTAphimax定义为输入信号周期抖动的最差值。 在接近xc(t)的过零点的定时采样DELTA(t),以提取样本值。 按顺序获得相邻样本之间的差分,以计算差分的均方根(周期抖动)。 根据平均值sigmaj和2DELTAphimax计算出exp( - (2DELTAphimax)2 /(2sigmaj2)),计算出的值被定义为周期抖动超过2DELTAphimax的概率。

    Apparatus for and method of detecting a delay fault in a phase-locked loop circuit
    10.
    发明授权
    Apparatus for and method of detecting a delay fault in a phase-locked loop circuit 失效
    检测锁相环电路延时故障的装置及方法

    公开(公告)号:US06400129B1

    公开(公告)日:2002-06-04

    申请号:US09494321

    申请日:2000-01-28

    IPC分类号: G01R2500

    摘要: There is provided a method and an apparatus for detecting a delay fault in a phase-locked loop circuit. A frequency impulse is applied to the PLL circuit under test as a reference clock, and a waveform of a signal outputted from the PLL circuit under test is transformed to an analytic signal to estimate its instantaneous phase. A linear phase is estimated from the estimated instantaneous phase, and the estimated linear phase is removed from the estimated instantaneous phase to obtain a fluctuation term of the instantaneous phase. A delay fault is detected by comparing a time duration during which the PLL circuit stays in a state of oscillating a certain frequency with the time duration during which a fault-free PLL circuit stays in a state of oscillating a certain frequency.

    摘要翻译: 提供了一种用于检测锁相环电路中的延迟故障的方法和装置。 对被测定的PLL电路施加频率脉冲作为参考时钟,将从被测PLL PLL输出的信号的波形变换为分析信号,估计其瞬时相位。 从估计的瞬时相位估计线性相位,并且从估计的瞬时相位去除估计的线性相位以获得瞬时相位的波动项。 通过比较PLL电路停留在某个频率的振荡状态的持续时间与无故障PLL电路停留在某个频率的振荡状态的持续时间来检测延迟故障。