摘要:
In a method for fabricating an LSI in which primitive devices such as transistors are formed on a semiconductor substrate and a plurality of interconnect layers are formed thereover to provide sub-circuits of successively larger scale and increasing complexity including sub-circuits which are formed by a connection of the primitive devices and sub-circuits of a larger scale which are formed by a connection of the sub-circuits, under a condition that an intermediate interconnect layer is formed, an exhaustive test, a functional test, a stuck-at fault test, a quiescent power supply current test or the like takes place with respect to the primitive devices or the sub-circuits which are wired together by the intermediate interconnect layer, and subsequently, a wiring connection test takes place after the formation of each subsequent interconnect layer. A fault coverage is improved while a testing cost and a fabricating cost are reduced.
摘要:
There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, having a signal converting section for calculating a spectrum of the signal-under-measurement, a bandwidth calculating section for calculating frequency where a saturation rate of a value of the integrated spectrum of the signal-under-measurement becomes almost equal to a saturation rate set in advance in a band-to-be-measured set in advance as upper cutoff frequency of the band-to-be-measured to calculate the jitter and a jitter calculating section for measuring the jitter in the signal-under-measurement based on the spectaum in the band-to-be-measured of the signal-under-measurement.
摘要:
Timing jitter sequences Δφj[n] and Δφk[n] of respective clock signals under measurement xj(t) and xk(t) are estimated, and a timing difference sequence between those timing jitter sequences is calculated. In addition, initial phase angles φ0j and φ0k of linear instantaneous phases of the xj(t) and xk(t) are estimated, respectively. A sum of a difference between those initial angles and the timing difference sequence is calculated to obtain a clock skew sequence between the xj(t) and xk(t).
摘要:
Timing jitter sequences Δφj[n] and Δφk[n] of respective clock signals under measurement xj(t) and xk(t) are estimated, and a timing difference sequence between those timing jitter sequences is calculated. In addition, initial phase angles φ0j and φ0k of linear instantaneous phases of the xj(t) and xk(t) are estimated, respectively. A sum of a difference between those initial angles and the timing difference sequence is calculated to obtain a clock skew sequence between the xj(t) and xk(t).
摘要:
There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, including a pulse generating section having first pulse generating means for detecting edges of the data-signal-under-measurement to output a first pulse signal having a pulse width set in advance corresponding to the edge and second pulse generating means for detecting boundaries of data sections where data values do not change in the data-signal-under-measurement to output a second pulse signal having a pulse width set in advance over the edge timings of the boundaries of the detected data sections and a jitter calculating section for calculating timing jitter in the data-signal-under-measurement based on the first and second pulse signals.
摘要:
A jitter measurement apparatus for measuring an intrinsic jitter of a circuit to be tested including a phase detector which outputs a signal according to a phase difference between a supplied first input signal and a supplied second input signal, includes: an input unit for supplying an identical signal to the phase detector as the first input signal and as the second input signal; and a jitter measurement unit for measuring the intrinsic jitter of the circuit to be tested by measuring a jitter of a signal which is generated in an inside of the circuit to be tested according to an signal output from the phase detector.
摘要:
A clock waveform XC(t) is transformed into a complex analytic signal using a Hilbert transformer and an instantaneous phase of this analytic signal is estimated. A linear phase is subtracted from the instantaneous phase to obtain a varying term &Dgr;&phgr;(t). A difference between the maximum value and the minimum value of the varying term &Dgr;&phgr;(t) is obtained as a peak-to-peak jitter, and a root-mean-square of the varying term &Dgr;&phgr;(t) is calculated to obtain an RMS jitter.
摘要:
Timing jitter sequences &Dgr;&phgr;j[n] and &Dgr;&phgr;k[n] of respective clock signals under measurement xj(t) and xk(t) are obtained, and a covariance &sgr;tj,tk=(1/N)&Sgr;i=1N&Dgr;&phgr;j[i]·&Dgr;&phgr;k[i] is obtained. In addition, root-mean-square values &sgr;tj and &sgr;tk of the respective &Dgr;&phgr;j[n] and &Dgr;&phgr;k[n] are obtained, and a cross-correlation coefficient &rgr;=&sgr;tj,tk/(&sgr;tj·&sgr;tk) between the xj(t) and xk(t) is calculated.
摘要:
An input clock signal is transformed into a complex analytic signal zc(t) by an analytic signal transforming means 13 and an instantaneous phase of its real part xc(t) is estimated using the analytic signal zc(t). A linear phase is removed from the instantaneous phase to obtain a phase noise waveform &Dgr;&phgr;(t). A peak value &Dgr;&phgr;max of absolute values of the &Dgr;&phgr;(t) is obtained, and 4&Dgr;&phgr;max is defined as the worst value of period jitter of the input signal. The &Dgr;&phgr;(t) is sampled at a timing close to a zero-crossing point of the xc(t) to extract the sample value. A differential between adjacent samples is obtained in the sequential order to calculate a root-mean-square value of the differentials (period jitters). An exp(−(2&Dgr;&phgr;max)2/(2&sgr;j2)) is calculated from the mean-square value &sgr;j and 2&Dgr;&phgr;max, and the calculated value is defined as a probability that a period jitter exceeds 2&Dgr;&phgr;max.
摘要:
There is provided a method and an apparatus for detecting a delay fault in a phase-locked loop circuit. A frequency impulse is applied to the PLL circuit under test as a reference clock, and a waveform of a signal outputted from the PLL circuit under test is transformed to an analytic signal to estimate its instantaneous phase. A linear phase is estimated from the estimated instantaneous phase, and the estimated linear phase is removed from the estimated instantaneous phase to obtain a fluctuation term of the instantaneous phase. A delay fault is detected by comparing a time duration during which the PLL circuit stays in a state of oscillating a certain frequency with the time duration during which a fault-free PLL circuit stays in a state of oscillating a certain frequency.