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公开(公告)号:US20230260896A1
公开(公告)日:2023-08-17
申请号:US17837686
申请日:2022-06-10
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hsien-Pin Hu , Shang-Yun Hou , Shih-Wen Huang
IPC: H01L23/522 , H01L23/528 , H01L23/31 , H01L21/768 , H01L21/56
CPC classification number: H01L23/5226 , H01L21/56 , H01L21/76898 , H01L23/3114 , H01L23/5283
Abstract: A device package including an interposer. The interposer comprising: a semiconductor substrate; first through vias extending through the semiconductor substrate; an interconnect structure comprising: a first metallization pattern in an inorganic insulating material; and a passivation film over the first metallization pattern; and a first redistribution structure over the passivation film. The first redistribution structure comprising a second metallization pattern in an organic insulating material. The device package further including an integrated circuit die over and attached to the interposer; and a first encapsulant around the integrated circuit die.
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公开(公告)号:US11699674B2
公开(公告)日:2023-07-11
申请号:US17409007
申请日:2021-08-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Kuan-Yu Huang , Li-Chung Kuo , Sung-Hui Huang , Shang-Yun Hou , Tsung-Yu Chen , Chien-Yuan Huang
IPC: H01L23/00 , H01L25/065 , H01L23/32 , H01L21/60
CPC classification number: H01L24/27 , H01L23/32 , H01L24/94 , H01L24/95 , H01L25/0657 , H01L2021/60097
Abstract: A method of forming a semiconductor device includes applying an adhesive material in a first region of an upper surface of a substrate, where applying the adhesive material includes: applying a first adhesive material at first locations of the first region; and applying a second adhesive material at second locations of the first region, the second adhesive material having a different material composition from the first adhesive material. The method further includes attaching a ring to the upper surface of the substrate using the adhesive material applied on the upper surface of the substrate, where the adhesive material is between the ring and the substrate after the ring is attached.
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公开(公告)号:US11592618B2
公开(公告)日:2023-02-28
申请号:US17226542
申请日:2021-04-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hsing-Kuo Hsia , Chen-Hua Yu , Kuo-Chiang Ting , Shang-Yun Hou
Abstract: A method includes forming a first photonic package, wherein forming the first photonic package includes patterning a silicon layer to form a first waveguide, wherein the silicon layer is on an oxide layer, and wherein the oxide layer is on a substrate; forming vias extending into the substrate; forming a first redistribution structure over the first waveguide and the vias, wherein the first redistribution structure is electrically connected to the vias; connecting a first semiconductor device to the first redistribution structure; removing a first portion of the substrate to form a first recess, wherein the first recess exposes the oxide layer; and filling the first recess with a first dielectric material to form a first dielectric region.
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公开(公告)号:US11532585B2
公开(公告)日:2022-12-20
申请号:US17121353
申请日:2020-12-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Kuo-Chiang Ting , Chi-Hsi Wu , Shang-Yun Hou , Tu-Hao Yu , Chia-Hao Hsu , Ting-Yu Yeh
IPC: H01L23/00 , H01L21/56 , H01L21/683 , H01L21/48 , H01L23/498 , H01L23/538 , H01L25/18 , H01L25/00 , H01L23/31
Abstract: A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.
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公开(公告)号:US11527454B2
公开(公告)日:2022-12-13
申请号:US17362185
申请日:2021-06-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Hua Yu , Wen-Hsin Wei , Chi-Hsi Wu , Shang-Yun Hou , Jing-Cheng Lin , Hsien-Pin Hu , Ying-Ching Shih , Szu-Wei Lu
IPC: H01L23/31 , H01L23/16 , H01L21/56 , H01L23/14 , H01L21/48 , H01L25/03 , H01L25/065 , H01L23/48 , H01L23/498 , H01L23/538 , H01L23/00
Abstract: An embodiment is a method including: attaching a first die to a first side of a first component using first electrical connectors, attaching a first side of a second die to first side of the first component using second electrical connectors, attaching a dummy die to the first side of the first component in a scribe line region of the first component, adhering a cover structure to a second side of the second die, and singulating the first component and the dummy die to form a package structure.
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公开(公告)号:US20220359355A1
公开(公告)日:2022-11-10
申请号:US17870099
申请日:2022-07-21
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shang-Yun Hou , Hsien-Pin Hu , Sao-Ling Chiu , Wen-Hsin Wei , Ping-Kang Huang , Chih-Ta Shen , Szu-Wei Lu , Ying-Ching Shih , Wen-Chih Chiou , Chi-Hsi Wu , Chen-Hua Yu
IPC: H01L23/498 , H01L23/00 , H01L21/48 , H01L23/31 , H01L21/56
Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.
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公开(公告)号:US11495472B2
公开(公告)日:2022-11-08
申请号:US17065265
申请日:2020-10-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chung-Yu Lu , Ping-Kang Huang , Sao-Ling Chiu , Shang-Yun Hou
IPC: H01L21/48 , H01L23/00 , H01L23/538 , H01L25/065 , H01L25/18 , H01L25/00 , H01L23/498 , H01L21/56
Abstract: One embodiment includes partially forming a first through via in a substrate of an interposer, the first through via extending into a first side of the substrate of the interposer. The method also includes bonding a first die to the first side of the substrate of the interposer. The method also includes recessing a second side of the substrate of the interposer to expose the first through via, the first through via protruding from the second side of the substrate of the interposer, where after the recessing, the substrate of the interposer is less than 50 μm thick. The method also includes and forming a first set of conductive bumps on the second side of the substrate of the interposer, at least one of the first set of conductive bumps being electrically coupled to the exposed first through via.
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公开(公告)号:US20220328395A1
公开(公告)日:2022-10-13
申请号:US17852961
申请日:2022-06-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Weiming Chris Chen , Kuo-Chiang Ting , Shang-Yun Hou
IPC: H01L23/498 , H01L23/31 , H01L21/48 , H01L21/56 , H01L23/538
Abstract: A method of forming a semiconductor structure includes bonding a first die and a second die to a first side of a first interposer and to a first side of a second interposer, respectively, where the first interposer is laterally adjacent to the second interposer; encapsulating the first interposer and the second interposer with a first molding material; forming a first recess in a second side of the first interposer opposing the first side of the first interposer; forming a second recess in a second side of the second interposer opposing the first side of the second interposer; and filling the first recess and the second recess with a first dielectric material.
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公开(公告)号:US11417580B2
公开(公告)日:2022-08-16
申请号:US17012299
申请日:2020-09-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Hua Yu , Wen-Hsin Wei , Chi-Hsi Wu , Shang-Yun Hou , Jing-Cheng Lin , Hsien-Pin Hu , Ying-Ching Shih , Szu-Wei Lu
IPC: H01L23/31 , H01L23/16 , H01L21/56 , H01L23/14 , H01L21/48 , H01L25/03 , H01L25/065 , H01L23/48 , H01L23/498 , H01L23/538 , H01L23/00
Abstract: An embodiment is a method including: attaching a first die to a first side of a first component using first electrical connectors, attaching a first side of a second die to first side of the first component using second electrical connectors, attaching a dummy die to the first side of the first component in a scribe line region of the first component, adhering a cover structure to a second side of the second die, and singulating the first component and the dummy die to form a package structure.
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公开(公告)号:US20220013492A1
公开(公告)日:2022-01-13
申请号:US16924147
申请日:2020-07-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Kuan-Yu Huang , Chih-Wei Wu , Sung-Hui Huang , Shang-Yun Hou , Ying-Ching Shih , Cheng-Chieh Li
IPC: H01L23/00
Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes first and second package components stacked upon and electrically connected to each other. The first package component includes first and second conductive bumps, the second package component includes third and fourth conductive bumps, and dimensions of the first and second conductive bumps are less than those of the third and fourth conductive bumps. The semiconductor package includes a first joint structure partially wrapping the first conductive bump and the third conductive bump, and a second joint structure partially wrapping the second conductive bump and the fourth conductive bump. A curvature of the first joint structure is different from a curvature of the second joint structure.
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