公开(公告)号：US20100065851A1

公开(公告)日：2010-03-18

申请号：US12530612

申请日：2008-02-18

申请人： Naoki Makita

发明人： Naoki Makita

IPC分类号： H01L33/00 ,  H01L29/04 ,  H01L21/336

CPC分类号： H01L27/12 ,  H01L27/1218 ,  H01L27/1229 ,  H01L27/1281

摘要： A semiconductor device 100 includes a thin-film transistor 123 and a thin-film diode 124. The thin-film transistor 123 includes a semiconductor layer S1 with a channel region 114, a source region and a drain region 112, a gate electrode 109 that controls the conductivity of the channel region 114, and a gate insulating film 108 arranged between the semiconductor layer and the gate electrode 109. The thin-film diode 124 includes a semiconductor layer S2 with at least an n-type region 113 and a p-type region 117. The respective semiconductor layers S1 and S2 of the thin-film transistor 123 and the thin-film diode 124 are portions of a single crystalline semiconductor layer, obtained by crystallizing the same crystalline semiconductor film, but have been crystallized to mutually different degrees.

摘要翻译： 半导体器件100包括薄膜晶体管123和薄膜二极管124.薄膜晶体管123包括具有沟道区域114，源极区域和漏极区域112的半导体层S1，栅极电极109 控制沟道区域114的导电性和布置在半导体层和栅极109之间的栅极绝缘膜108.薄膜二极管124包括具有至少n型区域113和p-型区域的半导体层S2， 类型区域117.薄膜晶体管123和薄膜二极管124的各个半导体层S1和S2是通过结晶相同的结晶半导体膜而已经结晶到相互不同的单晶半导体层的部分 度。

公开(公告)号：US07625786B2

公开(公告)日：2009-12-01

申请号：US11088888

申请日：2005-03-25

申请人： Naoki Makita ,  Misako Nakazawa ,  Hideto Ohnuma ,  Takuya Matsuo

发明人： Naoki Makita ,  Misako Nakazawa ,  Hideto Ohnuma ,  Takuya Matsuo

IPC分类号： H01L21/84

CPC分类号： H01L29/66757 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/1277 ,  H01L29/78612 ,  H01L29/78621

摘要： Problems in prior art regarding an n-channel TFT in the source/drain gettering method are solved. In the n-channel TFT, its source/drain regions contain only an n-type impurity. Therefore, compared to a p-channel TFT whose source/drain regions contain an n-type impurity and a higher concentration of p-type impurity, the gettering efficiency is inferior in a channel region of the n-channel transistor. Accordingly, the problem of inferior gettering efficiency in the n-channel TFT can be solved by providing at an end of its source/drain regions a highly efficient gettering region that contains an n-type impurity and a p-type impurity both with the concentration of the p-type impurity set higher than the concentration of the n-type impurity.

摘要翻译： 解决了在源极/漏极吸杂方法中关于n沟道TFT的现有技术中的问题。 在n沟道TFT中，其源极/漏极区仅包含n型杂质。 因此，与源极/漏极区域包含n型杂质和较高浓度的p型杂质的p沟道TFT相比，n沟道晶体管的沟道区域的吸杂效率较差。 因此，可以通过在其源极/漏极区域的末端设置包含n型杂质的高效吸气区域和浓度为p型的p型杂质来解决n沟道TFT的吸杂效率差的问题 的p型杂质的浓度高于n型杂质浓度。

公开(公告)号：US07332385B2

公开(公告)日：2008-02-19

申请号：US10365911

申请日：2003-02-13

申请人： Misako Nakazawa ,  Naoki Makita

发明人： Misako Nakazawa ,  Naoki Makita

IPC分类号： H01L21/00

CPC分类号： H01L27/12 ,  H01L27/1277 ,  H01L29/42384 ,  H01L29/4908

摘要： A catalytic element is added to an amorphous semiconductor film and heat treatment is conducted therefor to produce a crystalline semiconductor film with good quality, a TFT (semiconductor device) with a satisfactory characteristic is realized using the crystalline semiconductor film. A semiconductor layer includes a region containing an impurity element which has a concentration of 1×1019/cm3 to 1×1021/cm3 and belongs to group 15 of the periodic table and an impurity element which has a concentration of 1.5×1019/cm3 to 3×1021/cm3 and belongs to group 13 of the periodic table, and the region is a region to which a catalytic element left in the semiconductor film (particularly, the channel forming region) moves.

摘要翻译： 将催化元素添加到非晶半导体膜中，并进行热处理以产生质量好的结晶半导体膜，使用晶体半导体膜实现具有令人满意的特性的TFT（半导体器件）。 半导体层包括含有浓度为1×10 19 / cm 3至1×10 12 / cm 3的杂质元素的区域 属于周期表第15组，杂质元素浓度为1.5×10 9 / cm 3至3×10 21 / SUP> / cm 3，属于周期表第13族，区域是留在半导体膜（特别是沟道形成区）中的催化元素移动的区域。

公开(公告)号：US07141823B2

公开(公告)日：2006-11-28

申请号：US10254670

申请日：2002-09-26

申请人： Takashi Hamada ,  Hidekazu Miyairi ,  Takuya Matsuo ,  Naoki Makita ,  Katsumi Nomura

发明人： Takashi Hamada ,  Hidekazu Miyairi ,  Takuya Matsuo ,  Naoki Makita ,  Katsumi Nomura

IPC分类号： H01L31/072

CPC分类号： H01L29/78696 ,  H01L27/12 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78675 ,  H01L2029/7863

摘要： In a TFT with a GOLD structure, there is provided a structure which is able to improve an operating characteristic and reliability and reduce an off current value in order to reduce power consumption of a semiconductor device. The surface of LDD region (4) overlapped with a portion (7a) of a gate electrode through a gate insulating film (6) interposed therebetween is extremely flattened. Thus, it is possible to obtain a TFT structure which is capable of reducing a parasitic capacitance in the LDD region of the TFT with the GOLD structure, reducing an off current value, improving reliability, and enabling high speed operation.

摘要翻译： 在具有GOLD结构的TFT中，提供了能够提高工作特性和可靠性并降低截止电流值以降低半导体器件的功耗的结构。 通过栅绝缘膜（6）与栅电极的部分（7a）重叠的LDD区（4）的表面极其平坦化。 因此，可以获得能够降低具有GOLD结构的TFT的LDD区域中的寄生电容的TFT结构，从而降低截止电流值，提高可靠性并实现高速运行。

公开(公告)号：US20060024925A1

公开(公告)日：2006-02-02

申请号：US11240467

申请日：2005-10-03

申请人： Misako Nakazawa ,  Toshiji Hamatani ,  Naoki Makita

发明人： Misako Nakazawa ,  Toshiji Hamatani ,  Naoki Makita

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L21/02532 ,  H01L21/02672 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

摘要： A spin addition method for catalyst elements is simple and very important technique, because the minimum amount of a catalyst element necessary for crystallization can be easily added by controlling the catalyst element concentration within a catalyst element solution, but there is a problem in that uniformity in the amount of added catalyst element within a substrate is poor. The non-uniformity in the amount of added catalyst element within the substrate is thought to influence fluctuation in crystallinity of a crystalline semiconductor film that has undergone thermal crystallization, and exert a bad influence on the electrical characteristics of TFTs finally structured by the crystalline semiconductor film. The present invention solves this problem with the aforementioned conventional technique. If the spin rotational acceleration speed is set low during a period moving from a dripping of the catalyst element solution process to a high velocity spin drying process in a catalyst element spin addition step, then it becomes clear that the non-uniformity of the amount of added catalyst element within the substrate is improved. The above stated problems are therefore solved by applying a spin addition process with a low spin rotational acceleration to a method of manufacturing a crystalline semiconductor film.

公开(公告)号：US06916693B2

公开(公告)日：2005-07-12

申请号：US09799373

申请日：2001-03-05

申请人： Hideto Ohnuma ,  Chiho Kokubo ,  Koichiro Tanaka ,  Naoki Makita ,  Shuhei Tsuchimoto

发明人： Hideto Ohnuma ,  Chiho Kokubo ,  Koichiro Tanaka ,  Naoki Makita ,  Shuhei Tsuchimoto

IPC分类号： H01L21/20 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/04 ,  H01L21/00

CPC分类号： H01L21/02488 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02686 ,  H01L21/02691 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/04

摘要： In a crystallization process of an amorphous semiconductor film, a first crystalline semiconductor film having crystalline regions, and dotted with amorphous regions within the crystalline regions, is obtained by performing heat treatment processing after introducing a metallic element which promotes crystallization on the amorphous semiconductor film. The amorphous regions are kept within a predetermined range by regulating the heat treatment conditions at this point. Laser annealing is performed on the first crystalline semiconductor film, to form a second crystalline semiconductor film. Electrical characteristics for a TFT manufactured based on the second crystalline semiconductor film can be obtained having less dispersion.

摘要翻译： 在非晶半导体膜的结晶工艺中，通过在将非晶半导体膜上促进结晶的金属元素引入导入之后，通过进行热处理来获得具有结晶区域并且在结晶区域内具有非晶区域的第一晶体半导体膜。 通过调节此时的热处理条件，将非晶区域保持在预定范围内。 对第一结晶半导体膜进行激光退火，形成第二结晶半导体膜。 可以获得具有较少分散性的基于第二结晶半导体膜制造的TFT的电特性。

公开(公告)号：US06835986B2

公开(公告)日：2004-12-28

申请号：US09822462

申请日：2001-04-02

申请人： Setsuo Nakajima ,  Naoki Makita

发明人： Setsuo Nakajima ,  Naoki Makita

IPC分类号： H01L2976

CPC分类号： G02F1/1368 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： To manufacture a liquid crystal display device with high thin film transistor accumulation, high productivity and high reliability by efficiently gettering a catalyst element, which promotes crystallization of an amorphous silicon film, from a channel region. In order to solve the above object, a step of providing a gettering sink on the outside of a p-channel thin film transistor region, and a step of removing a region provided on the outside of the thin film transistor region within the region where the catalyst element is gettered in a self-aligning manner by a source wiring or a drain wiring, are combined.

摘要翻译： 通过从沟道区域有效地吸收促进非晶硅膜结晶的催化剂元件，制造具有高薄膜晶体管积聚的液晶显示装置，高生产率和高可靠性。 为了解决上述目的，提供了一种在p沟道薄膜晶体管区域的外部设置吸收阱的步骤，以及在该区域内去除设置在薄膜晶体管区域的外部的区域的步骤， 催化剂元件通过源极布线或漏极布线以自对准的方式被吸收。

公开(公告)号：US06777713B2

公开(公告)日：2004-08-17

申请号：US10265634

申请日：2002-10-08

申请人： Hidekazu Miyairi ,  Aiko Shiga ,  Katsumi Nomura ,  Naoki Makita ,  Takuya Matsuo

发明人： Hidekazu Miyairi ,  Aiko Shiga ,  Katsumi Nomura ,  Naoki Makita ,  Takuya Matsuo

IPC分类号： H01L2900

CPC分类号： H01L27/12 ,  G02F1/1362 ,  H01L21/0237 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

摘要： By adding a novel improvement to the technique disclosed in JP 8-78329 A, a manufacturing method in which film characteristics of a semiconductor film having a crystalline structure are improved is provided. In addition, a TFT having superior TFT characteristics, such as field effect mobility, which uses the semiconductor film as an active layer, and a method of manufacturing the TFT, are also provided. A metallic element which promotes the crystallization of silicon is added to a semiconductor film having an amorphous structure and an oxygen concentration within the film of less than 5×1018/cm3. The semiconductor film having an amorphous structure is then heat-treated, forming a semiconductor film having a crystalline structure. Subsequently, an oxide film on the surface is removed. Oxygen is introduced to the semiconductor film having a crystalline structure, and processing is performed such that the concentration of oxygen within the film is from 5×1018/cm3 to 1×1021/cm3. After removing an oxide film on the surface of the semiconductor film, the semiconductor film surface is leveled by irradiating laser light under an inert gas atmosphere or in a vacuum.

摘要翻译： 通过添加对JP 8-78329A中公开的技术的新颖改进，提供了具有改善晶体结构的半导体膜的膜特性的制造方法。 此外，还提供了具有优异TFT特性的TFT，例如使用半导体膜作为有源层的场效应迁移率，以及TFT的制造方法。 将促进硅结晶的金属元素加入到膜内的非晶结构和氧浓度小于5×10 18 / cm 3的半导体膜中。 然后对具有非晶结构的半导体膜进行热处理，形成具有晶体结构的半导体膜。 随后，除去表面上的氧化物膜。 将氧气引入具有晶体结构的半导体膜，并且进行处理，使得膜内的氧浓度为5×10 18 / cm 3至1×10 21 / cm 3。 在去除半导体膜表面上的氧化物膜之后，通过在惰性气体气氛或真空中照射激光来平整半导体膜表面。

公开(公告)号：US06756608B2

公开(公告)日：2004-06-29

申请号：US10227549

申请日：2002-08-26

申请人： Kenji Kasahara ,  Naoki Makita ,  Takuya Matsuo

发明人： Kenji Kasahara ,  Naoki Makita ,  Takuya Matsuo

IPC分类号： H01L2904

CPC分类号： H01L29/78696 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78675 ,  H01L29/78678

摘要： A semiconductor device which has satisfactory characteristics is provided. The semiconductor device includes a TFT manufactured by using a satisfactory crystalline semiconductor film and a circuit manufactured by using the TFT. An n-type impurity element (typically, phosphorous) is added to a gettering region of an n-channel TFT. A p-type impurity element (typically, boron) and a rare gas element (typically, argon) are added to a gettering region of a p-channel TFT. Then, there is performed heat treatment for gettering a catalytic element that remains in a semiconductor film.

摘要翻译： 提供了具有令人满意的特性的半导体器件。 半导体器件包括通过使用令人满意的晶体半导体膜和通过使用TFT制造的电路制造的TFT。 n型杂质元素（通常为磷）被添加到n沟道TFT的吸杂区域。 p型杂质元素（通常为硼）和稀有气体元素（通常为氩）被添加到p沟道TFT的吸杂区域。 然后，进行热处理以吸收留在半导体膜中的催化元素。

公开(公告)号：US06727124B2

公开(公告)日：2004-04-27

申请号：US10000238

申请日：2001-11-02

申请人： Setsuo Nakajima ,  Hideto Ohnuma ,  Naoki Makita ,  Takuya Matsuo

发明人： Setsuo Nakajima ,  Hideto Ohnuma ,  Naoki Makita ,  Takuya Matsuo

IPC分类号： H01L2184

CPC分类号： H01L27/1214 ,  G02F1/13454 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1277 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675 ,  H01L2029/7863

摘要： A catalytic element for promoting crystallization of an amorphous silicon film is efficiently gettered to provide a highly reliable TFT, and an electro-optical device using the TFT and a method of manufacturing the electro-optical device are provided. The electro-optical device has an n-channel TFT and a p-channel TFT. A semiconductor layer of the p-channel TFT has a channel forming region (13), a region (11) containing an n-type impurity element and a p-type impurity element, and a region (12) containing only a p-type impurity element. In the p-channel TFT, a wiring line for electrically connecting the TFTs is connected to the region (12) containing only a p-type impurity element. The region containing an n-type impurity element in the p-channel TFT is narrower than a region doped with an n-type impurity element in a semiconductor layer of the n-channel TFT.

摘要翻译： 提供了一种用于促进非晶硅膜的结晶的催化元件，以提供高度可靠的TFT，并且提供了使用该TFT的电光器件和制造该电光器件的方法。 电光装置具有n沟道TFT和p沟道TFT。 p沟道TFT的半导体层具有沟道形成区域（13），包含n型杂质元素和p型杂质元素的区域（11）和仅包含p型杂质元素的区域（12） 杂质元素。 在p沟道TFT中，用于电连接TFT的布线与仅包含p型杂质元素的区域（12）连接。 在p沟道TFT中含有n型杂质元素的区域比n沟道TFT的半导体层中掺杂有n型杂质元素的区域窄。