公开(公告)号：US06727124B2

公开(公告)日：2004-04-27

申请号：US10000238

申请日：2001-11-02

申请人： Setsuo Nakajima ,  Hideto Ohnuma ,  Naoki Makita ,  Takuya Matsuo

发明人： Setsuo Nakajima ,  Hideto Ohnuma ,  Naoki Makita ,  Takuya Matsuo

IPC分类号： H01L2184

CPC分类号： H01L27/1214 ,  G02F1/13454 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1277 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675 ,  H01L2029/7863

摘要： A catalytic element for promoting crystallization of an amorphous silicon film is efficiently gettered to provide a highly reliable TFT, and an electro-optical device using the TFT and a method of manufacturing the electro-optical device are provided. The electro-optical device has an n-channel TFT and a p-channel TFT. A semiconductor layer of the p-channel TFT has a channel forming region (13), a region (11) containing an n-type impurity element and a p-type impurity element, and a region (12) containing only a p-type impurity element. In the p-channel TFT, a wiring line for electrically connecting the TFTs is connected to the region (12) containing only a p-type impurity element. The region containing an n-type impurity element in the p-channel TFT is narrower than a region doped with an n-type impurity element in a semiconductor layer of the n-channel TFT.

摘要翻译： 提供了一种用于促进非晶硅膜的结晶的催化元件，以提供高度可靠的TFT，并且提供了使用该TFT的电光器件和制造该电光器件的方法。 电光装置具有n沟道TFT和p沟道TFT。 p沟道TFT的半导体层具有沟道形成区域（13），包含n型杂质元素和p型杂质元素的区域（11）和仅包含p型杂质元素的区域（12） 杂质元素。 在p沟道TFT中，用于电连接TFT的布线与仅包含p型杂质元素的区域（12）连接。 在p沟道TFT中含有n型杂质元素的区域比n沟道TFT的半导体层中掺杂有n型杂质元素的区域窄。

公开(公告)号：US07625786B2

公开(公告)日：2009-12-01

申请号：US11088888

申请日：2005-03-25

申请人： Naoki Makita ,  Misako Nakazawa ,  Hideto Ohnuma ,  Takuya Matsuo

发明人： Naoki Makita ,  Misako Nakazawa ,  Hideto Ohnuma ,  Takuya Matsuo

IPC分类号： H01L21/84

CPC分类号： H01L29/66757 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/1277 ,  H01L29/78612 ,  H01L29/78621

摘要： Problems in prior art regarding an n-channel TFT in the source/drain gettering method are solved. In the n-channel TFT, its source/drain regions contain only an n-type impurity. Therefore, compared to a p-channel TFT whose source/drain regions contain an n-type impurity and a higher concentration of p-type impurity, the gettering efficiency is inferior in a channel region of the n-channel transistor. Accordingly, the problem of inferior gettering efficiency in the n-channel TFT can be solved by providing at an end of its source/drain regions a highly efficient gettering region that contains an n-type impurity and a p-type impurity both with the concentration of the p-type impurity set higher than the concentration of the n-type impurity.

摘要翻译： 解决了在源极/漏极吸杂方法中关于n沟道TFT的现有技术中的问题。 在n沟道TFT中，其源极/漏极区仅包含n型杂质。 因此，与源极/漏极区域包含n型杂质和较高浓度的p型杂质的p沟道TFT相比，n沟道晶体管的沟道区域的吸杂效率较差。 因此，可以通过在其源极/漏极区域的末端设置包含n型杂质的高效吸气区域和浓度为p型的p型杂质来解决n沟道TFT的吸杂效率差的问题 的p型杂质的浓度高于n型杂质浓度。

公开(公告)号：US06998641B2

公开(公告)日：2006-02-14

申请号：US10183056

申请日：2002-06-27

申请人： Naoki Makita ,  Misako Nakazawa ,  Hideto Ohnuma ,  Takuya Matsuo

发明人： Naoki Makita ,  Misako Nakazawa ,  Hideto Ohnuma ,  Takuya Matsuo

IPC分类号： H01L31/112

CPC分类号： H01L29/66757 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/1277 ,  H01L29/78612 ,  H01L29/78621

摘要： In order to solve the problem of inferior gettering efficiency in the n-channel TFT, the present invention provides at an end of the source/drain regions of the n-channel TFT a highly efficient gettering region that contains both of an n-type impurity and a p-type impurity with the concentration of the p-type impurity set higher than the concentration of the n-type impurity.

摘要翻译： 为了解决在n沟道TFT中吸杂效率差的问题，本发明在n沟道TFT的源极/漏极区域的末端提供了一种高效率的吸杂区域，其包含n型杂质 以及p型杂质浓度高于n型杂质浓度的p型杂质。

公开(公告)号：US20050170573A1

公开(公告)日：2005-08-04

申请号：US11088888

申请日：2005-03-25

申请人： Naoki Makita ,  Misako Nakazawa ,  Hideto Ohnuma ,  Takuya Matsuo

发明人： Naoki Makita ,  Misako Nakazawa ,  Hideto Ohnuma ,  Takuya Matsuo

IPC分类号： G02F1/1368 ,  H01L21/20 ,  H01L21/322 ,  H01L21/336 ,  H01L21/77 ,  H01L27/08 ,  H01L29/786 ,  H01L21/00 ,  H01L21/84

CPC分类号： H01L29/66757 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/1277 ,  H01L29/78612 ,  H01L29/78621

摘要： Problems in prior art regarding an n-channel TFT in the source/drain gettering method are solved. In the n-channel TFT, its source/drain regions contain only an n-type impurity. Therefore, compared to a p-channel TFT whose source/drain regions contain an n-type impurity and a higher concentration of p-type impurity, the gettering efficiency is inferior in a channel region of the n-channel transistor. Accordingly, the problem of inferior gettering efficiency in the n-channel TFT can be solved by providing at an end of its source/drain regions a highly efficient gettering region that contains an n-type impurity and a p-type impurity both with the concentration of the p-type impurity set higher than the concentration of the n-type impurity.

摘要翻译： 解决了在源极/漏极吸杂方法中关于n沟道TFT的现有技术中的问题。 在n沟道TFT中，其源极/漏极区仅包含n型杂质。 因此，与源极/漏极区域包含n型杂质和较高浓度的p型杂质的p沟道TFT相比，n沟道晶体管的沟道区域的吸杂效率较差。 因此，可以通过在其源极/漏极区域的末端设置包含n型杂质的高效吸气区域和浓度为p型的p型杂质来解决n沟道TFT的吸杂效率差的问题 的p型杂质的浓度高于n型杂质浓度。

公开(公告)号：US06479333B1

公开(公告)日：2002-11-12

申请号：US09532166

申请日：2000-03-21

申请人： Tamae Takano ,  Hideto Ohnuma ,  Hisashi Ohtani ,  Setsuo Nakajima ,  Shunpei Yamazaki

发明人： Tamae Takano ,  Hideto Ohnuma ,  Hisashi Ohtani ,  Setsuo Nakajima ,  Shunpei Yamazaki

IPC分类号： H01L2184

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/2022

摘要： A crystal growth 301 is carried out by diffusing a metal element, and a nickel element is moved into regions 108 and 109 which has been doped with phosphorus. An axis coincident with the moving directions 302 and 303 of the nickel element at this time is made to coincide with an axis coincident with the direction of the crystal growth, and a TFT having the regions as channel forming regions is manufactured. In the path of the region where nickel moved, since high crystallinity is obtained in the moving direction, the TFT having high characteristics can be obtained by this way.

摘要翻译： 通过扩散金属元素进行晶体生长301，并且将镍元素移动到已掺杂磷的区域108和109中。 此时与镍元素的移动方向302,303一致的轴线与与晶体生长方向一致的轴线一致，制造具有作为沟道形成区域的区域的TFT。 在镍移动的区域的路径中，由于在移动方向上获得高结晶度，所以可以通过这种方式获得具有高特性的TFT。

公开(公告)号：US6165824A

公开(公告)日：2000-12-26

申请号：US34041

申请日：1998-03-03

申请人： Tamae Takano ,  Hideto Ohnuma ,  Hisashi Ohtani ,  Setsuo Nakajima ,  Shunpei Yamazaki

发明人： Tamae Takano ,  Hideto Ohnuma ,  Hisashi Ohtani ,  Setsuo Nakajima ,  Shunpei Yamazaki

IPC分类号： H01L21/20 ,  H01L21/00

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/2022

摘要： A crystal growth 301 is carried out by diffusing a metal element, and a nickel element is moved into regions 108 and 109 which has been doped with phosphorus. An axis coincident with the moving directions 302 and 303 of the nickel element at this time is made to coincide with an axis coincident with the direction of the crystal growth, and a TFT having the regions as channel forming regions is manufactured. In the path of the region where nickel moved, since high crystallinity is obtained in the moving direction, the TFT having high characteristics can be obtained by this way.

公开(公告)号：US06893503B1

公开(公告)日：2005-05-17

申请号：US09050182

申请日：1998-03-26

申请人： Hideto Ohnuma ,  Shunpei Yamazaki ,  Setsuo Nakajima ,  Hisashi Ohtani

发明人： Hideto Ohnuma ,  Shunpei Yamazaki ,  Setsuo Nakajima ,  Hisashi Ohtani

IPC分类号： C30B25/04 ,  H01L21/20 ,  H01L21/322 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L21/02672 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02686 ,  H01L21/2022 ,  H01L21/2026 ,  H01L21/3226 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78675 ,  H01L29/78678

摘要： A method of producing a semiconductor device which removes catalyst elements from a silicon-containing semiconductor film while maintaining the advantage of low temperature process is provided. The method comprises the steps of: forming an amorphous semiconductor film containing silicon on a glass substrate to crystallize it by using a catalyst element; selectively introducing into the amorphous semiconductor film an impurity belonging to Group 15 to form gettering regions and regions to be gettered; and causing the catalyst element in the silicon film to move to the gettering regions by heat treatment. Through the gettering process, the crystalline silicon film can be obtained in which the concentration of nickel contained therein is sufficiently reduced.

摘要翻译： 提供一种制造半导体器件的方法，该半导体器件在保持低温工艺的优点的同时从含硅半导体膜中除去催化剂元件。 该方法包括以下步骤：在玻璃基板上形成含硅的非晶半导体膜，通过使用催化剂元素使其结晶化; 选择性地向非晶半导体膜引入属于第15族的杂质，以形成吸收区域和被吸收的区域; 并通过热处理使硅膜中的催化剂元素移动到吸气区域。 通过吸气工艺，可以获得其中含有的镍的浓度充分降低的结晶硅膜。

公开(公告)号：US06916693B2

公开(公告)日：2005-07-12

申请号：US09799373

申请日：2001-03-05

申请人： Hideto Ohnuma ,  Chiho Kokubo ,  Koichiro Tanaka ,  Naoki Makita ,  Shuhei Tsuchimoto

发明人： Hideto Ohnuma ,  Chiho Kokubo ,  Koichiro Tanaka ,  Naoki Makita ,  Shuhei Tsuchimoto

IPC分类号： H01L21/20 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/04 ,  H01L21/00

CPC分类号： H01L21/02488 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02686 ,  H01L21/02691 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/04

摘要： In a crystallization process of an amorphous semiconductor film, a first crystalline semiconductor film having crystalline regions, and dotted with amorphous regions within the crystalline regions, is obtained by performing heat treatment processing after introducing a metallic element which promotes crystallization on the amorphous semiconductor film. The amorphous regions are kept within a predetermined range by regulating the heat treatment conditions at this point. Laser annealing is performed on the first crystalline semiconductor film, to form a second crystalline semiconductor film. Electrical characteristics for a TFT manufactured based on the second crystalline semiconductor film can be obtained having less dispersion.

摘要翻译： 在非晶半导体膜的结晶工艺中，通过在将非晶半导体膜上促进结晶的金属元素引入导入之后，通过进行热处理来获得具有结晶区域并且在结晶区域内具有非晶区域的第一晶体半导体膜。 通过调节此时的热处理条件，将非晶区域保持在预定范围内。 对第一结晶半导体膜进行激光退火，形成第二结晶半导体膜。 可以获得具有较少分散性的基于第二结晶半导体膜制造的TFT的电特性。

公开(公告)号：US06867077B2

公开(公告)日：2005-03-15

申请号：US10400418

申请日：2003-03-28

申请人： Misako Nakazawa ,  Mitsuhiro Ichijo ,  Toshiji Hamatani ,  Hideto Ohnuma ,  Naoki Makita

发明人： Misako Nakazawa ,  Mitsuhiro Ichijo ,  Toshiji Hamatani ,  Hideto Ohnuma ,  Naoki Makita

IPC分类号： H01L21/20 ,  H01L21/322 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  H01L21/00

CPC分类号： H01L29/4908 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621

摘要： A barrier layer that meets three requirements, “withstand well against etching and protect a semiconductor film from an etchant as an etching stopper”, “allow impurities to move in itself during heat treatment for gettering”, and “have excellent reproducibility”, is formed and used to getter impurities contained in a semiconductor film. The barrier layer is a silicon oxide film and the ratio of a sub-oxide contained in the barrier layer is 18% or higher.

摘要翻译： 满足三个要求的“阻挡蚀刻并保护半导体膜免受蚀刻剂作为蚀刻停止剂”的阻挡层，“允许杂质在用于吸气的热处理中自身移动”，形成“具有优异的再现性” 并且用于吸收包含在半导体膜中的杂质。 阻挡层是氧化硅膜，阻挡层中含有的副氧化物的比例为18％以上。

公开(公告)号：US07276402B2

公开(公告)日：2007-10-02

申请号：US11012171

申请日：2004-12-16

申请人： Hideto Ohnuma ,  Masayuki Sakakura ,  Yasuhiro Mitani ,  Takuya Matsuo ,  Hidehito Kitakado

发明人： Hideto Ohnuma ,  Masayuki Sakakura ,  Yasuhiro Mitani ,  Takuya Matsuo ,  Hidehito Kitakado

IPC分类号： H01L21/84

CPC分类号： H01L29/66757 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/12 ,  H01L27/1277

摘要： A semiconductor device having a crystalline semiconductor film with production of a cavity suppressed and a manufacturing method thereof. A manufacturing method of a semiconductor device according to the invention comprises the steps of forming an amorphous silicon film on a substrate having an insulating surface, adding a metal element such as Ni for promoting crystallization to the amorphous silicon film, applying heat treatment to crystallize the amorphous silicon film, so that a crystalline silicon film is formed on the substrate, removing a silicon oxide film formed on the surface of the crystalline silicon film due to the heat treatment by a solution containing organic solvent and fluoride, and irradiating laser light or strong light to the crystalline silicon film.

摘要翻译： 具有抑制空腔制造的结晶半导体膜的半导体器件及其制造方法。 根据本发明的半导体器件的制造方法包括以下步骤：在具有绝缘表面的衬底上形成非晶硅膜，向非晶硅膜中添加用于促进结晶的Ni等金属元素，进行热处理，使结晶 非晶硅膜，使得在基板上形成结晶硅膜，通过含有机溶剂和氟化物的溶液进行热处理，除去形成在结晶硅膜表面的氧化硅膜，并照射激光或强力 光结晶硅膜。