公开(公告)号：US08003200B2

公开(公告)日：2011-08-23

申请号：US11664583

申请日：2005-09-27

申请人： Tomotake Nashiki ,  Hideo Sugawara ,  Hidehiko Andou ,  Hidetoshi Yoshitake

发明人： Tomotake Nashiki ,  Hideo Sugawara ,  Hidehiko Andou ,  Hidetoshi Yoshitake

IPC分类号： B32B7/02

CPC分类号： G02B1/116 ,  G02B1/105 ,  G02B1/14 ,  G02B1/18 ,  G02B27/0006 ,  G06F3/045 ,  Y10S428/917 ,  Y10T428/24942 ,  Y10T428/265 ,  Y10T428/31504

摘要： A transparent electrically-conductive film of the present invention comprises a transparent film substrate, a hard coat layer formed on one side of the transparent film substrate, a SiOx layer with a thickness of 10 nm to 300 nm that is formed on the hard coat layer by a dry process, and a transparent electrically-conductive thin layer with a thickness of 20 nm to 35 nm that is formed on another side of the transparent film substrate. The transparent electrically-conductive film has good resistance to moisture and heat and high durability against pen-based input and can be prevented from cracking during a punching process and also prevented from waving or curling even in a high-temperature, high-humidity environment.

摘要翻译： 本发明的透明导电膜包括透明膜基材，形成在透明膜基材一侧的硬涂层，形成在硬涂层上的厚度为10nm至300nm的SiOx层 通过干法形成的厚度为20nm〜35nm的透明导电性薄膜，形成在透明膜基板的另一侧。 透明导电膜具有良好的抗水分和耐热性，并且对于基于笔的输入具有高的耐久性，并且可以防止在冲压加工过程中的裂纹，并且即使在高温，高湿度的环境下也可防止波动或卷曲。

公开(公告)号：US20100136276A1

公开(公告)日：2010-06-03

申请号：US12525864

申请日：2008-02-28

申请人： Hidehiko Andou ,  Hideo Sugawara ,  Tomotake Nashiki

发明人： Hidehiko Andou ,  Hideo Sugawara ,  Tomotake Nashiki

IPC分类号： B32B33/00 ,  B32B37/00

CPC分类号： G06F3/0414 ,  B32B7/06 ,  B32B7/12 ,  B32B25/08 ,  B32B25/12 ,  B32B25/14 ,  B32B27/08 ,  B32B27/20 ,  B32B27/281 ,  B32B27/283 ,  B32B27/285 ,  B32B27/286 ,  B32B27/30 ,  B32B27/32 ,  B32B27/322 ,  B32B27/34 ,  B32B27/36 ,  B32B27/365 ,  B32B27/38 ,  B32B27/40 ,  B32B2255/10 ,  B32B2255/205 ,  B32B2262/101 ,  B32B2264/101 ,  B32B2264/105 ,  B32B2307/202 ,  B32B2307/306 ,  B32B2307/4026 ,  B32B2307/412 ,  B32B2307/54 ,  B32B2307/702 ,  B32B2307/712 ,  B32B2307/728 ,  B32B2307/748 ,  B32B2457/00 ,  Y10T428/14 ,  Y10T428/1476

摘要： An object of the invention is to provide a transparent conductive film having good processability and to provide a method for production thereof. The pressure-sensitive adhesive layer-carrying transparent conductive film of the invention comprises: an amorphous transparent conductive laminate comprising a transparent plastic film substrate and an amorphous transparent conductive thin film provided on one side of the transparent plastic film substrate; a pressure-sensitive adhesive layer; and a release film that is provided on another side of the transparent plastic film substrate with the pressure-sensitive adhesive layer interposed therebetween and comprises at least a film substrate, wherein the release film is thicker than the amorphous transparent conductive laminate, and a value obtained by subtracting the thermal shrinkage percentage of the release film in the MD direction from the thermal shrinkage percentage of the amorphous transparent conductive laminate in the MD direction is from −0.3% to 0.45%.

摘要翻译： 本发明的目的是提供一种具有良好加工性能的透明导电膜并提供其生产方法。 本发明的带有粘合剂层的透明导电膜包括：非晶透明导电层压板，包括透明塑料膜基片和设置在透明塑料薄膜基片一侧的非晶透明导电薄膜; 压敏粘合剂层; 以及剥离膜，其设置在所述透明塑料膜基材的另一侧，并且所述粘合剂层介于其间，并且至少包括膜基材，其中所述剥离膜比所述非晶形透明导电性层压体厚，得到的值 通过从MD方向从非晶透明导电性层叠体的热收缩率减去MD方向的热收缩率为-0.3％〜0.45％。

公开(公告)号：US20100003502A1

公开(公告)日：2010-01-07

申请号：US12376014

申请日：2007-06-07

申请人： Tomotake Nashiki ,  Hideo Sugawara ,  Hidetoshi Yoshitake

发明人： Tomotake Nashiki ,  Hideo Sugawara ,  Hidetoshi Yoshitake

IPC分类号： B32B5/16 ,  B32B17/06 ,  B32B5/00

CPC分类号： B32B7/02 ,  B32B5/16 ,  B32B7/12 ,  B32B2264/102 ,  B32B2307/202 ,  B32B2307/412 ,  B32B2307/536 ,  G06F3/0414 ,  Y10T428/24942 ,  Y10T428/256 ,  Y10T428/26 ,  Y10T428/265 ,  Y10T428/269

摘要： The transparent conductive laminate of the present invention is a transparent conductive laminate, comprising: a transparent film substrate; a transparent conductive thin film provided on one side of the transparent film substrate with a dielectric thin film interposed therebetween; and a transparent substrate bonded to another side of the transparent film substrate with a transparent pressure-sensitive adhesive layer interposed therebetween, wherein the transparent substrate comprises at least two transparent base films laminated with the transparent pressure-sensitive adhesive layer interposed therebetween, and the dielectric thin film comprises a first transparent dielectric thin film consisting of a SiOx (x is from 1.5 to less than 2) film having a relative refractive index of 1.6 to 1.9, and a second transparent dielectric thin film consisting of a SiO2 film. This feature can improve the surface contact pressure durability.

摘要翻译： 本发明的透明导电性层叠体是透明导电性层叠体，其包含：透明膜基板; 透明导电薄膜，其设置在介于其间的介电薄膜的透明薄膜基片一侧; 以及透明基板，其中透明粘合剂层与透明膜基材的另一侧粘合，其中所述透明基板包括至少两个层压有透明压敏粘合剂层的透明基膜和介电层 薄膜包括由相对折射率为1.6至1.9的SiOx（x为1.5至小于2）的膜构成的第一透明电介质薄膜和由SiO 2膜组成的第二透明电介质薄膜。 此功能可以提高表面接触压力的耐久性。

公开(公告)号：US20090284475A1

公开(公告)日：2009-11-19

申请号：US12066567

申请日：2006-08-30

申请人： Tomotake Nashiki ,  Hidetoshi Yoshitake ,  Hideo Sugawara

发明人： Tomotake Nashiki ,  Hidetoshi Yoshitake ,  Hideo Sugawara

IPC分类号： G06F3/041 ,  B32B5/16

CPC分类号： G06F3/047 ,  G06F3/045 ,  G06F2203/04809 ,  Y10T428/24364

摘要： A transparent conductive film comprising a transparent film base material, a resin layer having a fine uneven geometrical structure, and a transparent conductive thin film laminated on the film base material through the resin layer, wherein the surface of the transparent conductive thin film has an average centerline roughness (Ra) of 0.11 to 0.18 μm, the maximum height (Ry) of 0.9 to 1.6 μm and the average distance between peaks (S) of 0.05 to 0.11 mm. The film can prevent the formation of a Newton's ring and shows satisfactory durability (particularly, pen input durability) and satisfactory display property without buzzing.

摘要翻译： 一种透明导电膜，包括透明膜基材，具有微细不均匀几何结构的树脂层和通过树脂层层合在膜基材上的透明导电薄膜，其中透明导电薄膜的表面具有平均 中心线粗糙度（Ra）为0.11〜0.18μm，最大高度（Ry）为0.9〜1.6μm，峰间平均距离（S）为0.05〜0.11mm。 该膜可以防止形成牛顿戒指，并且显示出令人满意的耐用性（特别是笔输入耐用性）和令人满意的显示性能而不发出嗡嗡声。

公开(公告)号：US20090117405A1

公开(公告)日：2009-05-07

申请号：US11917110

申请日：2006-12-27

申请人： Tomotake Nashiki ,  Tomonori Noguchi ,  Hideo Sugawara

发明人： Tomotake Nashiki ,  Tomonori Noguchi ,  Hideo Sugawara

IPC分类号： B32B9/00 ,  B05D5/12 ,  H01B1/02

CPC分类号： C23C14/086

摘要： A transparent crystalline electrically-conductive thin film of the present invention comprises an indium tin oxide as a main component, wherein the indium tin oxide contains 9% by weight or less of tin oxide based on the total amount of indium oxide and tin oxide, wherein the transparent crystalline electrically-conductive thin film contains 0.45 atomic % or less of nitrogen. The transparent crystalline electrically-conductive thin film of the present invention has a high resistance value and good reliability in a high-temperature, high-humidity environment.

摘要翻译： 本发明的透明结晶性导电性薄膜，以铟锡氧化物为主要成分，其中，所述氧化铟锡含有氧化铟和氧化锡总量的9重量％以下，其中， 透明结晶性导电性薄膜含有0.45原子％以下的氮。 本发明的透明结晶性导电性薄膜在高温高湿环境下具有高电阻值和良好的可靠性。

公开(公告)号：US20080096013A1

公开(公告)日：2008-04-24

申请号：US11664583

申请日：2005-09-27

申请人： Tomotake Nashiki ,  Hideo Sugawara ,  Hidehiko Andou ,  Hidetoshi Yoshitake

发明人： Tomotake Nashiki ,  Hideo Sugawara ,  Hidehiko Andou ,  Hidetoshi Yoshitake

IPC分类号： B32B27/08

CPC分类号： G02B1/116 ,  G02B1/105 ,  G02B1/14 ,  G02B1/18 ,  G02B27/0006 ,  G06F3/045 ,  Y10S428/917 ,  Y10T428/24942 ,  Y10T428/265 ,  Y10T428/31504

摘要： A transparent electrically-conductive film of the present invention comprises a transparent film substrate, a hard coat layer formed on one side of the transparent film substrate, a SiOx layer with a thickness of 10 nm to 300 nm that is formed on the hard coat layer by a dry process, and a transparent electrically-conductive thin layer with a thickness of 20 nm to 35 nm that is formed on another side of the transparent film substrate. The transparent electrically-conductive film has good resistance to moisture and heat and high durability against pen-based input and can be prevented from cracking during a punching process and also prevented from waving or curling even in a high-temperature, high-humidity environment.

摘要翻译： 本发明的透明导电膜包括透明膜基材，形成在透明膜基材一侧的硬涂层，厚度为10nm至300nm的SiO 2层 通过干法在硬涂层上形成的厚度为20nm〜35nm的透明导电薄膜，形成在透明膜基板的另一侧。 透明导电膜具有良好的抗水分和耐热性，并且对于基于笔的输入具有高的耐久性，并且可以防止在冲压加工过程中的裂纹，并且即使在高温，高湿度的环境下也可防止波动或卷曲。

公开(公告)号：US20070252825A1

公开(公告)日：2007-11-01

申请号：US11790129

申请日：2007-04-24

申请人： Tomotake Nashiki ,  Hideo Sugawara

发明人： Tomotake Nashiki ,  Hideo Sugawara

IPC分类号： G06F3/041

CPC分类号： G06F3/045 ,  H01H13/704 ,  H01H2201/00 ,  H01H2201/016 ,  H01H2227/002 ,  H01H2227/004 ,  H01H2227/006 ,  H01H2227/008 ,  H01H2227/01 ,  H01H2227/03 ,  H01H2227/034 ,  Y10T428/24355 ,  Y10T428/24372

摘要： A touch panel of the invention comprises a first panel having a first film base with transparency and a first transparent conductive thin film provided on one surface of the first film base; and a second panel having a second film base with transparency and a second transparent conductive thin film provided on one surface of the second film base, wherein the first panel and the second panel are arranged so as to face each other with a spacer therebetween, in such a manner that the first conductive thin film and the second conductive thin film face each other, wherein the surface of the first conductive thin film has a hardness of 1 GPa or more and a modulus of elasticity of 5 GPa or more, the surface of the second conductive thin film has a center line average roughness (Ra) of 0.3 nm to 1.0 nm, and that of the center line average roughness (Ra) of the surface of the second conductive thin film is smaller than that of the surface of the first conductive thin film. The touch panel has good durability.

摘要翻译： 本发明的触摸面板包括：第一面板，具有透明的第一薄膜基底和设置在第一薄膜基底的一个表面上的第一透明导电薄膜; 以及第二面板，具有设置在所述第二薄膜基材的一个表面上的具有透明性的第二薄膜基底和第二透明导电薄膜，其中，所述第一面板和所述第二面板通过间隔件彼此相对配置， 第一导电薄膜和第二导电薄膜彼此面对的方式，其中第一导电薄膜的表面具有1GPa以上的硬度和5GPa以上的弹性模量， 第二导电薄膜的中心线平均粗糙度（Ra）为0.3nm〜1.0nm，第二导电薄膜的表面的中心线平均粗糙度（Ra）小于 第一导电薄膜。 触摸屏具有良好的耐用性。

公开(公告)号：US20140071353A1

公开(公告)日：2014-03-13

申请号：US13881958

申请日：2011-10-27

申请人： Mayumi Kishioka

发明人： Tomotake Nashiki ,  Daisuke Kajihara ,  Hideo Sugawara ,  Tsuyoshi Chiba ,  Hiroaki Kishioka ,  Tomohide Banba ,  Masahiro Ooura

IPC分类号： G02F1/1333

CPC分类号： G02F1/13338 ,  G06F3/041 ,  G06F3/044 ,  G06F2203/04103 ,  Y10T156/1062

摘要： Provided is an optical unit for a display panel device with a capacitive touch input function. In the optical unit, a touch panel laminate comprises: an optically transparent first substrate layer laminated to one surface of a transparent adhesive layer; a first transparent electrically conductive layer laminated, through a first undercoat layer, to a surface of the first substrate layer on a side opposite to the adhesive layer; an optically transparent second substrate layer laminated to the other surface of the adhesive layer; and a second transparent electrically conductive layer laminated, through a second undercoat layer, to a surface of the second substrate layer on a side opposite side to the adhesive layer.

摘要翻译： 提供了一种具有电容式触摸输入功能的显示面板装置的光学单元。 在光学单元中，触摸面板层叠体包括：层压到透明粘合剂层的一个表面上的光学透明的第一基底层; 第一透明导电层，其通过第一底涂层层叠在与所述粘合剂层相对的一侧上的所述第一基材层的表面上; 层压到粘合剂层的另一个表面上的光学透明的第二基底层; 以及第二透明导电层，其通过第二底涂层层叠在与所述粘合剂层相反侧的所述第二基材层的表面上。

公开(公告)号：US20140036170A1

公开(公告)日：2014-02-06

申请号：US13990397

申请日：2011-11-29

申请人： Mayumi Kishioka

发明人： Tomotake Nashiki ,  Kazuhiro Nakajima ,  Hideo Sugawara ,  Tsuyoshi Chiba ,  Hiroaki Kishioka ,  Tomohide Banba ,  Masahiro Ooura

IPC分类号： G02F1/1333

CPC分类号： G02F1/13338 ,  G02F1/133308 ,  G06F3/03 ,  G06F3/044 ,  G06F3/045 ,  Y10T428/24802 ,  Y10T428/24942 ,  Y10T428/2495 ,  Y10T428/24967

摘要： A display panel device has a window, a touch panel laminate and a display panel. The touch panel laminate has: a transparent first substrate layer; a first transparent conductive layer laminated to the first substrate layer through a first undercoat layer; a transparent second substrate layer; and a second transparent conductive layer laminated to the second substrate layer through a second undercoat layer. The second conductive layer faces the first conductive layer through at least the first substrate layer and the first undercoat layer. The first conductive layer is closer to the window than the first substrate layer. A polarizing film layer is bonded to the window, and a λ/4 retardation film layer is disposed between the polarizing film layer and the touch panel laminate. The display panel is disposed on a side opposite to the window with respect to the touch panel laminate.

摘要翻译： 显示面板装置具有窗口，触摸面板层压板和显示面板。 触摸面板层叠体具有：透明的第一基板层; 通过第一底涂层层压到第一基底层的第一透明导电层; 透明的第二基板层; 以及通过第二底涂层层压到第二基底层的第二透明导电层。 第二导电层通过至少第一基底层和第一底涂层面向第一导电层。 第一导电层比第一衬底层更靠近窗口。 偏振膜层与窗口接合，并且在偏振膜层和触摸面板层叠体之间设置λ/ 4延迟膜层。 显示面板相对于触摸面板层叠体设置在与窗口相对的一侧。

公开(公告)号：US5648743A

公开(公告)日：1997-07-15

申请号：US387734

申请日：1995-02-16

申请人： Setsuya Nagaya ,  Hideo Sugawara ,  Tominaga Watanabe

发明人： Setsuya Nagaya ,  Hideo Sugawara ,  Tominaga Watanabe

IPC分类号： H03F1/26 ,  H03F3/19 ,  H03F3/343 ,  H03F3/345 ,  H03F3/45

CPC分类号： H03F3/45381 ,  H03F1/26 ,  H03F3/19 ,  H03F3/343 ,  H03F3/345 ,  H03F3/45076 ,  H03F3/45085 ,  H03F2200/372 ,  H03F2203/45201 ,  H03F2203/45316 ,  H03F2203/45374 ,  H03F2203/45398 ,  H03F2203/45594

摘要： An amplifying circuit is suitable for an integrated circuit that has a characteristic of low-noise, high-gain, and low-consumptive current. In the circuit, transistors or FETs are used as amplifying elements. A basic amplifying circuit employing transistors, that forms a differential pair of first and second transistors, first and second resistors connected to each collector of the first and second transistors, and a constant current source connected to a common emitter of the first and second transistors, comprises a third transistor, of which emitter is connected to a connecting point of the first and second resistors, a condenser connected between a connecting point of the first transistor and the first resistor, or a connecting point of the second transistor and the second resistor, and a base of the third transistor, and a voltage source connected to a collector of the third transistor, wherein outputs are obtained from an emitter of the third transistor.

摘要翻译： PCT No.PCT / JP94 / 00478 Sec。 371日期1995年2月16日 102（e）日期1995年2月16日PCT 1994年3月25日PCT公布。 出版物WO95 / 05027 日期1995年2月16日放大电路适用于具有低噪声，高增益和低消耗电流特性的集成电路。 在电路中，晶体管或FET用作放大元件。 采用晶体管的基本放大电路，其形成第一和第二晶体管的差分对，连接到第一和第二晶体管的每个集电极的第一和第二电阻器以及连接到第一和第二晶体管的公共发射极的恒流源， 包括第三晶体管，其发射极连接到第一和第二电阻器的连接点，连接在第一晶体管的连接点和第一电阻器之间的电容器，或第二晶体管和第二电阻器的连接点， 和第三晶体管的基极，以及连接到第三晶体管的集电极的电压源，其中从第三晶体管的发射极获得输出。