公开(公告)号：US08330633B2

公开(公告)日：2012-12-11

申请号：US13096737

申请日：2011-04-28

申请人： James L. Brubaker ,  Florin A. Oprescu

发明人： James L. Brubaker ,  Florin A. Oprescu

IPC分类号： H03M1/66

CPC分类号： H03M1/0614 ,  H03K17/007 ,  H03K17/162 ,  H03K17/693 ,  H03M1/742

摘要： A differential current steering (CS) circuit uses feedback from the differential output nodes A and B to cause current steering devices (e.g., MOSFETs) to effectively exhibit an infinite output impedance when conducting. Therefore, the signal on the output nodes A or B does not significantly change the voltage at the common node, This is particularly useful when the differential output nodes are connected to differential output buses in a digital-to-analog converter. The circuit dynamically cancels, though feedback, the signal induced at the common node by the signal present at the “steered” output node. Therefore, the CS circuit effectively presents an infinite output impedance between the common node and the output nodes. In some cases, it may be desirable to not create a substantially infinite output impedance for the CS circuit but control the impedance to a predefined level to counter other distortions in the system.

摘要翻译： 差分电流转向（CS）电路使用来自差分输出节点A和B的反馈，以使电流转向装置（例如，MOSFET）在导通时有效地呈现无限的输出阻抗。 因此，输出节点A或B上的信号不会显着改变公共节点处的电压。当差分输出节点连接到数模转换器中的差分输出总线时，这尤其有用。 该电路通过反馈来动态地消除在转向输出节点处存在的信号在公共节点处感应的信号。 因此，CS电路有效地在公共节点和输出节点之间呈现无限大的输出阻抗。 在某些情况下，可能不希望为CS电路产生基本上无限的输出阻抗，但是将阻抗控制到预定义的水平以抵消系统中的其它失真。

公开(公告)号：US20120299560A1

公开(公告)日：2012-11-29

申请号：US13115924

申请日：2011-05-25

申请人： Yiding Gu

发明人： Yiding Gu

IPC分类号： H03L7/00

CPC分类号： H02M3/1584 ,  H02M2001/0003 ,  H02M2001/327

摘要： In one embodiment, a temperature compensation circuit is used in a peak current control multi-phased DC/DC converter. Each phase has a duty cycle needed to generate a regulated output voltage of the converter. The temperature for each phase in the converter is sensed to generate corresponding first signals for all the phases. The first signals are averaged to generate a second signal corresponding to the average temperature of all the phases. For each phase, a third signal is generated corresponding to the difference between the first signal and the second signal. The third signal is then used to adjust the duty cycle of each phase to control the temperature of each phase to be substantially equal to the average temperature. In the steady state, the output voltage of the converter will be the desired voltage and the temperatures of the phases will be balanced.

摘要翻译： 在一个实施例中，在峰值电流控制多相DC / DC转换器中使用温度补偿电路。 每相具有产生转换器稳压输出电压所需的占空比。 感测转换器中每相的温度以产生用于所有相的相应的第一信号。 第一信号被平均以产生对应于所有相的平均温度的第二信号。 对于每个相位，对应于第一信号和第二信号之间的差产生第三信号。 然后第三个信号用于调整每相的占空比，以控制每相的温度基本上等于平均温度。 在稳定状态下，转换器的输出电压将是所需的电压，相位的温度将平衡。

公开(公告)号：US08319485B2

公开(公告)日：2012-11-27

申请号：US12350532

申请日：2009-01-08

申请人： Richard Neal Philpott

发明人： Richard Neal Philpott

IPC分类号： G05F1/40

CPC分类号： H02M1/44 ,  H02M1/12 ,  H02M3/158 ,  H02M2001/0067 ,  H02M2001/007 ,  H02M2003/1586

摘要： Novel circuitry and methodology for operating a multiple channel switching regulator system to extend an input to output voltage ratio by setting individual constant switching frequencies to switching regulator channels. In the switching regulator system having at least first and second switching regulators, a first clock circuit supplies a first clock signal at a first clock frequency to define a switching frequency of one of the first and second switching regulators. A second clock circuit is synchronized to the first clock signal for producing a second clock signal at a second clock frequency different from the first clock frequency, to define a switching frequency of the other of the first and second switching regulators.

摘要翻译： 用于操作多通道开关调节器系统的新型电路和方法，通过将各个恒定的开关频率设置为开关稳压器通道来将输入延伸到输出电压比。 在具有至少第一和第二开关调节器的开关调节器系统中，第一时钟电路以第一时钟频率提供第一时钟信号以限定第一和第二开关调节器之一的开关频率。 第二时钟电路与第一时钟信号同步，以产生与第一时钟频率不同的第二时钟频率的第二时钟信号，以限定第一和第二开关调节器中另一个的开关频率。

公开(公告)号：US08269355B2

公开(公告)日：2012-09-18

申请号：US12941383

申请日：2010-11-08

申请人： David Alan Pruitt

发明人： David Alan Pruitt

IPC分类号： H01L21/60 ,  H01L23/495 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/49562 ,  H01L23/4952 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05655 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48655 ,  H01L2224/48855 ,  H01L2224/49431 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/20755 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor device such as a field-effect transistor, improved to reduce device resistance, comprises a leadframe which includes a die paddle integral with a first set of leads and a second set of leads that is electrically isolated from the first set, a semiconductor die having its lower surface positioned on, and electrically connected to, the die paddle, and a conductive layer on the upper surface of the die. At least one electrically conductive wire, preferably plural wires, extend laterally across the second surface of the semiconductor die, are in electrical contact with the conductive layer, and interconnect corresponding second leads on opposite sides of the die. The plural wires may be welded to leads in succession by alternate ball and wedge bonds on each lead. The conductive layer may be an aluminized layer on which is formed a thin layer a solderable material, such as tin. A solder is deposited on the tin layer, enmeshing the wires. The wires, which preferably are made of copper, then may be bonded to the electrically conductive layer by melting the solder paste, preferably by heating the leadframe, allowing the solder to reflow and wet the wires, and then cool to produce a low resistance mass between the leads.

摘要翻译： 诸如场效应晶体管的半导体器件（其被改进以降低器件电阻）包括引线框架，其包括与第一组引线成一体的管芯焊盘和与第一组件电隔离的第二组引线，半导体管芯 其下表面位于管芯焊盘上并电连接，并且在管芯的上表面上具有导电层。 至少一根导电线，优选多条导线横跨半导体管芯的第二表面横向延伸，与导电层电接触，并将相应的第二引线互连在芯片的相对两侧。 可以通过在每个引线上的交替的球和楔形键来连续地焊接多个导线。 导电层可以是镀铝层，其上形成诸如锡的可焊接材料的薄层。 焊料沉积在锡层上，使电线啮合。 优选由铜制成的导线然后可以通过熔化焊膏，优选地通过加热引线框，使焊料回流和湿润导线，然后冷却以产生低电阻质量而与导电层结合 引线之间。

公开(公告)号：US20120233384A1

公开(公告)日：2012-09-13

申请号：US13415548

申请日：2012-03-08

申请人： Gordon Alexander Charles ,  Maxim Moiseev ,  Jonathan Simon

发明人： Gordon Alexander Charles ,  Maxim Moiseev ,  Jonathan Simon

IPC分类号： G06F12/00 ,  G11C7/00

CPC分类号： F15B11/0365 ,  F15B2211/7055 ,  G11C16/16

摘要： The erasing of data stored in a nonvolatile memory is performed using multiple partial erase operations. Each partial erase operation has a time duration that is shorter than the minimum time duration of an erase operation that is needed to reliably erase the data stored in the storage location. However, the sum of the time durations of the multiple partial erase operations is sufficient to reliably erase the data in the storage location. In one example, during a partial erase operation, a voltage is applied to a memory storage transistor to remove some, but not necessarily all, of the charge stored on a charge storage layer of the transistor. Following multiple partial erase operations, sufficient charge is removed from the charge storage layer to ensure reliable data erasure.

摘要翻译： 使用多个部分擦除操作来执行存储在非易失性存储器中的数据的擦除。 每个部分擦除操作具有比可靠地擦除存储在存储位置中的数据所需的擦除操作的最小持续时间短的持续时间。 然而，多个部分擦除操作的持续时间之和足以可靠地擦除存储位置中的数据。 在一个示例中，在部分擦除操作期间，将电压施加到存储器存储晶体管以去除存储在晶体管的电荷存储层上的一些但不一定全部的电荷。 在多次部分擦除操作之后，从电荷存储层去除足够的电荷，以确保可靠的数据擦除。

公开(公告)号：US20120218022A1

公开(公告)日：2012-08-30

申请号：US13035884

申请日：2011-02-25

申请人： Kalin V. Lazarov ,  Matthew J. Maloney ,  Christopher Pollard ,  Edson W. Porter

发明人： Kalin V. Lazarov ,  Matthew J. Maloney ,  Christopher Pollard ,  Edson W. Porter

IPC分类号： G06G7/12 ,  G06G7/16

CPC分类号： G01R19/0092 ,  G01R1/203 ,  G01R19/00

摘要： In one embodiment, a current sensing circuit corrects for the transient and steady state temperature measurement errors due to physical separation between a resistive sense element and a temperature sensor. The sense element has a temperature coefficient of resistance. The voltage across the sense element and a temperature signal from the temperature sensor are received by processing circuitry. The processing circuitry determines a power dissipated by the sense element, which may be instantaneous or average power, and determines an increased temperature of the sense element. The resistance of the sense element is changed by the increased temperature, and this derived resistance Rs is used to calculate the current through the sense element using the equation I=V/R or other related equation. The process is iterative to continuously improve accuracy and update the current.

摘要翻译： 在一个实施例中，电流感测电路校正由于电阻感测元件和温度传感器之间的物理分离引起的瞬态和稳态温度测量误差。 感测元件具有电阻的温度系数。 感测元件两端的电压和来自温度传感器的温度信号由处理电路接收。 处理电路确定由感测元件消耗的功率，其可以是瞬时或平均功率，并且确定感测元件的温度升高。 感测元件的电阻由于升高的温度而改变，并且该导出的电阻Rs用于使用等式I = V / R或其他相关方程来计算通过感测元件的电流。 该过程是迭代的，以不断提高精度并更新当前。

公开(公告)号：US08233582B2

公开(公告)日：2012-07-31

申请号：US12960299

申请日：2010-12-03

申请人： Christoph Sebastian Schwoerer

发明人： Christoph Sebastian Schwoerer

IPC分类号： G06M11/02

CPC分类号： H02J7/0078 ,  G01R31/3613

摘要： A circuit may include a source of electrical energy and a plurality of current loads. Each load may be of a different amount. For each current load, a resistance may be in series between the source and the current load. The resistance may be weighted inversely proportional to the amount of the current load with respect to the other resistances. For each resistance, an integrator may generate an integrated output representative of an integration of the current traveling through the resistance. A summer may generate a summed output which is representative of the sum of each of the integrated outputs, weighted inversely proportional to the resistance that is associated with the integrated output.

摘要翻译： 电路可以包括电能源和多个电流负载。 每个负载可能有不同的量。 对于每个电流负载，电流可能在源极和电流负载之间串联。 电阻可以与当前负载的量相对于其他电阻成反比。 对于每个电阻，积分器可以产生代表通过电阻的电流的积分的积分输出。 一个加法器可以产生一个相加的输出，它表示每个积分输出的总和，加权与与积分输出相关联的电阻成反比。

公开(公告)号：US08198869B2

公开(公告)日：2012-06-12

申请号：US12073924

申请日：2008-03-12

申请人： Wen Yang ,  Yong Kok Sim ,  Vui Min Ho

发明人： Wen Yang ,  Yong Kok Sim ,  Vui Min Ho

IPC分类号： H02J7/00 ,  H02J7/14

CPC分类号： H02M3/07

摘要： A circuit for charging a capacitor block including series-connected capacitive elements has an input node for receiving an input, an output node coupled to the capacitor block, a third capacitive element connectable to the input node and the output node, and first and second switching circuitries coupled to the third capacitive element. A voltage sensor determines a relationship between first voltage at the first capacitive element and second voltage at the second capacitive element to separately control switching of the first and second switching circuitries in accordance with the relationship between the voltages.

摘要翻译： 用于对包括串联连接的电容元件的电容器块进行充电的电路具有用于接收输入的输入节点，耦合到电容器块的输出节点，可连接到输入节点和输出节点的第三电容元件，以及第一和第二开关 电路耦合到第三电容元件。 电压传感器确定第一电容元件的第一电压与第二电容元件的第二电压之间的关系，以分别根据电压之间的关系来控制第一和第二开关电路的开关。

公开(公告)号：US08175087B2

公开(公告)日：2012-05-08

申请号：US12577358

申请日：2009-10-12

申请人： Brian Kirk Jadus

发明人： Brian Kirk Jadus

IPC分类号： H04L12/50

CPC分类号： G06F13/4063

摘要： Method and system for serially sending data signals captured from multiple sources through a single unidirectional isolation component. Data signals from respective multiple sources are captured in parallel. Such captured data signals are stored in respective storages. The stored data signals are transferred, in serial, from the storages to a single unidirectional isolation component. Multiple concurrent processes for parallel data signal capture and serial data signal transfer via a single unidirectional isolation component are implemented so that the sampling effect on a first of the multiple processes is minimized.

摘要翻译： 用于通过单个单向隔离组件串行发送从多个源捕获的数据信号的方法和系统。 并行捕获来自各个源的数据信号。 这种捕获的数据信号存储在相应的存储器中。 存储的数据信号以串行方式从存储器传送到单个单向隔离组件。 实现用于并行数据信号捕获和通过单个单向隔离组件的串行数据信号传输的多个并发处理，使得对多个进程中的第一个进程的采样效应最小化。

公开(公告)号：US20120026027A1

公开(公告)日：2012-02-02

申请号：US12844727

申请日：2010-07-27

申请人： Jesper Steensgaard-Madsen

发明人： Jesper Steensgaard-Madsen

IPC分类号： H03M1/38 ,  H03K5/00 ,  H03M1/12

CPC分类号： H03M1/466

摘要： In an A/D converter, isolation switches are used between the capacitors and the conversion switches. The conversion switches are those switches used to selectively couple the plates of the binary weighted capacitors to either Vref or 0 volts during the A/D conversion process. During sampling of the input voltage signal, the isolation switches are opened to isolate the conversion switches from the wide range of possible input voltages at the bottom plates of the capacitors. Therefore, the voltage across the conversion switches is substantially limited to Vref. Hence, the conversion switches can be very fast low voltage switches. After sampling of the input voltage, when the sampled input voltage is locked in, the conversion switches operate normally to selectively connect the capacitor plates to either Vref or 0 volts for successively approximating the input voltage, whereby a digital code representing the sampled input voltage is generated.

摘要翻译： 在A / D转换器中，电容器和转换开关之间使用隔离开关。 转换开关是用于在A / D转换过程期间将二进制加权电容器的板选择性地耦合到Vref或0伏的那些开关。 在采样输入电压信号期间，隔离开关被打开以将转换开关与电容器底板的可能输入电压的宽范围隔离开来。 因此，转换开关两端的电压基本上限制在Vref。 因此，转换开关可以是非常快速的低压开关。 在对输入电压进行采样之后，当采样的输入电压被锁定时，转换开关正常工作，选择性地将电容器板连接到Vref或0伏，以连续逼近输入电压，从而表示采样输入电压的数字代码为 生成。