ERROR CORRECTING CODE DECODING DEVICE, ERROR CORRECTING CODE DECODING METHOD AND ERROR CORRECTING CODE DECODING PROGRAM
    62.
    发明申请
    ERROR CORRECTING CODE DECODING DEVICE, ERROR CORRECTING CODE DECODING METHOD AND ERROR CORRECTING CODE DECODING PROGRAM 审中-公开
    错误修正代码解码设备,错误修正代码解码方法和错误更正代码解码程序

    公开(公告)号:US20130007568A1

    公开(公告)日:2013-01-03

    申请号:US13583186

    申请日:2011-03-07

    申请人: Toshihiko Okamura

    发明人: Toshihiko Okamura

    IPC分类号: H03M13/23 G06F11/10

    摘要: Provided is an error correction code decoding apparatus capable of performing a decoding process efficiently for various interleaver sizes while suppressing an increase in apparatus size. The error correction code decoding apparatus includes: a simultaneous decoding selection unit configured to select whether a first and a second elementary codes are to be subjected to simultaneous decoding depending on a size of an interleaver; a reception information storage unit configured to store reception information at a position in accordance with a selection result from the simultaneous decoding selection unit; an external information storage unit configured to store external information corresponding to each of the first and the second elementary codes at a position in accordance with the selection result from the simultaneous decoding selection unit; and a soft-input soft output decoding unit including a plurality of soft-input soft-output decoders that perform soft-input soft-output decoding on each of divided blocks of the first and the second elementary codes in parallel, the soft-input soft output decoding unit configured to repeat decoding of the first elementary code and the second elementary code when simultaneous decoding is not selected by the simultaneous decoding selection unit, and configured to repeat simultaneous decoding of the first and the second elementary codes when simultaneous decoding is selected by the simultaneous decoding selection unit.

    摘要翻译: 提供了一种能够在抑制设备尺寸增加的同时对各种交织器大小进行有效解码处理的纠错码解码装置。 纠错码解码装置包括:同时解码选择单元,被配置为根据交织器的大小来选择第一和第二基本码是否要进行同时解码; 接收信息存储单元,被配置为根据来自同时解码选择单元的选择结果在位置处存储接收信息; 外部信息存储单元,被配置为在来自所述同时解码选择单元的选择结果的位置处存储与所述第一和第二基本码中的每一个对应的外部信息; 以及软输入软输出解码单元,其包括并行地对第一和第二基本代码的每个分割块执行软输入软输出解码的多个软输入软输出解码器,软输入软 输出解码单元,被配置为当同时解码选择单元未选择同时解码时,重复第一基本代码和第二基本代码的解码,并且被配置为当通过以下方式选择同时解码时重复第一和第二基本代码的同时解码 同时解码选择单元。

    Method and apparatus for turbo encoding and decoding
    63.
    发明授权
    Method and apparatus for turbo encoding and decoding 有权
    用于turbo编码和解码的方法和装置

    公开(公告)号:US08166373B2

    公开(公告)日:2012-04-24

    申请号:US12065718

    申请日:2006-09-05

    IPC分类号: H03M13/00

    CPC分类号: H03M13/2978 H03M13/6561

    摘要: A method and apparatus for turbo encoding and method and apparatus for turbo decoding are disclosed, by which encoding and decoding speeds of turbo codes and performance thereof can be enhanced. In performing turbo encoding on inputted information bits by a unit of an information frame including a predetermined number of bits, the present invention includes dividing the information frame into at least two information sub-blocks, encoding each of the at least two information sub-blocks independently, rearranging information bits configuring the information frame by interleaving the information frame, dividing the rearranged information frame into at least two information sub-blocks, and encoding each of the at least two information sub-blocks independently.

    摘要翻译: 公开了用于turbo编码的方法和装置以及用于turbo解码的方法和装置,通过该方法和装置可以增强turbo码的编码和解码速度及其性能。 本发明的目的在于,对于输入的信息比特进行包含预定比特数的信息帧的Turbo编码,本发明包括将信息帧划分为至少两个信息子块,对至少两个信息子块 独立地通过交织信息帧来重新布置配置信息帧的信息位,将重新排列的信息帧划分为至少两个信息子块,以及独立地编码至少两个信息子块中的每一个。

    METHOD AND APPARATUS FOR PARALLEL PROCESSING TURBO DECODER
    65.
    发明申请
    METHOD AND APPARATUS FOR PARALLEL PROCESSING TURBO DECODER 有权
    并行处理涡轮解码器的方法和装置

    公开(公告)号:US20110134969A1

    公开(公告)日:2011-06-09

    申请号:US12814157

    申请日:2010-06-11

    申请人: Eran Pisek Yan Wang

    发明人: Eran Pisek Yan Wang

    IPC分类号: H04B1/69 H04L27/00

    摘要: A receiver capable of decoding encoded transmissions. The receiver includes a number of receive antennas configured to receive data; a plurality of memory units that store the received data; and a plurality of decoders configured to perform a Turbo decoding operation. Each of the plurality of decoders decodes at least a portion of the received data using at least a portion of a decoding matrix. The receiver also includes a data switch coupled between the plurality of decoders and the plurality of memory units. The data switch configured to vary a decode operation from an long term evolution (LTE) based operation to a Wideband Code Division Multiple Access (WCDMA) operation.

    摘要翻译: 一种能够解码编码的传输的接收机。 接收机包括被配置为接收数据的多个接收天线; 存储所接收的数据的多个存储单元; 以及被配置为执行Turbo解码操作的多个解码器。 多个解码器中的每一个使用解码矩阵的至少一部分来解码所接收的数据的至少一部分。 接收机还包括耦合在多个解码器和多个存储器单元之间的数据开关。 数据交换器被配置为将解码操作从基于长期演进(LTE)的操作改变为宽带码分多址(WCDMA)操作。

    Method and a Device for Decoding Turbo Codes
    68.
    发明申请
    Method and a Device for Decoding Turbo Codes 有权
    用于解码Turbo码的方法和装置

    公开(公告)号:US20080285688A1

    公开(公告)日:2008-11-20

    申请号:US11885978

    申请日:2006-03-10

    IPC分类号: H04L27/06

    摘要: A method and a device (20) for decoding a frame capable of being split into p sub-frames each consisting of k information symbols, a first n−k redundant symbols and a last n−k redundant symbols. The decoding process uses two individual decoders (21, 23) which concurrently produce extrinsic data (Extr1i, Extr2i) respectively concerning information symbols and interleaved information symbols. The values of the extrinsic data (Extr1i, Extr2i) are refined by cross-feedback of said data to the input of the decoders (21, 23).

    摘要翻译: 一种用于对能够被分割成p个子帧的帧进行解码的方法和装置(20),每个子帧由k个信息符号,第一n-k个冗余符号和最后n个k个冗余符号组成。 解码过程使用两个单独的解码器(21,23),其分别同时产生关于信息符号和交织的信息符号的外在数据(Extr1i1,Extr2i1)。 通过将所述数据的交叉反馈精细化到解码器(21,23)的输入端来改进外部数据(Extr1i1i,Extr2i1i)的值。

    Reduced complexity ARP (almost regular permutation) interleaves providing flexible granularity and parallelism adaptable to any possible turbo code block size
    69.
    发明申请
    Reduced complexity ARP (almost regular permutation) interleaves providing flexible granularity and parallelism adaptable to any possible turbo code block size 失效
    降低复杂度ARP(几乎规则排列)交错,提供适应任何可能的turbo码块大小的灵活的粒度和并行性

    公开(公告)号:US20080086674A1

    公开(公告)日:2008-04-10

    申请号:US11811013

    申请日:2007-06-07

    IPC分类号: H03M13/05

    摘要: Reduced complexity ARP (almost regular permutation) interleaves providing flexible granularity and parallelism adaptable to any possible turbo code block size. A novel means is presented by which any desired turbo code block size can be employed when only requiring, in only some instances, a very small number of dummy bits. This approach also is directly adaptable to parallel turbo decoding, in which any desired degree of parallelism can be employed. Alternatively, as few as one turbo decoder can be employed in a fully non-parallel implementation as well. Also, this approach allows for storage of a reduced number of parameters to accommodate a wide variety of interleaves.

    摘要翻译: 降低复杂度ARP(几乎规则排列)交错,提供适应任何可能的turbo码块大小的灵活的粒度和并行性。 提出了一种新颖的方法,当仅需要非常少量的虚拟位时,可以采用任何期望的turbo码块大小。 这种方法也可直接适用于平行turbo解码,其中可以采用任何期望的并行度。 或者,也可以在完全非并行实现中使用少至一个turbo解码器。 此外,该方法允许存储少量参数以适应各种各样的交错。

    Architecture for an iterative decoder
    70.
    发明授权
    Architecture for an iterative decoder 失效
    迭代解码器的架构

    公开(公告)号:US07275203B2

    公开(公告)日:2007-09-25

    申请号:US10926063

    申请日:2004-08-26

    IPC分类号: H03M13/03

    摘要: Iterative decoder comprising a plurality of servers which perform the iterative decoding of a data block each, an input buffer memory and a control unit which performs a statistical multiplexing of the data at input, which are firstly stored in the input buffer memory and successively processed by one of the servers. The input buffer memory comprises N+L memory locations, where N is the number of servers and L is the number of so-called additional locations. Each block to be decoded which is received while all the servers are busy is stored in one of the L additional locations possibly available, or it is lost if the input buffer memory is entirely filled. The number L of additional locations and the number N of servers are such that the probability PB of a block being lost, calculated on the basis of a queuing model of D/G/N/N+L type, satisfies the condition PB≦α·FER*, where FER* is the error rate in the blocks allowed and α

    摘要翻译: 迭代解码器包括执行数据块的迭代解码的多个服务器,输入缓冲存储器和执行输入的数据的统计多路复用的控制单元,其首先存储在输入缓冲存储器中并由 其中一个服务器。 输入缓冲存储器包括N + L个存储器位置,其中N是服务器的数量,L是所谓的附加位置的数量。 在所有服务器忙时接收的每个待解码的块被存储在可能可用的L个附加位置中的一个中,或者如果输入缓冲存储器被完全填满则丢失。 附加位置的数量L和服务器的数量N使得根据D / G / N / N + L的排队模型计算出的丢失块的概率P SUB B