公开(公告)号：US4999626A

公开(公告)日：1991-03-12

申请号：US428628

申请日：1989-10-30

Applicant: Safdar M. Asghar ,  John G. Bartkowiak

Inventor： Safdar M. Asghar ,  John G. Bartkowiak

IPC: H03M1/12 ,  G06F3/05 ,  H03H17/06 ,  H04B14/04

CPC classification number: H03H17/0664 ,  G06F3/05

Abstract: An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device, the analog-digital conversion device converting incoming analog signals received from the analog device to incoming digital signals. The apparatus has a digital signal processing circuit for decimating the incoming digital signals and providing a decimated incoming digital signal to the digital device.The digital signal processing circuit is comprised of a plurality of modules which are configured so that a specified set of the plurality of modules effects a specified number of iterations of decimation. The modules are further designed so that additional modules may be added to the specified set of modules to increase the iterations of decimation.

公开(公告)号：US4996531A

公开(公告)日：1991-02-26

申请号：US221394

申请日：1988-07-19

Applicant: Dale K. Kotter ,  Richard A. Rankin

Inventor： Dale K. Kotter ,  Richard A. Rankin

IPC: G06F3/05

CPC classification number: G06F3/05

Abstract: A digital optical conversion module used to convert an analog signal to a computer compatible digital signal including a voltage-to-frequency converter, frequency offset response circuitry, and an electrical-to-optical converter. Also used in conjunction with the digital optical conversion module is an optical link and an interface at the computer for converting the optical signal back to an electrical signal. Suitable for use in hostile environments having high levels of electromagnetic interference, the conversion module retains high resolution of the analog signal while eliminating the potential for errors due to noise and interference. The module can be used to link analog output scientific equipment such as an electrometer used with a mass spectrometer to a computer.

Abstract translation: 一种用于将模拟信号转换成包括电压 - 频率转换器，频率偏移响应电路和电 - 光转换器的计算机兼容数字信号的数字光转换模块。 还与数字光转换模块一起使用的是光链路和计算机上用于将光信号转换回电信号的接口。 转换模块适用于具有高水平电磁干扰的敌对环境，保持模拟信号的高分辨率，同时消除由于噪声和干扰引起的误差。 该模块可用于将模拟输出科学设备（例如与质谱仪一起使用的静电计）连接到计算机。

公开(公告)号：US4996528A

公开(公告)日：1991-02-26

申请号：US434271

申请日：1989-10-30

Applicant: Safdar M. Asghar ,  John G. Bartkowiak

Inventor： Safdar M. Asghar ,  John G. Bartkowiak

IPC: H03M1/00 ,  G06F3/05 ,  H03H17/02 ,  H03H17/06 ,  H04B14/04

CPC classification number: H03H17/0294 ,  G06F3/05 ,  H03H17/0685 ,  H03H2218/08

Abstract: An apparatus adaptable for use with an analog-digital-analog conversion device for effecting communications between an analog device and a digital device, the analog-digital-analog conversion device converting incoming analog signals received from the analog device to incoming digital signals, and for converting interpolated outgoing digital signals to outgoing analog signals. The apparatus has a digital signal processing circuit for decimating the incoming digital signals and providing a decimated incoming digital signal to the digital device, and for interpolating outgoing digital signals received from the digital device and providing an interpolated outgoing digital signal to the analog-digital-analog device.The digital signal processing circuit is comprised of a plurality of modules which are configured so that a specified set of the plurality of modules effects a specified number of iterations of decimation and a specified number of iterations of interpolation. Certain of the specified set of modules participate in both the decimation and interpolation operations. The modules are further designed so that additional modules may be added to the specified set of modules to increase the iterations of decimation or to increase the iterations of interpolation, or to increase the iterations of both decimation and interpolation.

公开(公告)号：US4937579A

公开(公告)日：1990-06-26

申请号：US271652

申请日：1988-11-16

Applicant: Kenji Maio ,  Masao Hotta ,  Shigeru Watanabe

Inventor： Kenji Maio ,  Masao Hotta ,  Shigeru Watanabe

IPC: H03M1/12 ,  G01R13/20 ,  G06F3/05 ,  H03M1/18

CPC classification number: H03M1/188

Abstract: The same analog signal is inputted to an 8-bit AD converter and to a 4-bit AD converter to obtain an 8-bit digital data and a 4-bit digital data for the same sample value of the analog signal. Values of the 8-bit digital data and 4-bit digital data are compared with each other. The 8-bit digital data is outputted as a digital signal for the sample value of the analog signal when a difference between these values is not greater than one-half the quantity that corresponds to the least significant bit of the 4-bit digital data, and the 4-bit digital data is outputted as a digital signal for the sample value of the analog signal in other cases. There is realized AD conversion which operates apparently at high speeds maintaining high accuracy.

Abstract translation: 相同的模拟信号输入到8位AD转换器和4位AD转换器，以获得模拟信号的相同采样值的8位数字数据和4位数字数据。 将8位数字数据和4位数字数据的值进行比较。 当这些值之间的差不大于与4位数字数据的最低有效位对应的数量的一半时，8位数字数据作为模拟信号采样值的数字信号输出， 在其他情况下，4位数字数据作为模拟信号的采样值输出为数字信号。 实现了以高速运行的AD转换，保持高精度。

公开(公告)号：US4905005A

公开(公告)日：1990-02-27

申请号：US189408

申请日：1988-04-27

Applicant: Herve Arribard ,  Bruno Cornut ,  Gilbert Passade ,  Claude Sesques

Inventor： Herve Arribard ,  Bruno Cornut ,  Gilbert Passade ,  Claude Sesques

IPC: G06F3/05 ,  G01N21/27 ,  H03M1/00 ,  H03M1/38

CPC classification number: G01N21/27 ,  H03M1/1235

Abstract: The object of the present invention is the improvement of logarithmic amplifiers and/or converters and the applications of such devices in particular to photometric analyzer apparatuses.These amplifiers are characterized by the fact that they are linear with an amplification gain programmable by the .mu.P computer and that they may be preceded optionally by a reference voltage system.Application to the measurement of light transmitted by samples.

Abstract translation: 本发明的目的是对数放大器和/或转换器的改进以及这些装置特别是光度分析装置的应用。 这些放大器的特征在于它们与由μP计算机可编程的放大增益是线性的，并且它们可以在可选的参考电压系统之前。 应用于样品传输的光的测量。

公开(公告)号：US4901265A

公开(公告)日：1990-02-13

申请号：US132348

申请日：1987-12-14

Applicant: Richard J. Kerr ,  Lindsay A. Weaver

Inventor： Richard J. Kerr ,  Lindsay A. Weaver

IPC: H03M1/04 ,  G06F1/03 ,  G06F3/05 ,  G06J1/00 ,  H03B28/00 ,  H03M1/08 ,  H03M1/10 ,  H03M1/66

CPC classification number: G06J1/00 ,  G06F1/0328 ,  G06F2101/04 ,  G06F2211/902

Abstract: A method and apparatus for reducing spurious output noise in digital frequency synthesizers employing sine amplitude converters connected to Digital-to-Analog converters to generate analog waveforms from sine amplitude data. Random or pseudorandom numbers having a value equal to or less than plus or minus one-half of a minimum quantization step or value change for the sine amplitude data are generated and added to the sine amplitude data with the resulting sum being transferred to the Digital-to-Analog converter. In one embodiment, a summation circuit is connected between an output of the sine function converter and an input of the Digital-to-Analog converter and also has a second input connected to a pseudorandom number generator which provides Pseudorandom numbers varying in value over a range of .+-.1/2.sup.n+1 times a least significant step value, or bit for base 2, of a corresponding Digital-to-Analog input data value where n is greater than or equal to 1.

Abstract translation: 一种减少数字频率合成器中杂散输出噪声的方法和装置，其采用连接到数模转换器的正弦幅度转换器，以从正弦振幅数据产生模拟波形。 生成具有等于或小于最小量化步长的正负两倍的正数振幅数据的随机或伪随机数，并将其相加到正弦幅度数据，并将所得到的和传送到数字 - 模拟转换器。 在一个实施例中，求和电路连接在正弦函数转换器的输出端和数模转换器的输入端之间，并且还具有连接到伪随机数发生器的第二输入端，该伪随机数发生器提供在范围内变化的伪随机数 对于n大于或等于1的对应的数模转换输入数据值的+/- 1 / 2n + 1倍的最低有效步长值或基数2的位。

公开(公告)号：US4763105A

公开(公告)日：1988-08-09

申请号：US71671

申请日：1987-07-08

Applicant: Yih-Chyun Jenq

Inventor： Yih-Chyun Jenq

IPC: G06F3/041 ,  G01R13/20 ,  G06F3/048 ,  G06F3/05 ,  H03M1/00 ,  H03M1/12 ,  H03M1/06

CPC classification number: H03M1/1061 ,  H03M1/1215

Abstract: A digitizer system includes M digitizers, each producing a separate waveform data sequence representing a succession of instantaneous magnitudes of an input signal at sample times determined by a periodic clock signal. Transmission of the clock signal to each digitizer is delayed by a corresponding adjustable delay time so as to control the relative sample timing of the digitizers. To adjust sample timing, a sine wave signal is applied as the input signal to each digitizer such that the M digitizers produce M separate waveform data sequences in response to said input signal and the M data sequences are interleaved and windowed to form a single waveform data sequence. A first sequence of complex numbers representing a discrete Fourier transform of the single waveform data sequence is generated and then a second sequence of M complex numbers is formed from elements corresponding to relative magnitude peaks of the first sequence. A third sequence of M complex numbers is generated representing an inverse discrete Fourier transform of the second sequence and the phase angle of each number of the third sequence is computed and divided by the input signal frequency to produce a set of M numbers, each representing a timing error for a corresponding one of the M digitizers. The time delay corresponding to each digitizer is then adjusted by the amount of the timing error.

公开(公告)号：US4727478A

公开(公告)日：1988-02-23

申请号：US580630

申请日：1984-02-16

Applicant: Cyril Endfield ,  Christopher J. Rainey ,  John Southgate

Inventor： Cyril Endfield ,  Christopher J. Rainey ,  John Southgate

IPC: B41J5/08 ,  A63F13/02 ,  G06F3/023 ,  G06F3/05 ,  G06F15/02 ,  G06F17/40 ,  H03M11/08 ,  G06F3/14

CPC classification number: G06F3/023 ,  A63F13/02 ,  A63F13/22 ,  G06F3/0235 ,  A63F2300/1018

Abstract: Computer apparatus comprising a central computer having a data input port, means connecting two or more remote chord keyboards to the input port, and means for identifying with each respective keyboard alpha-numeric and like character data and command instructions generated by operation thereof and received through the input port; the central computer is programmed to process and combine the character data from the keyboards in accordance with the commands and to output resultant information for display in common by video and/or audio display means. In a preferred embodiment key-operated switches incorporated in each remote chord keyboard are connected in an R-2R resistive ladder network so that operation thereof either singly or in combinations of two to all will produce ratiometric changes in an analog output voltage that uniquely varies as the binary weighting of the operated switch or switch combination. An analog-to-digital converter is connected to the input port of the computer to translate the signals generated at the remote chord keyboard to a form that can be handled by the central processing unit of the central computer.

Abstract translation: 计算机装置，包括具有数据输入端口的中央计算机，将两个或多个远程和弦键盘连接到输入端口的装置，以及用于识别每个相应的键盘字母数字和类似的字符数据和由其操作产生的命令指令的装置， 输入端口; 中央计算机被编程为根据命令处理和组合来自键盘的字符数据，并输出结果信息以供视频和/或音频显示装置共同显示。 在优选实施例中，结合在每个远程弦键盘中的钥匙操作的开关连接在R-2R电阻梯形网络中，使得其单独或两者的组合的操作将产生模拟输出电压的比例变化，该模拟输出电压唯一地变化为 操作开关或开关组合的二进制加权。 模拟 - 数字转换器连接到计算机的输入端口，以将在远程和弦键盘处产生的信号转换成可由中央计算机的中央处理单元处理的形式。

公开(公告)号：US4706186A

公开(公告)日：1987-11-10

申请号：US751981

申请日：1985-06-28

Applicant: Takao Mogi ,  Masahiko Morizono

Inventor： Takao Mogi ,  Masahiko Morizono

IPC: G06F3/05 ,  G01R31/28 ,  G06F3/00 ,  G06F11/273 ,  G06J1/00 ,  H04N17/04 ,  G05B23/02 ,  G06F11/30 ,  G06F13/38

CPC classification number: G01R31/2834 ,  G06F11/273 ,  G06J1/00

Abstract: An integrated circuit device for an electronic equipment having an internal bus, the integrated circuit device comprising a digital-to-analog converter for converting a serial digital control signal to a corresponding analog control signal, a plurality of circuits subject to control in response to the analog control signal for performing specific functions, a switch circuit for selecting any one of the plurality of circuits, a switch control circuit for controlling the switch circuit to select any one of the plurality of circuits according to a received selection signal, an analog-to-digital converter for converting an output signal from the switch circuit into a corresponding digital signal, and a bus interface circuit for sending the serial digital control signal from the internal bus to the digital-to-analog converter and for sending the selection signal to the switch control circuit.

Abstract translation: 一种用于具有内部总线的电子设备的集成电路装置，所述集成电路装置包括用于将串行数字控制信号转换为对应的模拟控制信号的数模转换器，响应于所述内部总线进行控制的多个电路 用于执行特定功能的模拟控制信号，用于选择多个电路中的任何一个的开关电路;开关控制电路，用于根据所接收的选择信号控制开关电路以选择多个电路中的任何一个，模拟到 数字转换器，用于将来自开关电路的输出信号转换为对应的数字信号;以及总线接口电路，用于将串行数字控制信号从内部总线发送到数模转换器，并将选择信号发送到 开关控制电路。

公开(公告)号：US4674035A

公开(公告)日：1987-06-16

申请号：US725050

申请日：1985-04-19

Applicant: Joseph C. Engel

Inventor： Joseph C. Engel

IPC: G06F11/30 ,  G06F3/05 ,  G06F11/00 ,  G06F11/14 ,  G06F11/28 ,  H03K5/159

CPC classification number: G06F11/0757 ,  G06F11/1402 ,  G06F3/05 ,  G06F11/0754

Abstract: A supervisory circuit for use in an integrated circuit to supervise the program execution of a processing unit is disclosed. The processing unit generates a restart signal at a particular duty cycle under proper program execution conditions and at an undesirable duty cycle under improper program execution conditions. The supervising circuit includes a capacitive or like circuit element for converting the restart signal into a signal representative of the duty cycle thereof and compares the generated signal to a reference window comprising upper and lower reference values. Should the generated signal exceed the boundaries of the window reference, a corresponding control signal is generated to change the circuit conditions and generate a reset signal to the processing unit to govern the program execution thereof to a prespecified point from which point program execution may continue upon removal of the reset signal.

Abstract translation: 公开了一种用于集成电路中用于监视处理单元的程序执行的监控电路。 处理单元在适当的程序执行条件下以特定占空比产生重启信号，并且在不正确的程序执行条件下产生不期望的占空比。 监控电路包括用于将重启信号转换为表示占空比的信号的电容或类似电路元件，并将所生成的信号与包括上参考值和下参考值的参考窗口进行比较。 如果产生的信号超过窗口参考的边界，则产生相应的控制信号以改变电路状况并产生到处理单元的复位信号，以将其程序执行控制到预定的点，从该点可以继续执行点程序执行 去除复位信号。