-
-
-
-
64.发明授权
公开(公告)号：US2489375A
公开(公告)日：1949-11-29
申请号：US74669447
申请日：1947-05-08
-
公开(公告)号：US2473208A
公开(公告)日：1949-06-14
申请号：US56338844
申请日：1944-11-14
申请人： STROMBERG CARLSON CO
发明人： LARSEN MERWIN J
IPC分类号： H03K4/90
CPC分类号： H03K4/90
-
公开(公告)号：US11627273B2
公开(公告)日：2023-04-11
申请号：US17217950
申请日：2021-03-30
发明人： Tao Sun
摘要： A ramp generator includes a plurality of switched current sources coupled in parallel between a resistor and ground. A digital ramp control signal generator includes a counter to generate a ramp control signal in response to a clock signal. Each bit of the ramp control signal is coupled to control switching of a respective one of the plurality of switched current sources to generate a ramp signal at an output of the ramp generator. The digital ramp control signal generator is coupled to receive a reset signal to zero the ramp control signal. The digital ramp control signal generator is further coupled to receive a set bits signal to initialize the ramp signal to a preset value after every reset of the ramp control signal to add a DC offset compensation current determined by the preset value to the ramp signal.
-
公开(公告)号：US10340926B2
公开(公告)日：2019-07-02
申请号：US15284190
申请日：2016-10-03
摘要： Aspects of this disclosure relate to reducing settling time of a sawtooth ramp signal in a phase-locked loop. Information from a loop filter of the phase-locked loop can be stored and used within the loop filter so as to improve the settling time of the sawtooth ramp signal. In certain embodiments, the settling time of a periodic sawtooth ramp signal can be reduced to less than one microsecond. An output frequency at the end of the sawtooth chirp can be brought back to an initial value without significantly modifying phase error in disclosed embodiments.
-
公开(公告)号：US10187602B2
公开(公告)日：2019-01-22
申请号：US16034226
申请日：2018-07-12
发明人： Fan Zhu , Yu-Shen Yang , Yingkan Lin , Zejian Wang , Liping Deng
摘要： An example method for fast ramp start-up during analog to digital conversion (ADC) includes opening a feedback bypass switch coupled to an amplifier to initiate an ADC operation, providing an injection current pulse to an inverting input of the amplifier, where the non-inverting input is coupled to a feedback bypass switch, integrating a first reference current coupled to the inverting input of the amplifier, where the integrating of the first reference current occurs due to the opening of the feedback bypass switch, and providing a reference voltage in response to the injection current pulse, the integrating of the first reference current, and a reference voltage coupled to a non-inverting input of the amplifier, where a level of the reference voltage is increased at least at initiation of the ADC operation in response to the injection current pulse.
-
公开(公告)号：US20180167573A1
公开(公告)日：2018-06-14
申请号：US15376352
申请日：2016-12-12
发明人： Fan Zhu , Yu-Shen Yang , Yingkan Lin , Zejian Wang , Liping Deng
摘要： An example method for fast ramp start-up during analog to digital conversion (ADC) includes opening a feedback bypass switch coupled to an amplifier to initiate an ADC operation, providing an injection current pulse to an inverting input of the amplifier, where the non-inverting input is coupled to a feedback bypass switch, integrating a first reference current coupled to the inverting input of the amplifier, where the integrating of the first reference current occurs due to the opening of the feedback bypass switch, and providing a reference voltage in response to the injection current pulse, the integrating of the first reference current, and a reference voltage coupled to a non-inverting input of the amplifier, where a level of the reference voltage is increased at least at initiation of the ADC operation in response to the injection current pulse.
-
公开(公告)号：US20170338807A1
公开(公告)日：2017-11-23
申请号：US15584729
申请日：2017-05-02
发明人： Hua ZHU , Kaiwei YAO
摘要： A ramp generator includes a current generator, a current mirror, and a first capacitor. The current generator has an input for receiving a clock signal, and an output for providing a current proportional to a frequency of the clock signal using a first transistor having first and second current electrodes and a control electrode, an amplifier that establishes a reference voltage on the second current electrode of the first transistor, and a variable resistor coupled between the second current electrode of the second transistor and ground whose resistance is set according to the frequency of the clock signal. The current mirror has an input coupled to the first terminal of the first transistor, and a second terminal. The first capacitor has a first terminal coupled to the output of the current mirror and providing a ramp signal, and a second terminal coupled to the first power supply voltage terminal.
-
-
-
-
-
-
-
-
-
搜索结果
189 条记录 (耗时 0.01 秒)
