公开(公告)号：US20100291932A1

公开(公告)日：2010-11-18

申请号：US12776029

申请日：2010-05-07

申请人： Osamu Tsuchiya ,  Shuichi Abe ,  Yoshiyuki Imai ,  Takayuki Moriyama

发明人： Osamu Tsuchiya ,  Shuichi Abe ,  Yoshiyuki Imai ,  Takayuki Moriyama

IPC分类号： H04W36/00

CPC分类号： H04W4/16 ,  H04W28/08 ,  H04W36/10

摘要： As a network control device which controls a call connection between a calling party terminal and a called party terminal, a network control device determines whether the own network control device is in a congestion state when a handover request is acquired from another network control device which is in the congestion state, and stops transmitting a busy tone to a mobile terminal which is the calling party terminal and transmits a ring back tone to the mobile terminal when it is determined that the own network control device is not in the congestion state.

摘要翻译： 作为控制主叫方终端和被叫方终端之间的呼叫连接的网络控制装置，当从另一网络控制装置获取切换请求时，网络控制装置判断自己的网络控制装置是否处于拥塞状态 在拥塞状态下，并且当确定自己的网络控制设备不处于拥塞状态时，停止向作为主叫方终端的移动终端发送忙音，并向移动终端发送回铃音。

公开(公告)号：US20090250516A1

公开(公告)日：2009-10-08

申请号：US12419813

申请日：2009-04-07

申请人： Osamu Tsuchiya ,  Hitoshi Iizaka ,  Yoshiya Yamada ,  Hidemi Mihara ,  Norihiko Kurihara ,  Hidehiro Naitou

发明人： Osamu Tsuchiya ,  Hitoshi Iizaka ,  Yoshiya Yamada ,  Hidemi Mihara ,  Norihiko Kurihara ,  Hidehiro Naitou

IPC分类号： G06K15/00 ,  G06Q30/00

CPC分类号： G07G1/0045 ,  G06Q10/087 ,  G06Q20/203 ,  G06Q20/208 ,  G06Q30/02

摘要： A commodity registration processing apparatus detects, with a commodity sensor, whether a commodity is present in an imaging area of an imaging device and, when the commodity sensor detects that the commodity is present in the imaging area, decodes a commodity code barcode or the commodity code barcode and a discount barcode on the basis of image data acquired by imaging by the imaging device, and performs registration and price adjustment processing for the commodity on the basis of a decoding result of the commodity code barcode or the decoding result of the commodity code barcode and a decoding result of the discount barcode.

摘要翻译： 商品登记处理装置利用商品传感器检测成像装置的成像区域中是否存在商品，并且当商品传感器检测到商品存在于成像区域中时，对商品代码条形码或商品进行解码 基于通过成像装置成像获取的图像数据的代码条形码和折扣条形码，并且基于商品代码条形码的解码结果或商品代码的解码结果对商品进行登记和价格调整处理 条码和折扣条码的解码结果。

公开(公告)号：US20090194593A1

公开(公告)日：2009-08-06

申请号：US12361711

申请日：2009-01-29

申请人： Norihiko Kurihara ,  Hitoshi Iizaka ,  Yoshiya Yamada ,  Hidemi Mihara ,  Osamu Tsuchiya ,  Hidehiro Naitou

发明人： Norihiko Kurihara ,  Hitoshi Iizaka ,  Yoshiya Yamada ,  Hidemi Mihara ,  Osamu Tsuchiya ,  Hidehiro Naitou

IPC分类号： G06K7/10

CPC分类号： G07G1/0054 ,  A47F9/046 ,  G07G3/006

摘要： When an error occurs in decoding of coded data such as a barcode, the error in the decoding of the coded data is analyzed based on an image acquisition status of the coded data in image data acquired by image acquisition performed by an image acquisition section. Then, handling information allowing the coded data to be decoded is provided depending on a result of the analysis.

摘要翻译： 当对诸如条形码的编码数据进行解码时发生错误时，基于由图像获取部执行的图像采集获得的图像数据中的编码数据的图像获取状态来分析编码数据的解码中的错误。 然后，根据分析结果提供允许编码数据被解码的处理信息。

公开(公告)号：US20060268610A1

公开(公告)日：2006-11-30

申请号：US11498230

申请日：2006-08-03

申请人： Tatsuya Ishii ,  Hitoshi Miwa ,  Osamu Tsuchiya ,  Shooji Kubono

发明人： Tatsuya Ishii ,  Hitoshi Miwa ,  Osamu Tsuchiya ,  Shooji Kubono

IPC分类号： G11C16/04

CPC分类号： G11C16/3427 ,  G11C16/0491 ,  G11C16/10 ,  G11C16/12 ,  G11C16/16 ,  G11C16/3404 ,  G11C16/3431 ,  G11C16/3459 ,  G11C2216/18

摘要： A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.

公开(公告)号：US20060120164A1

公开(公告)日：2006-06-08

申请号：US11342885

申请日：2006-01-31

申请人： Tatsuya Ishii ,  Hitoshi Miwa ,  Osamu Tsuchiya ,  Shooji Kubono

发明人： Tatsuya Ishii ,  Hitoshi Miwa ,  Osamu Tsuchiya ,  Shooji Kubono

IPC分类号： G11C16/04

CPC分类号： G11C16/3427 ,  G11C16/0491 ,  G11C16/10 ,  G11C16/12 ,  G11C16/16 ,  G11C16/3404 ,  G11C16/3431 ,  G11C16/3459 ,  G11C2216/18

摘要： A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.

公开(公告)号：US6130841A

公开(公告)日：2000-10-10

申请号：US432070

申请日：1999-11-02

申请人： Toshihiro Tanaka ,  Masataka Kato ,  Osamu Tsuchiya ,  Toshiaki Nishimoto

发明人： Toshihiro Tanaka ,  Masataka Kato ,  Osamu Tsuchiya ,  Toshiaki Nishimoto

IPC分类号： G11C16/04 ,  G11C16/28 ,  G11C16/34 ,  G11C16/06

CPC分类号： G11C16/3413 ,  G11C16/0416 ,  G11C16/28 ,  G11C16/3404 ,  G11C16/3409 ,  G11C16/3459

摘要： After decreasing the threshold voltages of a plurality of memory cells collectively or selectively, the presence or absence of any memory cell of which the threshold voltage has dropped below a predetermined voltage verified collectively for each of memory cell groups connected to word line (low-threshold value verification) , and any memory cell of which the threshold voltage has excessively dropped is selectively written. Also, the well of each of memory cell is formed in the region of an element isolation layer for isolating it from the substrate of a memory apparatus, and a negative voltage is supplied to the memory well distributively with a positive voltage applied as a word line voltage, thus supplying them as erase operation voltages. The absolute value of the memory well voltage is set substantially equal to or lower than the word line voltage for the read operation. Sectors constituting each memory mat includes a sector (selected sector) selected for the erase operation with each word line thereof supplied with a positive voltage, a sector (non-selected sector) not selected for the erase operation with a word line voltage different from a memory well voltage, and further a sector (completely non-selected sector) not selected for the erase operation with a word line voltage equal to the voltage between a source and a drain of the memory cell.

摘要翻译： 在集体或选择性地降低多个存储器单元的阈值电压之后，存在或不存在阈值电压已经降低到连接到字线的每个存储器单元组（低阈值）下集中验证的预定电压以下的任何存储单元 值验证），并且选择性地写入阈值电压过度下降的任何存储单元。 此外，存储单元的阱形成在用于将其与存储装置的基板隔离的元件隔离层的区域中，并且以施加作为字线的正电压将负电压分配地提供给存储器 电压，从而将其提供为擦除操作电压。 存储器阱电压的绝对值被设定为基本上等于或低于读取操作的字线电压。 构成每个存储器垫的扇区包括为其擦除操作选择的扇区（选择的扇区），其每个字线被提供有正电压，未被选择用于擦除操作的扇区（未选择的扇区），字线电压不同于 存储器阱电压，以及未被选择用于具有等于存储器单元的源极和漏极之间的电压的字线电压的擦除操作的扇区（完全未选择的扇区）。

公开(公告)号：US6127255A

公开(公告)日：2000-10-03

申请号：US943729

申请日：1997-10-03

申请人： Jun Sugiura ,  Osamu Tsuchiya ,  Makoto Ogasawara ,  Fumio Ootsuka ,  Kazuyoshi Torii ,  Isamu Asano ,  Nobuo Owada ,  Mitsuaki Horiuchi ,  Tsuyoshi Tamaru ,  Hideo Aoki ,  Nobuhiro Otsuka ,  Seiichirou Shirai ,  Masakazu Sagawa ,  Yoshihiro Ikeda ,  Masatoshi Tsuneoka ,  Toru Kaga ,  Tomotsugu Shimmyo ,  Hidetsugu Ogishi ,  Osamu Kasahara ,  Hiromichi Enami ,  Atsushi Wakahara ,  Hiroyuki Akimori ,  Sinichi Suzuki ,  Keisuke Funatsu ,  Yoshinao Kawasaki ,  Tunehiko Tubone ,  Takayoshi Kogano ,  Ken Tsugane

发明人： Jun Sugiura ,  Osamu Tsuchiya ,  Makoto Ogasawara ,  Fumio Ootsuka ,  Kazuyoshi Torii ,  Isamu Asano ,  Nobuo Owada ,  Mitsuaki Horiuchi ,  Tsuyoshi Tamaru ,  Hideo Aoki ,  Nobuhiro Otsuka ,  Seiichirou Shirai ,  Masakazu Sagawa ,  Yoshihiro Ikeda ,  Masatoshi Tsuneoka ,  Toru Kaga ,  Tomotsugu Shimmyo ,  Hidetsugu Ogishi ,  Osamu Kasahara ,  Hiromichi Enami ,  Atsushi Wakahara ,  Hiroyuki Akimori ,  Sinichi Suzuki ,  Keisuke Funatsu ,  Yoshinao Kawasaki ,  Tunehiko Tubone ,  Takayoshi Kogano ,  Ken Tsugane

IPC分类号： G03F7/20 ,  G03F9/00 ,  H01L21/02 ,  H01L21/285 ,  H01L21/336 ,  H01L21/76 ,  H01L21/768 ,  H01L21/8238 ,  H01L21/8242 ,  H01L23/29 ,  H01L23/495 ,  H01L23/525 ,  H01L23/532 ,  H01L23/544 ,  H01L27/092 ,  H01L27/10 ,  H01L27/108 ,  H01L29/78 ,  H01L21/4763 ,  H01L21/469

CPC分类号： H01L27/10852 ,  G03F7/70333 ,  G03F9/70 ,  H01L21/28512 ,  H01L21/76 ,  H01L21/76801 ,  H01L21/76804 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/823807 ,  H01L23/291 ,  H01L23/4951 ,  H01L23/5258 ,  H01L23/532 ,  H01L23/544 ,  H01L27/0922 ,  H01L28/40 ,  H01L2223/54473 ,  H01L2224/05554 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L24/45 ,  H01L24/48 ,  H01L27/0928 ,  H01L27/10808 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/12036 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  Y10S257/90

摘要： Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions. The disclosed process includes forming insulating films over wiring lines including uppermost wiring lines, the uppermost wiring lines having gaps between adjacent uppermost wiring lines. The insulating films include forming a silicon oxide film over the wiring lines and in the gaps between adjacent uppermost wiring lines, and forming a silicon nitride film over the silicon oxide film, the silicon nitride film being formed by plasma chemical vapor deposition. The silicon oxide film is formed to have a thickness of at least one-half of the gap between adjacent uppermost wiring lines, with the silicon nitride film being thicker than the silicon oxide film.

摘要翻译： 这里公开了一种半导体集成电路器件制造工艺，用于在由元件分离绝缘膜和沟道阻挡区域形成的无源区域围绕的衬底的有源区的主表面上形成MISFET。 所公开的方法包括在包括最上面布线的布线上形成绝缘膜，最上面的布线在相邻最上布线之间具有间隙。 绝缘膜包括在布线和相邻的最上布线之间的间隙中形成氧化硅膜，并且在氧化硅膜上形成氮化硅膜，通过等离子体化学气相沉积形成氮化硅膜。 氧化硅膜形成为具有至少相邻最上面布线之间的间隙的一半的厚度，其中氮化硅膜比氧化硅膜厚。

公开(公告)号：US6023425A

公开(公告)日：2000-02-08

申请号：US342231

申请日：1999-06-29

申请人： Tatsuya Ishii ,  Hitoshi Miwa ,  Osamu Tsuchiya ,  Shooji Kubono

发明人： Tatsuya Ishii ,  Hitoshi Miwa ,  Osamu Tsuchiya ,  Shooji Kubono

IPC分类号： G11C16/02 ,  G11C7/00 ,  G11C11/34 ,  G11C16/04 ,  G11C16/10

CPC分类号： G11C16/3427 ,  G11C16/0491 ,  G11C16/10 ,  G11C16/12 ,  G11C16/16 ,  G11C16/3404 ,  G11C16/3431 ,  G11C16/3459 ,  G11C2216/18

摘要： A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.

公开(公告)号：US5982668A

公开(公告)日：1999-11-09

申请号：US135175

申请日：1998-08-18

申请人： Tatsuya Ishii ,  Hitoshi Miwa ,  Osamu Tsuchiya ,  Shooji Kubono

发明人： Tatsuya Ishii ,  Hitoshi Miwa ,  Osamu Tsuchiya ,  Shooji Kubono

IPC分类号： G11C16/02 ,  G11C7/00 ,  G11C11/34 ,  G11C16/04 ,  G11C16/10

CPC分类号： G11C16/3427 ,  G11C16/0491 ,  G11C16/10 ,  G11C16/12 ,  G11C16/16 ,  G11C16/3404 ,  G11C16/3431 ,  G11C16/3459 ,  G11C2216/18

摘要： A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.

公开(公告)号：US5739589A

公开(公告)日：1998-04-14

申请号：US657194

申请日：1996-06-03

申请人： Jun Sugiura ,  Osamu Tsuchiya ,  Makoto Ogasawara ,  Fumio Ootsuka ,  Kazuyoshi Torii ,  Isamu Asano ,  Nobuo Owada ,  Mitsuaki Horiuchi ,  Tsuyoshi Tamaru ,  Hideo Aoki ,  Nobuhiro Otsuka ,  Seiichirou Shirai ,  Masakazu Sagawa ,  Yoshihiro Ikeda ,  Masatoshi Tsuneoka ,  Toru Kaga ,  Tomotsugu Shimmyo ,  Hidetsugu Ogishi ,  Osamu Kasahara ,  Hiromichi Enami ,  Atsushi Wakahara ,  Hiroyuki Akimori ,  Sinichi Suzuki ,  Keisuke Funatsu ,  Yoshinao Kawasaki ,  Tunehiko Tubone ,  Takayoshi Kogano ,  Ken Tsugane

发明人： Jun Sugiura ,  Osamu Tsuchiya ,  Makoto Ogasawara ,  Fumio Ootsuka ,  Kazuyoshi Torii ,  Isamu Asano ,  Nobuo Owada ,  Mitsuaki Horiuchi ,  Tsuyoshi Tamaru ,  Hideo Aoki ,  Nobuhiro Otsuka ,  Seiichirou Shirai ,  Masakazu Sagawa ,  Yoshihiro Ikeda ,  Masatoshi Tsuneoka ,  Toru Kaga ,  Tomotsugu Shimmyo ,  Hidetsugu Ogishi ,  Osamu Kasahara ,  Hiromichi Enami ,  Atsushi Wakahara ,  Hiroyuki Akimori ,  Sinichi Suzuki ,  Keisuke Funatsu ,  Yoshinao Kawasaki ,  Tunehiko Tubone ,  Takayoshi Kogano ,  Ken Tsugane

IPC分类号： G03F7/20 ,  G03F9/00 ,  H01L21/02 ,  H01L21/285 ,  H01L21/336 ,  H01L21/76 ,  H01L21/768 ,  H01L21/8238 ,  H01L21/8242 ,  H01L23/29 ,  H01L23/495 ,  H01L23/525 ,  H01L23/532 ,  H01L23/544 ,  H01L27/092 ,  H01L27/10 ,  H01L27/108 ,  H01L29/78 ,  H01L21/44 ,  H01L21/48

CPC分类号： H01L27/10852 ,  G03F7/70333 ,  G03F9/70 ,  H01L21/28512 ,  H01L21/76 ,  H01L21/76801 ,  H01L21/76804 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/823807 ,  H01L23/291 ,  H01L23/4951 ,  H01L23/5258 ,  H01L23/532 ,  H01L23/544 ,  H01L27/0922 ,  H01L28/40 ,  H01L2223/54473 ,  H01L2224/05554 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L24/45 ,  H01L24/48 ,  H01L27/0928 ,  H01L27/10808 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/12036 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  Y10S257/90

摘要： Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel stopper regions over the principal surface portions below the element separating insulating film of the substrate by introducing an impurity into all the surface portions including the active regions and the inactive regions of the substrate after the first mask and the second mask have been removed.

摘要翻译： 这里公开了一种半导体集成电路器件制造工艺，用于在由分离绝缘膜和沟道阻挡区域形成的无源区域围绕的衬底的这些有源区的主表面上形成MISFET，其包括：形成步骤 通过不可氧化掩模的第一掩模和顺序地在衬底的有源区的主表面上的蚀刻掩模; 分别通过比第一掩模的不可氧化掩模和蚀刻掩模更薄的不可氧化掩模在第一掩模的侧壁上自对准形成第二掩模的步骤; 通过使用第一掩模和第二掩模蚀刻衬底的非活性区的主表面的步骤; 通过使用第一掩模和第二掩模的氧化在衬底的无活性区域的主表面上形成元件分离绝缘膜的步骤; 以及通过在第一掩模之后将杂质引入到包括基板的有源区域和非活性区域的全部表面部分中而在基板的元件分离绝缘膜下方的主表面部分上形成沟道阻挡区域的步骤， 面具已被删除。