公开(公告)号：US20100326511A1

公开(公告)日：2010-12-30

申请号：US12735692

申请日：2009-02-10

申请人： Yoshihide Wakayama ,  Kazuki Moyama ,  Tadahiro Ohmi ,  Akinobu Teramoto

发明人： Yoshihide Wakayama ,  Kazuki Moyama ,  Tadahiro Ohmi ,  Akinobu Teramoto

IPC分类号： H01L31/0216

CPC分类号： H01L31/048 ,  H01L31/02167 ,  Y02B10/12 ,  Y02E10/50

摘要： Disclosed is a solar cell comprising a solar cell semiconductor thin film formed on a base, a transparent conductive film formed on the semiconductor thin film, and a nitride-containing moisture diffusion-preventing film which covers the upper surface of the transparent conductive film. The moisture diffusion-preventing film is preferably composed of at least a silicon nitride film or a silicon carbide nitride (SiCN) film.

摘要翻译： 公开了一种太阳能电池，其包括形成在基底上的太阳能电池半导体薄膜，形成在半导体薄膜上的透明导电膜和覆盖透明导电膜的上表面的含氮化物的防潮扩散膜。 防潮防止膜优选由至少氮化硅膜或碳化硅氮化物（SiCN）膜构成。

公开(公告)号：US20100240283A1

公开(公告)日：2010-09-23

申请号：US12567092

申请日：2009-09-25

申请人： Takenao Nemoto ,  Tadahiro Ohmi ,  Akinobu Teramoto ,  Xun Gu ,  Ara Philipossian ,  Yasa Sampurno

发明人： Takenao Nemoto ,  Tadahiro Ohmi ,  Akinobu Teramoto ,  Xun Gu ,  Ara Philipossian ,  Yasa Sampurno

IPC分类号： B24B1/04

CPC分类号： H01L21/3212 ,  B24B37/042

摘要： [Problem] To improve polishing efficiency while lowering shear force added to semiconductor wafers while increasing polishing speed, without damaging the wafer's processing surface or the membrane under it.[Solution Method] Pressing the revolving head or carrier 34 that holds fixed the semiconductor wafer 10 to the polishing pad or polishing cloth 30 attached to rotating polishing table 32 in this CMP device and while rotating carrier 34 and polishing table 32 respectively, and supplying liquid slurry to polishing pad 30 from nozzle 36, planarization by chemical processes and mechanical processes is carried out by removing membranes of the lower face of semiconductor wafer 10 (the processing surface). The chemical mechanical polishing process of the present invention in regard to the size of the relationship between the rotation rate of semiconductor wafer 10 fW and the number of rotations of polishing pad 30 fP has 3 fp

摘要翻译： [问题]为了提高抛光效率，同时降低加入到半导体晶片中的剪切力同时增加抛光速度，而不损坏晶片的处理表面或其下面的膜。 [解决方案方法]将固定有半导体晶片10的旋转头或载体34按压到分别安装在该CMP装置中的旋转研磨台32上的研磨垫或抛光布30，同时分别旋转载体34和研磨台32， 从喷嘴36到研磨垫30的浆料，通过化学处理和机械加工的平坦化，通过去除半导体晶片10的下表面（处理用面）的膜来进行。 本发明的化学机械研磨方法关于半导体晶片10f的旋转速度与抛光垫30fP的旋转速度之间的关系的大小作为其下限为3fp

公开(公告)号：US20100193900A1

公开(公告)日：2010-08-05

申请号：US12667623

申请日：2008-02-25

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Sumio Sano ,  Makoto Yoshimi

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Sumio Sano ,  Makoto Yoshimi

IPC分类号： H01L27/12 ,  H01L21/762

CPC分类号： H01L21/76254 ,  H01L27/1203

摘要： A base is formed of a material, such as SiC, having mechanical characteristics higher than those of silicon for forming a semiconductor layer, and the base and the semiconductor layer are bonded through an insulating layer. After bonding, an SOI substrate is formed by mechanically separating the semiconductor layer from the base, and the separated semiconductor layer is reused for forming the subsequent SOI substrate. Thus, a large SOI substrate having a diameter of 400 mm or more, which has been difficult to obtain by conventional methods, can be obtained.

摘要翻译： 基体由诸如SiC的材料形成，具有比用于形成半导体层的硅的机械特性更高的机械特性，并且基底和半导体层通过绝缘层接合。 在接合之后，通过将半导体层与基底机械分离来形成SOI衬底，并且将分离的半导体层重新用于形成随后的SOI衬底。 因此，可以获得通过常规方法难以获得的直径为400mm以上的大型SOI衬底。

公开(公告)号：US07704893B2

公开(公告)日：2010-04-27

申请号：US10568461

申请日：2004-08-12

申请人： Yasuo Kobayashi ,  Kohei Kawamura ,  Tadahiro Ohmi ,  Akinobu Teramoto ,  Tatsuya Sugimoto ,  Toshiro Yamada ,  Kimiaki Tanaka

发明人： Yasuo Kobayashi ,  Kohei Kawamura ,  Tadahiro Ohmi ,  Akinobu Teramoto ,  Tatsuya Sugimoto ,  Toshiro Yamada ,  Kimiaki Tanaka

IPC分类号： H01L21/31

CPC分类号： H01L21/3127 ,  H01L21/0212 ,  H01L21/02274 ,  H01L21/3146

摘要： The present invention relates to a semiconductor device comprising an insulation film consisting of a fluoridation carbon film that has been subjected to thermal history of 420° C. or lower. The feature of the present invention is that an amount of hydrogen atoms included in the fluoridation carbon film is 3 atomic % or less before the fluoridation carbon film is subjected to the thermal history.

摘要翻译： 本发明涉及一种半导体器件，其包括由经历420℃或更低的热历史的氟化碳膜构成的绝缘膜。 本发明的特征在于，在氟化碳膜经受热历史之前，包含在氟化碳膜中的氢原子数量为3原子％以下。

公开(公告)号：US20090169789A1

公开(公告)日：2009-07-02

申请号：US12318341

申请日：2008-12-24

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Keita Fushimi ,  Jiro Yamanaka ,  Masayuki Miyashita ,  Tomoharu Nishioka

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Keita Fushimi ,  Jiro Yamanaka ,  Masayuki Miyashita ,  Tomoharu Nishioka

IPC分类号： B32B1/08

CPC分类号： B32B27/28 ,  B32B1/08 ,  B32B27/34 ,  Y10T428/1393

摘要： A resin pipe has an inner layer made of a fluororesin, an intermediate layer of nylon, and an outermost layer made of a fluororesin and covering the intermediate layer.

摘要翻译： 树脂管具有由氟树脂制成的内层，尼龙的中间层和由氟树脂制成的最外层并覆盖中间层。

公开(公告)号：US20090120673A1

公开(公告)日：2009-05-14

申请号：US11990860

申请日：2006-08-18

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Akihiro Morimoto

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Akihiro Morimoto

IPC分类号： H05K1/00

CPC分类号： H05K1/024 ,  H05K3/4602 ,  H05K3/4626 ,  H05K3/4673 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0254

摘要： A multilayered circuit board which is provided with a low-permittivity interlayer insulating film, and which can significantly improve the performance such as signal transmission characteristics of the multilayered circuit board such as a package and a printed board, because the surface in contact with the interlayer insulating film of the circuit board has no unevenness to eliminate the lowering of production yield and the deterioration of high-frequency signal transmission characteristics; and electronic equipment using the circuit board. The multilayered circuit board comprises, mounted on a substrate, plural wiring layers and plural insulating layers positioned between the plural wiring layers, wherein at least part of the plural insulating layers are composed of a porous insulating layer containing at least any of materials selected from a porous material group consisting of porous material, aerogel, porous silica, porous polymer, hollow silica and hollow polymer, and a non-porous insulating layer formed on at least one surface of the porous insulating layer and not containing the porous material group.

摘要翻译： 具有低介电常数层间绝缘膜的多层电路板，能够显着地提高诸如封装和印刷电路板的多层电路板的信号传输特性等性能，因为与中间层 电路板的绝缘膜没有不均匀性，消除了生产成本的降低和高频信号传输特性的恶化; 和使用电路板的电子设备。 多层电路板包括安装在基板上的多个布线层和位于多个布线层之间的多个绝缘层，其中多个绝缘层的至少一部分由多孔绝缘层组成，多孔绝缘层至少含有选自 由多孔材料，气凝胶，多孔二氧化硅，多孔聚合物，中空二氧化硅和中空聚合物组成的多孔材料组和形成在多孔绝缘层的至少一个表面上并且不包含多孔材料组的无孔绝缘层。

公开(公告)号：US20090108452A1

公开(公告)日：2009-04-30

申请号：US12290589

申请日：2008-10-31

申请人： Takenao Nemoto ,  Akinobu Teramoto ,  Tadahiro Ohmi

发明人： Takenao Nemoto ,  Akinobu Teramoto ,  Tadahiro Ohmi

IPC分类号： H01L23/52 ,  H01L21/4763

CPC分类号： H01L23/53238 ,  C23C14/0641 ,  C23C14/345 ,  H01L21/2855 ,  H01L21/76843 ,  H01L21/76846 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor device including a sputtering process for forming a barrier film mainly having tantalum or tantalum nitride on an interlayer insulator formed by sputtering using a xenon gas. The sputtering process may include a step of forming one barrier film mainly composed of tantalum nitride on a substrate by sputtering using a xenon gas by applying a RF bias, and a step for forming another barrier film mainly composed of tantalum on the first barrier film by sputtering using a xenon gas without applying the RF bias. The barrier film may be formed by changing the RF bias continuously, and forming the interlayer insulator side by applying the RF bias, and forming the wiring side without applying the RF bias.

摘要翻译： 一种制造半导体器件的方法，该半导体器件包括溅射工艺，用于在通过使用氙气的溅射形成的层间绝缘体上形成主要具有钽或氮化钽的阻挡膜。 溅射工艺可以包括通过施加RF偏压通过使用氙气气体的溅射在衬底上形成主要由氮化钽构成的一个阻挡膜的步骤，以及用于在第一阻挡膜上形成主要由钽构成的另一阻挡膜的步骤 使用氙气进行溅射而不施加RF偏压。 可以通过连续地改变RF偏压来形成阻挡膜，并且通过施加RF偏压来形成层间绝缘体侧，并且在不施加RF偏压的情况下形成布线侧。

公开(公告)号：US20090001471A1

公开(公告)日：2009-01-01

申请号：US12086886

申请日：2006-12-20

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Kazufumi Watanabe

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Kazufumi Watanabe

IPC分类号： H01L29/00

CPC分类号： H01L27/1211 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823878 ,  H01L29/045 ,  H01L29/785 ,  H01L2029/7857

摘要： For equalizing the rising and falling operating speeds in a CMOS circuit, it is necessary to make the areas of a p-type MOS transistor and an n-type MOS transistor different from each other due to a difference in carrier mobility therebetween. This area unbalance prevents an improvement in integration degree of semiconductor devices.The NMOS transistor and the PMOS transistor each have a three-dimensional structure with a channel region on both the (100) plane and the (110) plane so that the areas of the channel regions and gate insulating films of both transistors are equal to each other. Accordingly, it is possible to make the areas of the gate insulating films and so on equal to each other and also to make the gate capacitances equal to each other. Further, the integration degree on a substrate can be improved twice as much as that in the conventional technique.

摘要翻译： 为了均衡CMOS电路中的上升和下降操作速度，由于它们之间的载流子迁移率的差异，需要使p型MOS晶体管和n型MOS晶体管的面积彼此不同。 该区域不平衡防止了半导体器件的集成度的提高。 NMOS晶体管和PMOS晶体管各自具有在（100）面和（110）面上具有沟道区的三维结构，使得两个晶体管的沟道区和栅绝缘膜的面积等于 其他。 因此，可以使栅极绝缘膜等的面积相等并且使栅极电容彼此相等。 此外，基板上的积分度可以提高到常规技术的两倍。

公开(公告)号：US20080268657A1

公开(公告)日：2008-10-30

申请号：US10594895

申请日：2005-03-31

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Hiroshi Yamauchi ,  Yukio Hayakawa

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Hiroshi Yamauchi ,  Yukio Hayakawa

IPC分类号： H01L21/469 ,  H05H1/24

CPC分类号： H01L21/3105 ,  H01J2237/3387 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/3143 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11568

摘要： The application of oxynitriding treatment to electronic appliances involve the problem that N2 ions are formed to thereby damage any oxynitride film. It is intended to provide a method of plasma treatment capable of realizing high-quality oxynitriding and to provide a process for producing an electronic appliance in which use is made of the method of plasma treatment. There is provided a method of plasma treatment, comprising generating plasma with a gas for plasma excitation and introducing a treating gas in the plasma to thereby treat a treatment subject, wherein the treating gas contains nitrous oxide gas, this nitrous oxide gas introduced in a plasma of

摘要翻译： 对电子器件应用氧氮化处理涉及形成N 2+离子从而损坏任何氮氧化物膜的问题。 旨在提供能够实现高质量氮氧化的等离子体处理方法，并提供一种使用等离子体处理方法的电子设备的制造方法。 提供了一种等离子体处理方法，包括用等离子体激发的气体产生等离子体并在等离子体中引入处理气体，从而处理处理对象，其中处理气体含有一氧化二氮气体，这种一氧化二氮气体引入等离子体 的<2.24eV电子温度，从而降低了任何绝缘膜损伤的离子的产生，从而实现高质量的氮氧化。 此外，提供了一种使用等离子体处理方法的电子设备的制造方法。

公开(公告)号：US20070052042A1

公开(公告)日：2007-03-08

申请号：US10551843

申请日：2004-03-31

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Hidetoshi Wakamatsu ,  Yasuo Kobayashi

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Hidetoshi Wakamatsu ,  Yasuo Kobayashi

IPC分类号： H01L29/94 ,  H01L21/8238

CPC分类号： H01L21/318 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/518

摘要： In order to provide a semiconductor device having good quality by keeping the relative permittivity of a High-K insulation film in a high state, or to provide a method for manufacturing a semiconductor device in which the relative permittivity of the High-K insulation film can be kept in a high state, a semiconductor device is disclosed that includes a silicon substrate, a gate electrode layer, and a gate insulation film between the silicon substrate and the gate electrode layer. The gate insulation film is a high relative permittivity (high-k) film being formed by performing a nitriding treatment on a mixture of a metal and silicon. The High-K film itself becomes a nitride so as to prevent SiO2 from being formed.

摘要翻译： 为了通过将高K绝缘膜的相对介电常数保持在高状态来提供具有良好质量的半导体器件，或者提供一种半导体器件的制造方法，其中高K绝缘膜的相对介电常数可以 保持在高状态，公开了在硅衬底和栅极电极层之间包括硅衬底，栅极电极层和栅极绝缘膜的半导体器件。 栅极绝缘膜是通过对金属和硅的混合物进行氮化处理而形成的高相对介电常数（高k）膜。 High-K膜本身成为氮化物，以防止形成SiO 2。