摘要:
A liquid crystal display according to an exemplary embodiment of the present invention includes: a pixel electrode including a first subpixel electrode and a second subpixel electrode with a gap therebetween; a common electrode facing the pixel electrode; and a liquid crystal layer formed between the pixel electrode and the common electrode, and including a plurality of liquid crystal molecules, wherein the first and second subpixel electrodes include a plurality of minute branches, the first and second subpixel electrodes include a plurality of subregions having different length directions of the minute branches, and the width of the minute branches is wider than an interval between the neighboring minute branches.
摘要:
A liquid crystal display capable of reducing the stray capacitance of a non-display region and a method of manufacturing the same. The liquid crystal display includes a first substrate, gate lines and data lines intersecting each other on the first substrate to define pixels, a second substrate arranged opposite to the first substrate, a common electrode formed in a display area of the second substrate in which an image is displayed, and a floating electrode formed in a non-display region of the second substrate in which no image is displayed.
摘要:
Contamination is blocked from material of a color filter layer provided on a thin-film transistors (TFT) supporting substrate by sealing over the color filter layer with an inorganic insulating layer. During mass production manufacture, a plasma surface cleaning step is employed after the color filter layer is deposited but before the inorganic insulating layer is deposited. A low temperature CVD process is used to deposit the inorganic insulating layer with a substantially uniform thickness conformably over the color filter layer including conformably into openings provided through the color filter layer.
摘要:
A liquid crystal display includes a first insulating substrate including a display area and a peripheral area, a display area signal line in the display area of the first insulating substrate. a peripheral area signal line in the peripheral area of the first insulating substrate, a driving circuit portion in the peripheral area of the first insulating substrate, receiving an input signal through the peripheral area signal line, and thereby generating an output signal to supply to the display area signal line, a second insulating substrate facing the first insulating substrate and having a common electrode, a liquid crystal layer interposed between the first insulating substrate and the second insulating substrate, and a first sealant disposed between the first insulating substrate and the second insulating substrate and sealing the liquid crystal layer, wherein the common electrode is disposed on a whole surface of the second insulating substrate, and the first sealant is closer to the display area than the peripheral area signal line.
摘要:
Contamination is blocked from material of a color filter layer provided on a thin-film transistors (TFT) supporting substrate by sealing over the color filter layer with an inorganic insulating layer. During mass production manufacture, a plasma surface cleaning step is employed after the color filter layer is deposited but before the inorganic insulating layer is deposited. A low temperature CVD process is used to deposit the inorganic insulating layer with a substantially uniform thickness conformably over the color filter layer including conformably into openings provided through the color filter layer.
摘要:
A first wiring is formed on an array substrate, such that the first wiring has a first protrusion. A second wiring is formed on a different layer from that of the first wiring, such that a portion of the second wiring overlaps with the first protrusion. A protection layer that covers the first and second wirings is formed, such that the protection layer has first and second contact holes that expose the first and second wirings, respectively. Then, a third wiring that electrically connects the first wiring to the second wiring through the first and second contact holes is formed. When electrical connection between the first and second wirings is abnormal, a laser beam is irradiated toward the first protrusion, so that the electrical connection may be repaired.
摘要:
Disclosed is a thin film transistor substrate and a system for inspecting the same. The thin film transistor substrate comprises gate wiring formed on an insulation substrate and including gate lines, and gate electrodes and gate pads connected to the gate lines; a gate insulation layer covering the gate wiring; a semiconductor layer formed over the gate insulation layer; data wiring formed over the gate insulation layer and including data pads; a protection layer covering the data wiring; auxiliary pads connected to the data pads through contact holes formed in the protection layer; and a pad auxiliary layer formed protruding a predetermined height under the data pads. The inspection system for determining whether a thin film transistor substrate is defective, in which the thin film transistor substrate comprises gate wiring including gate lines, gate electrodes and gate pads, and data wiring including source electrodes and drain electrodes, includes a probe pin for contacting the gate pads or data pads and transmitting a corresponding signal, wherein a contact tip at a distal end of the probe pin for contacting the gate pads or the data pads is rounded, and a radius of the rounded contact tip is 2 μm or less, or the rounded contact tip is coated with gold (Au).
摘要:
Disclosed is a simplified manufacturing method for liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on an insulating substrate. Next, a gate insulating layer covering the gate wire, a semiconductor layer, an ohmic contact layer, and a data conductive layer are sequentially deposited, and a photoresist pattern is formed on the data conductive layer. Following this step, the data conductive layer, using the photoresist pattern as an etch mask, is etched to form a data wire including a data line, a source electrode, a drain electrode, and a data pad. Next, the photoresist pattern is reflowed to cover the portion between the source electrode and the drain electrode, and a portion of the ohmic contact layer adjacent to a periphery of the data wire. Subsequently, portions of the ohmic contact layer and the semiconductor layer, which are not covered by the photoresist pattern, are etched, and the photoresist pattern is removed. Next, a portion of the ohmic contact layer, which is not covered by the data wire, is etched to expose a portion of the semiconductor layer between the source electrode and the drain electrode that is a channel portion of a thin film transistor. Finally, a protection layer, a pixel electrode, a redundant gate pad and a redundant data pad are formed.
摘要:
A thin film array panel is provided, which includes: a plurality of signal lines including contact parts for contact with an external device; a plurality of thin film transistors connected to the signal lines; an insulating layer formed on the signal lines and the thin film transistors; and a plurality of pixel electrodes formed on the insulating layer and connected to the thin film transistors, wherein the insulating layer includes a contact portion disposed on the contact parts of the signal lines and having a thickness smaller than other portions and the contact portion of the insulating layer includes an inclined portion having an inclination angle smaller than about 45 degrees.
摘要:
First, a conductive material of aluminum-based material is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode. A gate insulating layer is formed by depositing nitride silicon in the range of more than 300° C. for 5 minutes, and a semiconductor layer and an ohmic contact layer are sequentially formed. Next, a conductor layer of a metal such as Cr is deposited and patterned to form a data wire include a data line intersecting the gate line, a source electrode, a drain electrode and a data pad. Then, a passivation layer is deposited and patterned to form contact holes exposing the drain electrode, the gate pad and the data pad. Next, indium zinc oxide is deposited and patterned to form a pixel electrode, a redundant gate pad and a redundant data pad respectively connected to the drain electrode, the gate pad and the data pad.