公开(公告)号：US20120324307A1

公开(公告)日：2012-12-20

申请号：US13570050

申请日：2012-08-08

申请人： Jinfeng Liu ,  Hongwei Song

发明人： Jinfeng Liu ,  Hongwei Song

IPC分类号： G06F1/08 ,  G06F11/10

CPC分类号： G06F3/05 ,  H03M13/1102 ,  H03M13/15 ,  H03M13/1515 ,  H03M13/27 ,  H03M13/3905 ,  H03M13/41 ,  H03M13/47 ,  H03M13/63 ,  H03M13/6331

摘要： Various embodiments of the present invention provide systems and methods for data processing system. As one example, a data processing circuit is described that includes an analog to digital converter, an online timing loop, and an offline timing loop. The analog to digital converter receives an analog input and provides a first series of data samples Each bit of the first series of data samples corresponds to the analog input at a time controlled by an updated sampling clock. The online timing loop modifies the updated sampling clock based at least in part upon a processed version of the first series of data samples.

摘要翻译： 本发明的各种实施例提供了用于数据处理系统的系统和方法。 作为一个示例，描述了包括模数转换器，在线定时循环和离线定时循环的数据处理电路。 模数转换器接收模拟输入并提供第一系列数据样本第一系列数据采样的每一位对应于在更新的采样时钟控制的时间的模拟输入。 在线定时循环至少部分地基于第一系列数据样本的处理版本来修改更新的采样时钟。

公开(公告)号：US20120226958A1

公开(公告)日：2012-09-06

申请号：US13469746

申请日：2012-05-11

申请人： Weijun Tan ,  Shaohua Yang ,  Hongwei Song

发明人： Weijun Tan ,  Shaohua Yang ,  Hongwei Song

IPC分类号： H03M13/11 ,  G06F11/10

CPC分类号： H03M13/1128 ,  H03M13/17

摘要： The present invention is a device for detecting short burst errors. The device includes a first signal input, wherein the first signal input is configured to receive a first signal. The device includes a second signal input, wherein the second signal input is configured to receive a second signal. The device includes a logic gate, wherein the logic gat is operable for receiving the first signal vial the first signal input, receiving the second signal via the second signal input, and generating a logic output gate signal based on the received first signal and the second signal. Furthermore, the device includes a filter, wherein the filter is configured for receiving the logic output gate signal from the logic gate and generates a filter output signal based upon the received logic output gate signal, wherein the filter output signal is operable for flagging errors.

摘要翻译： 本发明是用于检测短脉冲串错误的装置。 该设备包括第一信号输入，其中第一信号输入被配置为接收第一信号。 该设备包括第二信号输入，其中第二信号输入被配置为接收第二信号。 该装置包括逻辑门，其中逻辑门可操作用于接收第一信号输入端，第一信号输入端经由第二信号输入端接收第二信号，并根据接收的第一信号和第二信号产生逻辑输出门信号 信号。 此外，该器件包括滤波器，其中滤波器被配置为从逻辑门接收逻辑输出门信号，并且基于接收的逻辑输出门信号产生滤波器输出信号，其中滤波器输出信号可用于标记误差。

公开(公告)号：US08255763B1

公开(公告)日：2012-08-28

申请号：US11937389

申请日：2007-11-08

申请人： Shaohua Yang ,  Zining Wu ,  Gregory Burd ,  Xueshi Yang ,  Hongwei Song ,  Nedeljko Varnica

发明人： Shaohua Yang ,  Zining Wu ,  Gregory Burd ,  Xueshi Yang ,  Hongwei Song ,  Nedeljko Varnica

IPC分类号： H03M13/00

CPC分类号： H03M13/2945 ,  H03M13/098 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/23 ,  H03M13/2909 ,  H03M13/2957 ,  H03M13/3746 ,  H04L1/0065

摘要： An error correction system includes an iterative code that employs an interleaved component code and an embedded parity component code. On the transmission side, input signals received at an input node are encoded based on the interleaved code, which encodes an interleaved version of the input data to produce a first set of codewords. A portion of the first set of codewords is divided into a plurality of symbols which are encoded based on the embedded parity code. On the receiving side, received data are detected to produce detected information and soft outputs. The detected information is decoded based on the embedded parity code to obtain decoded information. The decoded information is used with other soft information by an interleaved decoder to generate reliability metrics for biasing a subsequent decoding iteration.

摘要翻译： 纠错系统包括使用交织分量代码和嵌入奇偶校验分量代码的迭代代码。 在发送侧，在输入节点处接收的输入信号基于交织代码进行编码，该代码对输入数据的交织版本进行编码以产生第一组码字。 第一组码字的一部分被分成多个符号，这些符号是基于嵌入的奇偶校验码进行编码的。 在接收侧，检测接收到的数据以产生检测信息和软输出。 检测到的信息根据嵌入的奇偶校验码进行解码以获得解码的信息。 经解码的信息与交织的解码器的其他软信息一起使用以产生用于偏置随后的解码迭代的可靠性度量。

公开(公告)号：US08208213B2

公开(公告)日：2012-06-26

申请号：US12792555

申请日：2010-06-02

申请人： Jingfeng Liu ,  Hongwei Song

发明人： Jingfeng Liu ,  Hongwei Song

IPC分类号： G11B20/10

CPC分类号： G11B20/10009 ,  G11B20/10027 ,  G11B20/10462 ,  G11B2020/1287 ,  G11B2220/2516 ,  H03G1/0088

摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide data processing circuits that include a variable gain amplifier, a gain circuit, and hybrid gain feedback combination circuit. The variable gain amplifier is operable to apply a gain to a data input corresponding to a gain feedback value and providing an amplified output. The gain circuit is operable to calculate a first algorithm error component and a second algorithm error component based at least in part on the amplified output. The hybrid gain feedback combination circuit is operable combine the first algorithm error component and the second algorithm error component to yield the gain feedback value when the data input includes a synchronization pattern.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 例如，本发明的一些实施例提供包括可变增益放大器，增益电路和混合增益反馈组合电路的数据处理电路。 可变增益放大器可操作以将增益应用于对应于增益反馈值的数据输入并提供放大的输出。 增益电路可操作以至少部分地基于放大的输出来计算第一算法误差分量和第二算法误差分量。 当数据输入包括同步模式时，混合增益反馈组合电路可操作地组合第一算法误差分量和第二算法误差分量以产生增益反馈值。

公开(公告)号：US08090059B1

公开(公告)日：2012-01-03

申请号：US11799488

申请日：2007-05-01

申请人： Hongwei Song ,  Zining Wu ,  Shaohua Yang

发明人： Hongwei Song ,  Zining Wu ,  Shaohua Yang

IPC分类号： H03D1/00 ,  H04L27/06

CPC分类号： H04L1/0054 ,  G11B20/1803 ,  H03M13/3746 ,  H03M13/41 ,  H03M13/6343

摘要： A detector includes Viterbi detectors. A first Viterbi detector generates a preliminary decision signal. A second Viterbi detector generates a final decision signal based on an input data signal and the preliminary decision signal. The second Viterbi detector is arranged in series with the first Viterbi detector.

摘要翻译： 检测器包括维特比检测器。 第一维特比检测器产生初步判定信号。 第二维特比检测器基于输入数据信号和初步判定信号产生最终判定信号。 第二维特比检测器与第一维特比检测器串联布置。

公开(公告)号：US08054717B1

公开(公告)日：2011-11-08

申请号：US11907676

申请日：2007-10-16

申请人： Shaohua Yang ,  Hongwei Song ,  Zining Wu ,  Xueshi Yang ,  Hongxin Song

发明人： Shaohua Yang ,  Hongwei Song ,  Zining Wu ,  Xueshi Yang ,  Hongxin Song

IPC分类号： G11B15/52

CPC分类号： G11B20/10009 ,  G11B20/10046 ,  G11B20/10296 ,  G11B20/1816

摘要： A system and method are provided to detect defects in a data storage medium by sampling data read from the data storage medium. Time referenced samples of data read from the data storage medium are equalized to mediate the effects of channel noise and the equalized samples are decoded by a decoder, such as a Viterbi decoder. The decoded signal is then reconstructed through a reconstruction filter to approximate the equalized signal. The equalized data signal and the reconstructed data signal are then combined and compared in a bit-by-bit deconstruction scheme to determine, based on a variation between the signal elements, that a defect exists on the data storage medium. Additional action is then taken to mediate the effects of attempting to process corrupted data based on the defect by isolating the defective bit.

摘要翻译： 提供了一种系统和方法，用于通过对从数据存储介质读取的数据进行采样来检测数据存储介质中的缺陷。 将从数据存储介质读取的数据的时间参考样本相等以调解信道噪声的影响，并且均衡样本由诸如维特比解码器之类的解码器解码。 然后通过重建滤波器重建经解码的信号以近似均衡的信号。 然后将均衡的数据信号和重建的数据信号以逐位解构方案进行组合和比较，以基于信号元素之间的变化来确定数据存储介质上存在缺陷。 然后采取额外的行动来通过隔离有缺陷的位来调解基于缺陷来处理被破坏的数据的效果。

公开(公告)号：US08027378B1

公开(公告)日：2011-09-27

申请号：US11818079

申请日：2007-06-12

申请人： Shaohua Yang ,  Hongwei Song ,  Zining Wu

发明人： Shaohua Yang ,  Hongwei Song ,  Zining Wu

IPC分类号： H04B3/46 ,  H04B17/00 ,  H04Q1/20

CPC分类号： H04B3/46 ,  H04L1/0054 ,  H04L1/20

摘要： Methods, circuits, systems, and networks for detecting an amplitude drop in an incoming signal. The methods generally comprise sampling the incoming signal at regular intervals to produce a plurality of sample values, producing a plurality of drop flags in response to the plurality of sample values, and detecting the amplitude drop in response to at least two of the drop flags. The circuits generally comprise a sampling circuit configured to produce a sample signal in response to the incoming signal, a threshold circuit configured to receive the sample signal and to produce a drop flag signal in response to the sample signal, and a drop detection circuit configured to produce an amplitude drop signal in response to at least two values of the drop flag signal. The systems and networks generally comprise the present circuits and/or any circuit embodying the inventive concepts described herein. The present invention advantageously provides for detection of amplitude drops in an incoming signal, operating in the digital (rather than analog) domain. Embodiments of the present invention also reduce the incidence of “false positives” due to transient low amplitudes. Correct detection of amplitude drops can improve the accuracy of signal decoders.

摘要翻译： 用于检测输入信号中的幅度下降的方法，电路，系统和网络。 所述方法通常包括以规则的间隔对输入信号进行采样以产生多个采样值，响应于多个采样值产生多个下降标志，以及响应于至少两个下降标志来检测幅度下降。 电路通常包括采样电路，其被配置为响应于输入信号产生采样信号;阈值电路，被配置为接收采样信号并响应于采样信号产生降幅标志信号;以及丢弃检测电路，被配置为 响应于液滴标志信号的至少两个值产生幅度下降信号。 系统和网络通常包括本发明的电路和/或体现本文所描述的发明概念的任何电路。 本发明有利地提供了在数字（而不是模拟）域中操作的输入信号中的幅度下降的检测。 本发明的实施例还降低了由于瞬时低振幅引起的“假阳性”的发生率。 正确检测幅度可以提高信号解码器的精度。

公开(公告)号：US07965466B1

公开(公告)日：2011-06-21

申请号：US12121656

申请日：2008-05-15

申请人： Hongwei Song

发明人： Hongwei Song

IPC分类号： G11B5/035

CPC分类号： G11B20/10009 ,  G11B5/035 ,  G11B5/09 ,  G11B20/10046 ,  G11B20/10296 ,  G11B20/24 ,  G11B2220/2516 ,  G11B2220/2562

摘要： Systems, methods and devices for equalization include a first adaptive equalizer to process read data or write data to respectively produce equalized read data or write data; a first detector to detect the equalized read data or the equalized write data to respectively produce detected read data or detected write data; a first comparator to determine an adjustment input based on a comparison of the equalized read data to the detected read data, or the equalized write data to the detected write data; and a second adaptive equalizer to process refined equalized read data or refined equalized write data to respectively produce twice equalized read data or twice equalized write data. The refined equalized read data or the refined equalized write data is respectively produced based on (i) the equalized read data and the adjustment input or (ii) the equalized write data and the adjustment input.

摘要翻译： 用于均衡的系统，方法和装置包括：第一自适应均衡器，用于处理读取数据或写入数据以分别产生均衡的读取数据或写入数据; 第一检测器，用于检测均衡读取数据或均衡写入数据以分别产生检测到的读取数据或检测到的写入数据; 第一比较器，用于基于所述均衡读取数据与检测到的读取数据的比较或将所述均衡的写入数据与所述检测到的写入数据进行比较来确定调整输入; 以及第二自适应均衡器，用于处理精细均衡读数据或精细均衡写数据，以分别产生两次均衡的读数据或两次均衡的写数据。 基于（i）均衡读取数据和调整输入或（ii）均衡写入数据和调整输入分别产生精细均衡读取数据或精细均衡写入数据。

公开(公告)号：US20110103527A1

公开(公告)日：2011-05-05

申请号：US12609031

申请日：2009-10-30

申请人： Jingfeng Liu ,  Hongwei Song

发明人： Jingfeng Liu ,  Hongwei Song

IPC分类号： H04L27/06 ,  H04L7/00

CPC分类号： G11B20/10009 ,  G11B20/10037 ,  G11B20/10055 ,  G11B20/10222 ,  G11B20/10296 ,  G11B2220/2516 ,  H03L7/07 ,  H03L7/0807 ,  H03L7/0812 ,  H03L7/091 ,  H03M1/1255 ,  H04L7/0054

摘要： In one embodiment, a (hard-drive) read channel has a phase detector used in a timing recovery loop. The phase detector utilizes the sign bit and confidence value from a received log-likelihood ratio (LLR) signal to generate a mean value. The mean value is convolved with a partial response target to generate an estimated timing error signal. When implemented in a hard-drive read channel, the phase detector allows for timing recovery with lower loss-of-lock rates.

摘要翻译： 在一个实施例中，（硬盘驱动器）读通道具有在定时恢复循环中使用的相位检测器。 相位检测器利用来自接收到的对数似然比（LLR）信号的符号位和置信度值来产生平均值。 平均值与部分响应目标进行卷积以产生估计的定时误差信号。 当在硬盘驱动器读取通道中实现时，相位检测器允许以较低的锁定失效率进行定时恢复。

公开(公告)号：US07679853B2

公开(公告)日：2010-03-16

申请号：US11319319

申请日：2005-12-28

申请人： Hongwei Song ,  Weijun Tan

发明人： Hongwei Song ,  Weijun Tan

IPC分类号： G11B5/02

CPC分类号： G11B20/18 ,  G11B5/6076

摘要： In one embodiment, irregular electronic disturbance signals in a partial-response read channel are detected by a disturbance detector using state metrics generated by maximum-likelihood sequence detector. For example, a thermal asperity (TA) detector detects the occurrence of TAs in the read channel of perpendicularly recorded magnetic media by using the state metrics generated by a Viterbi detector. Changes in state metrics (e.g., magnitudes of the branch metrics of the trellis diagram) used by the Viterbi detector are tracked. If the magnitude of the rise of the path metric increases above a set threshold, then a TA is detected. Alternatively, or additionally, the rate of change of the magnitude of the path metrics is tracked. If the rate of change within a set time window is above a specified threshold, then a TA is detected.

摘要翻译： 在一个实施例中，部分响应读通道中的不规则电子干扰信号由使用由最大似然序列检测器产生的状态度量的扰动检测器检测。 例如，热绝缘（TA）检测器通过使用维特比检测器产生的状态度量来检测垂直记录的磁介质的读通道中的TA的出现。 跟踪由维特比检测器使用的状态度量（例如格子图的分支度量的大小）的变化。 如果路径度量的上升幅度增加到设定的阈值以上，则检测TA。 或者或另外，跟踪路径度量的幅度的变化率。 如果设定的时间窗内的变化率高于规定的阈值，则检测出TA。