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    IGBT with Reduced Feedback Capacitance
    71.
    发明申请
    IGBT with Reduced Feedback Capacitance 有权
    具有反馈电容降低的IGBT

    公开(公告)号：US20150091053A1

    公开(公告)日：2015-04-02

    申请号：US14041094

    申请日：2013-09-30

    Applicant: Infineon Technologies AG

    Inventor： Christian Philipp Sandow ,  Hans-Joachim Schulze ,  Johannes Georg Laven ,  Franz-Josef Niedernostheide ,  Frank Pfirsch ,  Hans-Peter Felsl

    IPC: H01L29/739

    CPC classification number: H01L29/1095 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0834 ,  H01L29/0847 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7397

    Abstract: An IGBT includes at least one first type transistor cell, including a base region, a first emitter region, a body region, and a second emitter region. The body region is arranged between the first emitter region and the base region. The base region is arranged between the body region and the second emitter region. The IGBT further includes a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a base electrode adjacent the base region and dielectrically insulated from the base region by a base electrode dielectric. The base region has a first base region section adjoining the base electrode dielectric and a second base region section arranged between the second emitter region and the first base region section. A doping concentration of the first base region section is higher than a doping concentration of the second base region section.

    Abstract translation: IGBT包括至少一个第一类型晶体管单元，其包括基极区，第一发射区，体区和第二发射极区。 体区布置在第一发射区和基区之间。 基部区域布置在主体区域和第二发射区域之间。 IGBT还包括与主体区域相邻并且通过栅极电介质与体区电介绝缘的栅电极和与基极区域相邻并且与基极区域由基极电介质介电绝缘的基极。 基极区域具有邻接基极电介质的第一基极区域和布置在第二发射极区域与第一基极区域之间的第二基极区域区域。 第一基极区域的掺杂浓度高于第二基极区域的掺杂浓度。

    Semiconductor Device
    72.
    发明申请
    Semiconductor Device 有权
    半导体器件

    公开(公告)号：US20140264432A1

    公开(公告)日：2014-09-18

    申请号：US13796287

    申请日：2013-03-12

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： Maria Cotorogea ,  Frank Wolter ,  Hans-Joachim Schulze ,  Franz-Josef Niedernostheide ,  Yvonne Gawlina-Schmidl

    IPC: H01L29/739

    CPC classification number: H01L29/7397 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/0623 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/7395 ,  H01L29/7813

    Abstract: A semiconductor device in a semiconductor substrate includes a first main surface and a transistor cell. The transistor cell includes a drift region of a first conductivity type, a body region of a second conductivity type between the drift region and the first main surface, an active trench in the first main surface extending to the drift region, a source region of the first conductivity in the body region adjacent to the active trench, and a body trench at the first main surface extending to the drift region and adjacent to the body region and the drift region. The active trench includes a gate insulating layer at sidewalls and a bottom side, and a gate conductive layer. The body trench includes a conductive layer and an insulating layer at sidewalls and a bottom side, and asymmetric to a perpendicular axis of the first main surface and the body trench center.

    Abstract translation: 半导体衬底中的半导体器件包括第一主表面和晶体管单元。 晶体管单元包括第一导电类型的漂移区域，漂移区域和第一主表面之间的第二导电类型的体区域，延伸到漂移区域的第一主表面中的有源沟槽，源极区域 在与主动沟槽相邻的主体区域中的第一导电性，以及在第一主表面处延伸到漂移区并且与身体区域和漂移区域相邻的主体沟槽。 有源沟槽包括在侧壁和底侧的栅极绝缘层和栅极导电层。 主体沟槽包括在侧壁和底侧的导电层和绝缘层，并且与第一主表面和体沟槽中心的垂直轴不对称。

    Actively tracking switching speed control and regulating switching speed of a power transistor during turn-on
    75.
    发明授权
    Actively tracking switching speed control and regulating switching speed of a power transistor during turn-on 有权

    公开(公告)号：US11444613B1

    公开(公告)日：2022-09-13

    申请号：US17372913

    申请日：2021-07-12

    Applicant: Infineon Technologies AG

    Inventor： Zheming Li ,  Mark-Matthias Bakran ,  Daniel Domes ,  Robert Maier ,  Franz-Josef Niedernostheide

    IPC: H03K17/04 ,  H03K17/042

    Abstract: A gate driver system includes a gate driver circuit coupled to a gate terminal of a transistor and configured to generate an on-current during a plurality of turn-on switching events to turn on the transistor, wherein the gate driver circuit includes a first driver configured to source a first portion of the on-current to the gate terminal to charge a first portion of the gate voltage and a second driver configured to, during a first boost interval, source a second portion of the on-current to the gate terminal to charge a second portion of the gate voltage; a measurement circuit configured to measure a transistor parameter indicative of an oscillation of a load current for a turn-on switching event; and a controller configured to receive the measured transistor parameter and regulate a length of the first boost interval based on the measured transistor parameter.

    VERTICAL POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
    76.
    发明申请
    VERTICAL POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD 有权

    公开(公告)号：US20220013625A1

    公开(公告)日：2022-01-13

    申请号：US17370179

    申请日：2021-07-08

    Applicant: Infineon Technologies AG

    Inventor： Hans-Joachim Schulze ,  Philipp Kohler-Redlich ,  Thomas Laska ,  Franz-Josef Niedernostheide ,  Vera van Treek

    IPC: H01L29/06 ,  H01L29/739 ,  H01L29/04 ,  H01L29/10 ,  H01L29/66 ,  H01L29/861

    Abstract: A vertical power semiconductor device is proposed. The vertical power semiconductor device includes a semiconductor body including a semiconductor substrate and a semiconductor layer on the semiconductor substrate. The semiconductor body has a first main surface and a second main surface opposite to the first main surface along a vertical direction. The vertical power semiconductor device further includes a drift region in the semiconductor body. A first part of the drift region is arranged in the semiconductor substrate. A second part of the drift region is arranged in the semiconductor layer. The vertical power semiconductor device further includes a field stop region arranged in the semiconductor substrate, wherein a doping concentration of the field stop region averaged along the vertical direction is larger than a doping concentration of the drift region averaged along the vertical direction.

    Power semiconductor transistor
    78.
    发明授权
    Power semiconductor transistor 有权

    公开(公告)号：US10665706B2

    公开(公告)日：2020-05-26

    申请号：US16424968

    申请日：2019-05-29

    Applicant: Infineon Technologies AG

    Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Christian Philipp Sandow

    IPC: H01L29/66 ,  H01L29/739 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/78

    Abstract: A power semiconductor transistor includes: a semiconductor body coupled to a load terminal; a drift region in the semiconductor body and having dopants of a first conductivity type; a first trench extending into the semiconductor body along a vertical direction and including a control electrode electrically insulated from the semiconductor body by an insulator; a second trench extending into the semiconductor body along the vertical direction; a mesa region arranged between the trenches and including a source region electrically connected to the load terminal and a channel region separating the source and drift regions; and a portion of a contiguous plateau region of a second conductivity type arranged in the semiconductor drift region and extending below the trenches and below the channel and source regions, the contiguous plateau region having a plurality of openings aligned below the channel region in a widthwise direction of the channel region.

    Power semiconductor transistor having fully depleted channel region
    79.
    发明授权
    Power semiconductor transistor having fully depleted channel region 有权

    公开(公告)号：US10326009B2

    公开(公告)日：2019-06-18

    申请号：US15854478

    申请日：2017-12-26

    Applicant: Infineon Technologies AG

    Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Christian Philipp Sandow

    IPC: H01L27/108 ,  H01L29/739 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

    Abstract: A power semiconductor transistor includes a trench extending into a semiconductor body along a vertical direction and having first and second trench sidewalls and a trench bottom, an electrode in the trench electrically insulated from the semiconductor body, drift and source regions of a first conductivity type, a semiconductor channel region of a second conductivity type laterally adjacent the first trench sidewall and separating the source and drift regions, and a guidance zone. The guidance zone includes a bar section of the second conductivity type extending along the second trench sidewall or along a sidewall of another trench in the vertical direction to a depth in the semiconductor body deeper than the trench bottom, and a plateau section of the second conductivity type adjoining the bar section and extending under the trench bottom towards the semiconductor channel region. The plateau section has at least one opening below the channel region.

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