公开(公告)号：US11848377B2

公开(公告)日：2023-12-19

申请号：US17307632

申请日：2021-05-04

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Hans-Joachim Schulze ,  Matteo Dainese ,  Elmar Falck ,  Franz-Josef Niedernostheide ,  Manfred Pfaffenlehner

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40

CPC classification number: H01L29/7811 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/402

Abstract: A semiconductor component includes a semiconductor body having opposing first surface and second surfaces, and a side surface surrounding the semiconductor body. The semiconductor component also includes an active region including a first semiconductor region of a first conductivity type, which is electrically contacted via the first surface, and a second semiconductor region of a second conductivity type, which is electrically contacted via the second surface. The semiconductor component further includes an edge termination region arranged in a lateral direction between the first semiconductor region of the active region and the side surface, and includes a first edge termination structure and a second edge termination structure. The second edge termination structure is arranged in the lateral direction between the first edge termination structure and the side surface and extends from the first surface in a vertical direction more deeply into the semiconductor body than the first edge termination structure.

公开(公告)号：US11595035B1

公开(公告)日：2023-02-28

申请号：US17458942

申请日：2021-08-27

Applicant: Infineon Technologies AG

Inventor： Zheming Li ,  Mark-Matthias Bakran ,  Daniel Domes ,  Robert Maier ,  Franz-Josef Niedernostheide

IPC: H03K17/04 ,  H03K17/042 ,  H03K5/24

Abstract: A method is provided for driving a half bridge circuit that includes a first transistor and a second transistor that are switched in a complementary manner. The method includes generating an off-current during a plurality of turn-off switching events to control a gate voltage of the second transistor; measuring a transistor parameter of the second transistor during a first turn-off switching event during which the second transistor is transitioned to an off state, wherein the transistor parameter is indicative of an oscillation at the first transistor during a corresponding turn-on switching event during which the first transistor is transitioned to an on state; and activating a portion of the off-current for the second turn-off switching event, including regulating an interval length of the second portion for the second turn-off switching event based on the measured transistor parameter measured during the first turn-off switching event.

公开(公告)号：US20220059650A1

公开(公告)日：2022-02-24

申请号：US17519737

申请日：2021-11-05

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Christian Philipp Sandow

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/739

Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, an active cell field in the body, and a plurality of first and second cells in the active cell field. Each cell is electrically connected to the first load terminal structure and to a drift region. Each first cell includes a mesa having a port region electrically connected to the first load terminal structure, and a channel region coupled to the drift region. Each second cell includes a mesa having a port region of the opposite conductivity type electrically connected to the first load terminal structure, and a channel region coupled to the drift region. Each mesa is spatially confined in a direction perpendicular to a direction of the load current within the respective mesa, by an insulation structure and has a total extension of less than 100 nm in the direction.

公开(公告)号：US11018249B2

公开(公告)日：2021-05-25

申请号：US16263244

申请日：2019-01-31

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Hans-Joachim Schulze ,  Matteo Dainese ,  Elmar Falck ,  Franz-Josef Niedernostheide ,  Manfred Pfaffenlehner

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40

Abstract: A semiconductor component includes a semiconductor body having opposing first surface and second surfaces, and a side surface surrounding the semiconductor body. The semiconductor component also includes an active region including a first semiconductor region of a first conductivity type, which is electrically contacted via the first surface, and a second semiconductor region of a second conductivity type, which is electrically contacted via the second surface. The semiconductor component further includes an edge termination region arranged in a lateral direction between the first semiconductor region of the active region and the side surface, and includes a first edge termination structure and a second edge termination structure. The second edge termination structure is arranged in the lateral direction between the first edge termination structure and the side surface and extends from the first surface in a vertical direction more deeply into the semiconductor body than the first edge termination structure.

公开(公告)号：US10580653B2

公开(公告)日：2020-03-03

申请号：US15348245

申请日：2016-11-10

Applicant: Infineon Technologies AG

Inventor： Franz-Josef Niedernostheide ,  Johannes Georg Laven ,  Hans-Joachim Schulze

IPC: H01L21/263 ,  H01L21/28 ,  H01L21/265 ,  H01L21/266 ,  H01L21/324

Abstract: A method of forming a semiconductor device includes irradiating a semiconductor body with particles. Dopant ions are implanted into the semiconductor body such that the dopant ions are configured to be activated as donors or acceptors. Thereafter, the semiconductor body is processed thermally.

公开(公告)号：US20190319123A1

公开(公告)日：2019-10-17

申请号：US16456895

申请日：2019-06-28

Applicant: Infineon Technologies AG

Inventor： Maria Cotorogea ,  Frank Wolter ,  Hans-Joachim Schulze ,  Franz-Josef Niedernostheide ,  Yvonne Gawlina-Schmidl

IPC: H01L29/739 ,  H01L29/40 ,  H01L29/06 ,  H01L29/10 ,  H01L29/08 ,  H01L29/78

Abstract: A semiconductor device is described in which a conductive channel is present along an active gate trench of the device when a gate potential is at an on-voltage, whereas no conductive channel is present along an inactive gate trench of the device for the same gate potential condition.

公开(公告)号：US20190165090A1

公开(公告)日：2019-05-30

申请号：US16202752

申请日：2018-11-28

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Franz-Josef Niedernostheide ,  Oana Julia Spulber ,  Stephan Voss

IPC: H01L29/06 ,  H01L21/265 ,  H01L21/324 ,  H01L29/10 ,  H01L29/66

Abstract: A method of manufacturing a device in a semiconductor body includes forming a first field stop zone portion of a first conductivity type and a drift zone of the first conductivity type on the first field stop zone portion. An average doping concentration of the drift zone is smaller than 80% of that of the first field stop zone portion. The semiconductor body is processed at a first surface and thinned by removing material from a second surface. A second field stop zone portion of the first conductivity type is formed by implanting protons at one or more energies through the second surface. A deepest end-of-range peak of the protons is set in the first field stop zone portion at a vertical distance to a transition between the drift zone and first field stop zone portion in a range from 3 μm to 60 μm. The semiconductor body is annealed.

公开(公告)号：US10177230B2

公开(公告)日：2019-01-08

申请号：US14730663

申请日：2015-06-04

Applicant: Infineon Technologies AG

Inventor： Stephan Voss ,  Franz-Josef Niedernostheide ,  Hans-Joachim Schulze

IPC: H01L29/36 ,  H01L29/10 ,  H01L29/15 ,  H01L29/861 ,  H01L29/08 ,  H01L29/739 ,  H01L29/161 ,  H01L29/165 ,  H01L29/167 ,  H01L29/74

Abstract: A semiconductor device includes a first semiconductor region including a first semiconductor material and a second semiconductor region adjoining the first semiconductor region, the second semiconductor region including a second semiconductor material different from the first semiconductor material. The semiconductor device further includes at least one of a drift zone and a base zone in the first semiconductor region, and at least one type of deep-level dopant in an emitter region of the second semiconductor region. The at least one type of deep-level dopant has a distance to the valence or conduction band of at least 100 meV.

公开(公告)号：US20180366464A1

公开(公告)日：2018-12-20

申请号：US16116463

申请日：2018-08-29

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Christian Philipp Sandow

IPC: H01L27/088 ,  H01L29/10 ,  H01L29/423 ,  H03K17/687 ,  H01L29/739 ,  H01L29/78 ,  H01L29/49

CPC classification number: H01L27/0883 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/1037 ,  H01L29/1045 ,  H01L29/405 ,  H01L29/4238 ,  H01L29/49 ,  H01L29/7391 ,  H01L29/7396 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7811 ,  H01L29/7813 ,  H03K17/687

Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, and first and second cells each configured for controlling a load current and electrically connected to the first load terminal structure and to a drift region. A first mesa in the first cell includes a port region electrically connected to the first load terminal structure, and a first channel region coupled to the drift region. A second mesa included in the second cell includes a port region electrically connected to the first load terminal structure, and a second channel region coupled to the drift region. The mesas are spatially confined in a direction perpendicular to a direction of the load current by an insulation structure, and have a total extension of less than 100 nm in that direction. The first channel region includes an inversion channel. The second channel region includes an accumulation channel.

公开(公告)号：US10134835B2

公开(公告)日：2018-11-20

申请号：US15634720

申请日：2017-06-27

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Frank Dieter Pfirsch ,  Christian Philipp Sandow

IPC: H03K3/00 ,  H01L29/06 ,  H01L29/10 ,  H01L29/739 ,  H01L29/78 ,  H03K17/567

Abstract: A power semiconductor device is disclosed. The device includes a semiconductor body coupled to a first load terminal structure and a second load terminal structure, a first cell and a second cell. A first mesa is included in the first cell, the first mesa including: a first port region and a first channel region. A second mesa included in the second cell, the second mesa including a second port region. A third cell is electrically connected to the second load terminal structure and electrically connected to a drift region. The third cell includes a third mesa comprising: a third port region, a third channel region, and a third control electrode.