公开(公告)号：US20240297067A1

公开(公告)日：2024-09-05

申请号：US18664656

申请日：2024-05-15

Applicant: Richtek Technology Corporation

Inventor： Kun-Huang Yu ,  Chien-Yu Chen ,  Ting-Wei Liao ,  Chih-Wen Hsiung ,  Chun-Lung Chang ,  Kuo-Chin Chiu ,  Wu-Te Weng ,  Chien-Wei Chiu ,  Yong-Zhong Hu ,  Ta-Yung Yang

IPC: H01L21/762 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78

CPC classification number: H01L21/7621 ,  H01L21/76221 ,  H01L21/76281 ,  H01L29/0653 ,  H01L29/42368 ,  H01L29/7816

Abstract: A high voltage device includes: a semiconductor layer, a well, a bulk region, a gate, a source, and a drain. The bulk region is formed in the semiconductor layer and contacts the well region along a channel direction. A portion of the bulk region is vertically below and in contact with the gate, to provide an inversion region of the high voltage device when the high voltage device is in conductive operation. A portion of the well lies between the bulk region and the drain, to separate the bulk region from the drain. A first concentration peak region of an impurities doping profile of the bulk region is vertically below and in contact with the source. A concentration of a second conductivity type impurities of the first concentration peak region is higher than that of other regions in the bulk region.

公开(公告)号：US12062570B2

公开(公告)日：2024-08-13

申请号：US17547829

申请日：2021-12-10

Applicant: Richtek Technology Corporation

Inventor： Kun-Huang Yu ,  Chien-Yu Chen ,  Ting-Wei Liao ,  Chih-Wen Hsiung ,  Chun-Lung Chang ,  Kuo-Chin Chiu ,  Wu-Te Weng ,  Chien-Wei Chiu ,  Yong-Zhong Hu ,  Ta-Yung Yang

IPC: H01L29/78 ,  H01L21/762 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L21/7621 ,  H01L21/76221 ,  H01L21/76281 ,  H01L29/0653 ,  H01L29/42368 ,  H01L29/7816

Abstract: A high voltage device includes: a semiconductor layer, a well, a bulk region, a gate, a source, and a drain. The bulk region is formed in the semiconductor layer and contacts the well region along a channel direction. A portion of the bulk region is vertically below and in contact with the gate, to provide an inversion region of the high voltage device when the high voltage device is in conductive operation. A portion of the well lies between the bulk region and the drain, to separate the bulk region from the drain. A first concentration peak region of an impurities doping profile of the bulk region is vertically below and in contact with the source. A concentration of a second conductivity type impurities of the first concentration peak region is higher than that of other regions in the bulk region.

公开(公告)号：US11955890B2

公开(公告)日：2024-04-09

申请号：US17567130

申请日：2022-01-02

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Ting-Wei Liao ,  Chien-Yu Chen ,  Kun-Huang Yu ,  Chien-Wei Chiu ,  Ta-Yung Yang

IPC: H02M1/38 ,  H02M1/00 ,  H02M1/08 ,  H02M3/158 ,  H03K17/06

CPC classification number: H02M3/158 ,  H02M1/0006 ,  H02M1/08 ,  H02M1/38 ,  H03K17/063 ,  H03K2217/0063 ,  H03K2217/0072

Abstract: A switching converter circuit for switching one end of an inductor therein between plural voltages according to a pulse width modulation (PWM) signal to convert an input voltage to an output voltage. The switching converter circuit has a driver circuit including a high side driver, a low side driver, a high side sensor circuit, and a low side sensor circuit. The high side sensor circuit is configured to sense a gate-source voltage of a high side metal oxide semiconductor field effect transistor (MOSFET), to generate a low side enable signal for enabling the low side driver to switch a low side MOSFET according to the PWM signal. The low side sensor circuit is configured to sense a gate-source voltage of a low side MOSFET, to generate a high side enable signal for enabling the high side driver to switch a high side MOSFET according to the PWM signal.

公开(公告)号：US20230361674A1

公开(公告)日：2023-11-09

申请号：US18300266

申请日：2023-04-13

Applicant: Richtek Technology Corporation

Inventor： Kuo-Chi Liu ,  Ta-Yung Yang

IPC: H02M3/157 ,  H02M1/00 ,  H02M3/158

CPC classification number: H02M3/157 ,  H02M1/0009 ,  H02M3/158

Abstract: A switched capacitor voltage converter circuit includes: a switched capacitor converter and a control circuit. The switched capacitor converter includes at least one resonant capacitor, switches and at least one inductor. The control circuit generates a pulse width modulation (PWM) signal according to a first voltage or a second voltage and generates a control signal according to the PWM signal and a zero current detection signal. The control signal controls the switched capacitor converter by operating the corresponding switches to switch electrical connection of the inductor, so as to convert the first voltage to the second voltage or convert the second voltage to the first voltage.

公开(公告)号：US11742751B2

公开(公告)日：2023-08-29

申请号：US17499252

申请日：2021-10-12

Applicant: Richtek Technology Corporation

Inventor： Kuo-Chi Liu ,  Ta-Yung Yang ,  Chung-Lung Pai

IPC: H02M3/158 ,  H02M3/00 ,  H02M1/00 ,  H02M1/08 ,  H02M3/07

CPC classification number: H02M3/01 ,  H02M1/0009 ,  H02M1/08 ,  H02M3/07 ,  H02M3/1584 ,  H02M3/1586

Abstract: A resonant switching power converter includes: a first power stage circuit; a second power stage circuit; a controller; and a current sensing circuit configured to sense a first charging/discharging resonant current flowing through a first charging/discharging inductor of the first power stage circuit and sense a second charging/discharging resonant current flowing through a second charging/discharging inductor of the second power stage circuit, to generate a corresponding first current sensing signal and a corresponding second current sensing signal, respectively. The controller adjusts at least one of a first delay interval, a second delay interval, a third delay interval, a fourth delay interval, and/or input voltages, according to a first current sensing signal and a second current sensing signal, so that a constant ratio between an output current of the first power stage circuit and an output current of the second power stage circuit is achieved.

公开(公告)号：US20230197730A1

公开(公告)日：2023-06-22

申请号：US18052062

申请日：2022-11-02

Applicant: Richtek Technology Corporation

Inventor： Wu-Te Weng ,  Chih-Wen Hsiung ,  Ta-Yung Yang

IPC: H01L27/092 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/66

CPC classification number: H01L27/0928 ,  H01L29/7816 ,  H01L21/823878 ,  H01L29/66681

Abstract: A high voltage complementary metal oxide semiconductor (CMOS) device includes: a semiconductor layer, plural insulation regions, a first N-type high voltage well and a second N-type high voltage well, which are formed by one same ion implantation process, a first P-type high voltage well and a second P-type high voltage well, which are formed by one same ion implantation process, a first drift oxide region and a second oxide region, which are formed by one same etching process by etching a drift oxide layer; a first gate and a second gate, which are formed by one same etching process by etching a polysilicon layer, an N-type source and an N-type drain, and a P-type source and a P-type drain.

公开(公告)号：US11496063B2

公开(公告)日：2022-11-08

申请号：US17356767

申请日：2021-06-24

Applicant: Richtek Technology Corporation

Inventor： Yu-Chang Chen ,  Wei-Hsu Chang ,  Kun-Yu Lin ,  Ta-Yung Yang

IPC: H02M3/335 ,  H02M1/38 ,  H02M1/00 ,  H02M1/08

Abstract: A flyback converter includes a power transformer, a primary side switch, a secondary side switch and a controller. A secondary side switching signal has an SR pulse for achieving synchronous rectification, and a ZVS pulse for achieving zero voltage switching. The ZVS pulse is enabled according to a first characteristic of a resonance waveform, whereas, a primary side switching signal is enabled according to a second characteristic of resonance waveform. When an output current increases, the primary side switching signal is disabled during an inhibition interval, such that primary side switching signal does not overlap with the ZVS pulse, thereby preventing the primary and secondary side switches from being both conductive simultaneously. The inhibition interval is correlated with a rising edge of the primary side switching signal in a previous switching period and a resonance period of the resonance waveform.

公开(公告)号：US11489439B1

公开(公告)日：2022-11-01

申请号：US17468932

申请日：2021-09-08

Applicant: Richtek Technology Corporation

Inventor： Chien-Fu Tang ,  Tzu-Chen Lin ,  Ta-Yung Yang

IPC: H02M1/34 ,  H02M3/335 ,  H02M1/32 ,  H03K3/0233 ,  H02M1/00 ,  G05F1/575 ,  G05F3/18 ,  H02H9/04 ,  G01R19/165

Abstract: A spike suppression circuit includes a wide bandgap transistor, a first transistor, a clamping circuit, and a capacitor. The wide bandgap transistor is depletion-type. The first transistor is coupled in series with the wide bandgap transistor. The clamping circuit provides a voltage difference, and is coupled to a common node between the wide bandgap transistor and the first transistor. The capacitor provides a supply voltage for the clamping circuit. When the first transistor is turned off, the capacitor can recycle spike energy at the common node.

公开(公告)号：US20220329151A1

公开(公告)日：2022-10-13

申请号：US17716933

申请日：2022-04-08

Applicant: Richtek Technology Corporation

Inventor： Ta-Yung Yang ,  Yu-Chang Chen

IPC: H02M3/07 ,  H02M3/335 ,  H02M1/38

Abstract: A switched capacitor converter circuit includes: a conversion capacitor; an output capacitor; and switches configured to switch the coupling configurations of the conversion capacitor and the output capacitor according to a level of the first power supply voltage of the switched capacitor converter circuit, to generate the second power supply voltage at the output capacitor according to the first power supply voltage. The second power supply voltage provides power to control the power converter circuit. When the first power supply voltage is higher than a high threshold, the switched capacitor converter circuit controls the second power supply voltage to be lower than the first power supply voltage. When the first power supply voltage is lower than a low threshold, the switched capacitor converter circuit controls the second power supply voltage to be higher than the first power supply voltage.

公开(公告)号：US11451154B2

公开(公告)日：2022-09-20

申请号：US17334745

申请日：2021-05-30

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Kun-Yu Lin ,  Tzu-Chen Lin ,  Wei-Hsu Chang ,  Ta-Yung Yang

IPC: H02M3/335 ,  H02M1/38

Abstract: A flyback power converter circuit includes: a power transformer, a primary side switch and a conversion control circuit. In a DCM, during a dead time, the conversion control circuit calculates an upper limit frequency corresponding to output current according to a frequency upper limit function, and obtains a frequency upper limit masking period according to a reciprocal of the upper limit frequency, wherein the frequency upper limit masking period is a period starting from when the primary side switch is turned ON. During an upper limit selection period, the conversion control circuit selects a valley among one or more valleys in a ringing signal related to a voltage across the primary side switch as an upper limit locked valley, so that the conversion control circuit once again turns ON the primary side switch at a beginning time point of the upper limit locked valley.