公开(公告)号：US08358480B1

公开(公告)日：2013-01-22

申请号：US13176318

申请日：2011-07-05

申请人： Hongwei Song ,  Ke Han ,  Michael Madden ,  Zining Wu

发明人： Hongwei Song ,  Ke Han ,  Michael Madden ,  Zining Wu

IPC分类号： G11B5/09

CPC分类号： G11B20/18 ,  G11B20/10009 ,  G11B20/10222 ,  G11B20/1037 ,  G11B20/10462 ,  G11B20/10509 ,  G11B2220/2516

摘要： A system for identifying and compensating for non-linear transition shift in a magnetic medium data storage device is disclosed. The non-linear transition shift compensation system includes a non-linear transition shift estimation module adapted to generate non-linear transition shift estimates for specific bit patterns. The system further includes a pre-compensation module adapted to adjust the temporal spacing of binary transitions written to the magnetic medium based on the non-linear transition shift estimates generated by the non-linear transition shift estimation module for specific bit patterns corresponding to bit patterns appearing in the data being written to the magnetic medium.

摘要翻译： 公开了一种用于识别和补偿磁介质数据存储装置中的非线性跃迁的系统。 非线性跃迁偏移补偿系统包括适于产生特定比特模式的非线性跃迁偏移估计的非线性跃迁偏移估计模块。 该系统还包括预补偿模块，其适于基于由非线性跃迁偏移估计模块针对与位模式对应的特定比特模式生成的非线性跃迁移位估计来调整写入到磁介质的二进制转换的时间间隔 出现在写入磁介质的数据中。

公开(公告)号：US08345373B2

公开(公告)日：2013-01-01

申请号：US12856782

申请日：2010-08-16

申请人： George Mathew ,  Yuan Xing Lee ,  Hongwei Song

发明人： George Mathew ,  Yuan Xing Lee ,  Hongwei Song

IPC分类号： G11B5/09 ,  G11B5/00 ,  G11B21/02

CPC分类号： G11B5/6029

摘要： Various embodiments of the present invention provide systems and methods for phase offset based spectral aliasing compensation. For example, a circuit for spectral aliasing reduction is disclosed that includes a phase shift circuit operable to phase shift an analog input signal and to provide a phase shifted analog signal; a first analog to digital converter circuit operable to provide a first series of digital samples corresponding to the analog input signal at a sampling frequency; a second analog to digital converter circuit operable to provide a second series of digital samples corresponding to the phase shifted analog signal at the sampling frequency; and an averaging circuit operable to average the first series of digital samples with the second series of digital samples to yield an average output.

摘要翻译： 本发明的各种实施例提供了基于相位偏移的光谱混叠补偿的系统和方法。 例如，公开了一种用于频谱混叠减小的电路，其包括可移相模拟输入信号并提供相移模拟信号的相移电路; 第一模数转换器电路，其可操作来以采样频率提供对应于模拟输入信号的第一系列数字采样; 第二模数转换器电路，其可操作以提供对应于采样频率的相移模拟信号的第二系列数字采样; 以及平均电路，其可操作以用第二系列数字样本来平均第一系列数字样本以产生平均输出。

公开(公告)号：US20120324307A1

公开(公告)日：2012-12-20

申请号：US13570050

申请日：2012-08-08

申请人： Jinfeng Liu ,  Hongwei Song

发明人： Jinfeng Liu ,  Hongwei Song

IPC分类号： G06F1/08 ,  G06F11/10

CPC分类号： G06F3/05 ,  H03M13/1102 ,  H03M13/15 ,  H03M13/1515 ,  H03M13/27 ,  H03M13/3905 ,  H03M13/41 ,  H03M13/47 ,  H03M13/63 ,  H03M13/6331

摘要： Various embodiments of the present invention provide systems and methods for data processing system. As one example, a data processing circuit is described that includes an analog to digital converter, an online timing loop, and an offline timing loop. The analog to digital converter receives an analog input and provides a first series of data samples Each bit of the first series of data samples corresponds to the analog input at a time controlled by an updated sampling clock. The online timing loop modifies the updated sampling clock based at least in part upon a processed version of the first series of data samples.

摘要翻译： 本发明的各种实施例提供了用于数据处理系统的系统和方法。 作为一个示例，描述了包括模数转换器，在线定时循环和离线定时循环的数据处理电路。 模数转换器接收模拟输入并提供第一系列数据样本第一系列数据采样的每一位对应于在更新的采样时钟控制的时间的模拟输入。 在线定时循环至少部分地基于第一系列数据样本的处理版本来修改更新的采样时钟。

公开(公告)号：US08255763B1

公开(公告)日：2012-08-28

申请号：US11937389

申请日：2007-11-08

申请人： Shaohua Yang ,  Zining Wu ,  Gregory Burd ,  Xueshi Yang ,  Hongwei Song ,  Nedeljko Varnica

发明人： Shaohua Yang ,  Zining Wu ,  Gregory Burd ,  Xueshi Yang ,  Hongwei Song ,  Nedeljko Varnica

IPC分类号： H03M13/00

CPC分类号： H03M13/2945 ,  H03M13/098 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/23 ,  H03M13/2909 ,  H03M13/2957 ,  H03M13/3746 ,  H04L1/0065

摘要： An error correction system includes an iterative code that employs an interleaved component code and an embedded parity component code. On the transmission side, input signals received at an input node are encoded based on the interleaved code, which encodes an interleaved version of the input data to produce a first set of codewords. A portion of the first set of codewords is divided into a plurality of symbols which are encoded based on the embedded parity code. On the receiving side, received data are detected to produce detected information and soft outputs. The detected information is decoded based on the embedded parity code to obtain decoded information. The decoded information is used with other soft information by an interleaved decoder to generate reliability metrics for biasing a subsequent decoding iteration.

摘要翻译： 纠错系统包括使用交织分量代码和嵌入奇偶校验分量代码的迭代代码。 在发送侧，在输入节点处接收的输入信号基于交织代码进行编码，该代码对输入数据的交织版本进行编码以产生第一组码字。 第一组码字的一部分被分成多个符号，这些符号是基于嵌入的奇偶校验码进行编码的。 在接收侧，检测接收到的数据以产生检测信息和软输出。 检测到的信息根据嵌入的奇偶校验码进行解码以获得解码的信息。 经解码的信息与交织的解码器的其他软信息一起使用以产生用于偏置随后的解码迭代的可靠性度量。

公开(公告)号：US08208213B2

公开(公告)日：2012-06-26

申请号：US12792555

申请日：2010-06-02

申请人： Jingfeng Liu ,  Hongwei Song

发明人： Jingfeng Liu ,  Hongwei Song

IPC分类号： G11B20/10

CPC分类号： G11B20/10009 ,  G11B20/10027 ,  G11B20/10462 ,  G11B2020/1287 ,  G11B2220/2516 ,  H03G1/0088

摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide data processing circuits that include a variable gain amplifier, a gain circuit, and hybrid gain feedback combination circuit. The variable gain amplifier is operable to apply a gain to a data input corresponding to a gain feedback value and providing an amplified output. The gain circuit is operable to calculate a first algorithm error component and a second algorithm error component based at least in part on the amplified output. The hybrid gain feedback combination circuit is operable combine the first algorithm error component and the second algorithm error component to yield the gain feedback value when the data input includes a synchronization pattern.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 例如，本发明的一些实施例提供包括可变增益放大器，增益电路和混合增益反馈组合电路的数据处理电路。 可变增益放大器可操作以将增益应用于对应于增益反馈值的数据输入并提供放大的输出。 增益电路可操作以至少部分地基于放大的输出来计算第一算法误差分量和第二算法误差分量。 当数据输入包括同步模式时，混合增益反馈组合电路可操作地组合第一算法误差分量和第二算法误差分量以产生增益反馈值。

公开(公告)号：US08139305B2

公开(公告)日：2012-03-20

申请号：US12558928

申请日：2009-09-14

申请人： George Mathew ,  Hongwei Song ,  Yuan Xing Lee

发明人： George Mathew ,  Hongwei Song ,  Yuan Xing Lee

IPC分类号： G11B5/35

CPC分类号： G11B20/10009 ,  G11B20/10027 ,  G11B20/10222 ,  G11B20/10435 ,  G11B20/1049 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for acquiring timing and/or gain information. For example, various embodiments of the present invention provide data processing circuits that include a sample splitting circuit, a first averaging circuit, a second averaging circuit and a parameter calculation circuit. The sample splitting circuit receives a data input that includes a series of samples that repeat periodically over at least a first phase and a second phase. The sample splitting circuit divides the series of samples into at least a first sub-stream corresponding to the first phase and a second sub-stream corresponding to the second phase. The first averaging circuit averages values from the first sub-stream to yield a first average, and the second averaging circuit averages values from the second sub-stream to yield a second average. The parameter calculation circuit calculates a parameter value based at least in part on the first average and the second average.

摘要翻译： 本发明的各种实施例提供了用于获取定时和/或增益信息的系统和方法。 例如，本发明的各种实施例提供了包括采样分离电路，第一平均电路，第二平均电路和参数计算电路的数据处理电路。 采样分离电路接收包括在至少第一阶段和第二阶段周期性地重复的一系列样本的数据输入。 样本分割电路将该系列样本划分成对应于第一相的至少第一子流和对应于第二相的第二子流。 第一平均电路平均来自第一子流的值以产生第一平均值，并且第二平均电路平均来自第二子流的值以产生第二平均值。 参数计算电路至少部分地基于第一平均值和第二平均值来计算参数值。

公开(公告)号：US20120056612A1

公开(公告)日：2012-03-08

申请号：US12875734

申请日：2010-09-03

申请人： George Mathew ,  Pradeep Padukone ,  Hongwei Song ,  Suharli Tedja

发明人： George Mathew ,  Pradeep Padukone ,  Hongwei Song ,  Suharli Tedja

IPC分类号： G01R25/00

CPC分类号： G11B5/6029

摘要： Various embodiments of the present invention provide systems and methods for phase compensated harmonic sensing. For example, a circuit for harmonics calculation is disclosed that includes a phase difference estimation circuit and a phase offset compensation circuit. The harmonic calculation circuit is operable to calculate a first harmonic based on a periodic data pattern and a second harmonic based on the periodic data pattern. The phase difference estimation circuit operable to calculate a phase difference between the first harmonic and the second harmonic. The phase offset compensation circuit operable to align the second harmonic with the first harmonic to yield an aligned harmonic.

摘要翻译： 本发明的各种实施例提供了用于相位补偿谐波感测的系统和方法。 例如，公开了一种用于谐波计算的电路，其包括相位差估计电路和相位偏移补偿电路。 谐波计算电路可操作以基于周期性数据模式和基于周期性数据模式的二次谐波计算第一谐波。 所述相位差估计电路可操作以计算所述一次谐波和所述第二谐波之间的相位差。 相位偏移补偿电路可操作以将二次谐波与第一谐波对准以产生对准的谐波。

公开(公告)号：US20120038998A1

公开(公告)日：2012-02-16

申请号：US12856782

申请日：2010-08-16

申请人： George Mathew ,  Yuan Xing Lee ,  Hongwei Song

发明人： George Mathew ,  Yuan Xing Lee ,  Hongwei Song

IPC分类号： G11B21/02 ,  G06G7/28

CPC分类号： G11B5/6029

摘要： Various embodiments of the present invention provide systems and methods for phase offset based spectral aliasing compensation. For example, a circuit for spectral aliasing reduction is disclosed that includes a phase shift circuit operable to phase shift an analog input signal and to provide a phase shifted analog signal; a first analog to digital converter circuit operable to provide a first series of digital samples corresponding to the analog input signal at a sampling frequency; a second analog to digital converter circuit operable to provide a second series of digital samples corresponding to the phase shifted analog signal at the sampling frequency; and an averaging circuit operable to average the first series of digital samples with the second series of digital samples to yield an average output.

摘要翻译： 本发明的各种实施例提供了基于相位偏移的光谱混叠补偿的系统和方法。 例如，公开了一种用于频谱混叠减小的电路，其包括可移相模拟输入信号并提供相移模拟信号的相移电路; 第一模数转换器电路，其可操作来以采样频率提供对应于模拟输入信号的第一系列数字采样; 第二模数转换器电路，其可操作以提供对应于采样频率的相移模拟信号的第二系列数字采样; 以及平均电路，其可操作以用第二系列数字样本来平均第一系列数字样本以产生平均输出。

公开(公告)号：US08090059B1

公开(公告)日：2012-01-03

申请号：US11799488

申请日：2007-05-01

申请人： Hongwei Song ,  Zining Wu ,  Shaohua Yang

发明人： Hongwei Song ,  Zining Wu ,  Shaohua Yang

IPC分类号： H03D1/00 ,  H04L27/06

CPC分类号： H04L1/0054 ,  G11B20/1803 ,  H03M13/3746 ,  H03M13/41 ,  H03M13/6343

摘要： A detector includes Viterbi detectors. A first Viterbi detector generates a preliminary decision signal. A second Viterbi detector generates a final decision signal based on an input data signal and the preliminary decision signal. The second Viterbi detector is arranged in series with the first Viterbi detector.

摘要翻译： 检测器包括维特比检测器。 第一维特比检测器产生初步判定信号。 第二维特比检测器基于输入数据信号和初步判定信号产生最终判定信号。 第二维特比检测器与第一维特比检测器串联布置。

公开(公告)号：US08054717B1

公开(公告)日：2011-11-08

申请号：US11907676

申请日：2007-10-16

申请人： Shaohua Yang ,  Hongwei Song ,  Zining Wu ,  Xueshi Yang ,  Hongxin Song

发明人： Shaohua Yang ,  Hongwei Song ,  Zining Wu ,  Xueshi Yang ,  Hongxin Song

IPC分类号： G11B15/52

CPC分类号： G11B20/10009 ,  G11B20/10046 ,  G11B20/10296 ,  G11B20/1816

摘要： A system and method are provided to detect defects in a data storage medium by sampling data read from the data storage medium. Time referenced samples of data read from the data storage medium are equalized to mediate the effects of channel noise and the equalized samples are decoded by a decoder, such as a Viterbi decoder. The decoded signal is then reconstructed through a reconstruction filter to approximate the equalized signal. The equalized data signal and the reconstructed data signal are then combined and compared in a bit-by-bit deconstruction scheme to determine, based on a variation between the signal elements, that a defect exists on the data storage medium. Additional action is then taken to mediate the effects of attempting to process corrupted data based on the defect by isolating the defective bit.

摘要翻译： 提供了一种系统和方法，用于通过对从数据存储介质读取的数据进行采样来检测数据存储介质中的缺陷。 将从数据存储介质读取的数据的时间参考样本相等以调解信道噪声的影响，并且均衡样本由诸如维特比解码器之类的解码器解码。 然后通过重建滤波器重建经解码的信号以近似均衡的信号。 然后将均衡的数据信号和重建的数据信号以逐位解构方案进行组合和比较，以基于信号元素之间的变化来确定数据存储介质上存在缺陷。 然后采取额外的行动来通过隔离有缺陷的位来调解基于缺陷来处理被破坏的数据的效果。