High order multi-path operational amplifier with reduced input referred offset
    72.
    发明授权
    High order multi-path operational amplifier with reduced input referred offset 有权
    高阶多径运算放大器,具有减少的输入参考偏移

    公开(公告)号:US06466091B1

    公开(公告)日:2002-10-15

    申请号:US09678160

    申请日:2000-10-02

    IPC分类号: H03F368

    摘要: Disclosed in this application is the placement of an additional integrator between the first stage integrator output and the input to the attenuator/low pass filter. This approach reduces the input referred offset by a factor equal to the gain of the additional integrator, and the offset of the additional integrator itself will be divided by the gain of the first-stage integrator.

    摘要翻译: 在本申请中公开了在第一级积分器输出和衰减器/低通滤波器的输入之间放置附加积分器。 该方法将输入参考偏移减少了等于附加积分器的增益的因子,并且附加积分器本身的偏移将除以第一级积分器的增益。

    Capacitively coupled references for isolated analog-to-digital converter systems
    73.
    发明授权
    Capacitively coupled references for isolated analog-to-digital converter systems 有权
    用于隔离的模拟 - 数字转换器系统的电容耦合参考

    公开(公告)号:US06445330B1

    公开(公告)日:2002-09-03

    申请号:US09834630

    申请日:2001-04-16

    IPC分类号: H03M112

    CPC分类号: H03M1/0827 H03M1/12

    摘要: The present invention provides an alternative to Prior Art isolation techniques by providing a capacitively coupled reference voltage and a capacitively coupled gain calibration. The isolation technique of the present invention is based upon the idea of a near unity gain capacitive divider. If the load or parasitic capacitance is Cload and the isolation capacitance is Ciso, then the gain between input and output can be calculated as Vout/Vin=(Ciso)/(Ciso+Cload), which will be nearly unity (i.e., 1) when Ciso>>Cload. In addition, if Ciso>>Cload, the gain will also be largely insensitive to variations in Ciso and Cload. For example, if Cin is 100 ppm of Ciso, then a 10% variation in Ciso or Cload results in only a 10 ppm variation in the voltage gain.

    摘要翻译: 本发明通过提供电容耦合参考电压和电容耦合增益校准来提供现有技术隔离技术的替代方案。 本发明的隔离技术基于近单位增益电容分压器的思想。 如果负载或寄生电容为C负载,隔离电容为Ciso,则输入和输出之间的增益可以计算为Vout / Vin =(Ciso)/(Ciso + Cload),这将几乎是一致的(即1) 当Ciso >> Cload。 另外,如果Ciso >> Cload,增益也将在很大程度上不敏感于Ciso和Cload的变化。 例如,如果Cin是Ciso的100ppm,则Ciso或Cload的10%变化导致电压增益只有10ppm的变化。

    Low power seismic device interface and system for capturing seismic signals
    75.
    发明授权
    Low power seismic device interface and system for capturing seismic signals 失效
    低功率地震装置接口和捕获地震信号的系统

    公开(公告)号:US06249236B1

    公开(公告)日:2001-06-19

    申请号:US09054544

    申请日:1998-04-03

    IPC分类号: H03M300

    摘要: A front end for capturing seismic signals uses a voltage doubling circuit and an analog to digital converter (ADC) having different power levels available during respective operational phases. Power available the ADC is controlled so that relatively high power is provided during one phase of operation, such as during an interval when slewing in a device is expected and relatively low power is provided during another phase. Increased power is provided by switching in parallel current mirrors when power demands are expected to be high, whether or not high power is actually needed in a particular interval. A large step size is selected for the ADC to reduce power consumption for a delta sigma modulator used in the ADC and feedback coefficients are optimized for low power by running at a higher oversampling rate than required by signal to quantization noise requirements.

    摘要翻译: 用于捕获地震信号的前端使用在相应的操作阶段期间具有不同功率电平的电压倍增电路和模数转换器(ADC)。 功率可用,ADC被控制,使得在一个操作阶段期间提供相对较高的功率,例如在期望设备中回转的间隔期间,并且在另一阶段期间提供相对较低的功率。 当功率需求预期为高时,不管是否在特定间隔内实际需要高功率,通过切换并联电流镜来提供功率。 ADC选择了大的步长以减少ADC中使用的ΔΣ调制器的功耗,并且通过以比信号对量化噪声要求所需的更高的过采样速率运行,针对低功率优化了反馈系数。