公开(公告)号：US20050042814A1

公开(公告)日：2005-02-24

申请号：US10501349

申请日：2003-01-15

Applicant: Takayuki Watanabe ,  Yoshihiko Shibata ,  Tsuyoshi Ujihara ,  Takashi Yoshida ,  Akihiko Oyama

Inventor： Takayuki Watanabe ,  Yoshihiko Shibata ,  Tsuyoshi Ujihara ,  Takashi Yoshida ,  Akihiko Oyama

IPC: G01R33/07 ,  H01L29/201 ,  H01L29/205 ,  H01L43/06 ,  H01L43/14 ,  H01L21/8238

CPC classification number: H01L29/201 ,  G01R33/07 ,  H01L29/205 ,  H01L43/065 ,  H01L43/14

Abstract: Hall device is provided by enabling stable provision of a quantum well compound semiconductor stacked structure. It has first and second compound semiconductor layers composed of Sb and at least two of five elements of Al, Ga, In, As and P, and an active layer composed of InxGa1-x,AsySb1-y (0.8≦x≦1.0, 0.8

Abstract translation: 通过实现稳定提供量子阱化合物半导体堆叠结构来提供霍尔器件。 它具有由Sb和Al，Ga，In，As和P的五个元素中的至少两个组成的第一和第二化合物半导体层，以及由In x Ga 1-x，AsySb 1-y（0.8 <= x <= 1.0 ，0.8

公开(公告)号：US20040207031A1

公开(公告)日：2004-10-21

申请号：US10413377

申请日：2003-04-15

Inventor： Dale F. Berndt ,  Andrzej Peczalski ,  Eric E. Vogt ,  William F. Witcraft

IPC: H01L027/14 ,  H01L029/04 ,  H01L031/036

CPC classification number: H01L27/1203 ,  H01L43/065

Abstract: A magnetic sensor device formed using SOI CMOS techniques includes a substrate, a silicon oxide layer and in some cases a plurality of gated regions. A first terminal is located between two innermost gated regions and supplies a supply voltage. A second and a third terminal, each of which is located between two adjacent gated regions other than the two innermost gated regions, output positive and negative Hall voltages. By appropriately controlling a bias voltage to the gated regions, small changes in a magnetic field induces larger currents in channel regions under the gated regions, which, in turn, results in detectable Hall voltages.

Abstract translation: 使用SOI CMOS技术形成的磁传感器装置包括衬底，氧化硅层，并且在一些情况下包括多个选通区域。 第一端子位于两个最内部门控区域之间并提供电源电压。 第二和第三端子，每个端子位于除两个最内部选通区域之外的两个相邻选通区域之间，输出正和负霍尔电压。 通过适当地控制选通区域的偏置电压，磁场的小的变化在选通区域的沟道区域中产生较大的电流，这又导致可检测的霍尔电压。

公开(公告)号：US20040135220A1

公开(公告)日：2004-07-15

申请号：US10745261

申请日：2003-12-23

Applicant: Sanken Electric Co., Ltd.

Inventor： Hirokazu Goto

IPC: H01L029/82

CPC classification number: H01L27/22 ,  G01R15/202 ,  H01L24/06 ,  H01L43/065 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A noise-proof, integrated semiconductor current detector is disclosed which has formed in a semiconductor substrate a Hall generator for providing a Hall voltage in proportion to the strength of a magnetic field applied, a control current supply circuit for delivering a control current to the Hall generator, and a Hall voltage output circuit for putting out the Hall voltage for detection or measurement. The Hall generator, control current supply circuit, and Hall voltage output circuit are all exposed at one of the pair of opposite major surfaces of the semiconductor substrate. A current-path conductor is attached to this one major surface of the substrate via insulating layers for carrying a current to be detected. A shielding layer of highly electroconductive material is interposed between the current-path conductor and the substrate for protecting all of the Hall generator, control current supply circuit, and Hall voltage output circuit from noise from the current-path conductor as well as from external disturbances.

Abstract translation: 公开了一种防噪声集成半导体电流检测器，其在半导体衬底中形成霍尔发生器，用于与施加的磁场的强度成比例地提供霍尔电压;控制电流供应电路，用于将控制电流传递到霍尔 发电机和霍尔电压输出电路，用于放出用于检测或测量的霍尔电压。 霍尔发生器，控制电流供应电路和霍尔电压输出电路都暴露在半导体衬底的一对相对的主表面之一处。 电流通道导体经由用于承载待检测电流的绝缘层附接到衬底的该一个主表面。 高导电性材料的屏蔽层介于电流通道导体和基板之间，用于保护霍尔发生器，控制电流供应电路和霍尔电压输出电路免受来自电流通道导体的噪声以及外部干扰 。

公开(公告)号：US20040070038A1

公开(公告)日：2004-04-15

申请号：US10602537

申请日：2003-06-23

Applicant: California Institute of Technology

Inventor： Hongxing Tang ,  Michael L. Roukes ,  Roland K. Kawakami ,  David D. Awschalom

IPC: H01L029/82

CPC classification number: H01L43/065 ,  G01R33/07

Abstract: Ferromagnetic semiconductor-based compositions, systems and methods that enable studies of the dynamics and magnetoresistance of individual magnetic domain walls, and which provide enhanced magnetic switching effects relative to metallic ferromagnets. Aspects of the present invention are enabled by recent studies of the Giant Planar Hall effect (GPHE), and in particular GPHE in (Ga,Mn)As-based devices. The GPHE generally originates from macro- and micromagnetic phenomena involving single domain reversals. The GPHE-induced resistance change in multiterminal, micron-scale structures patterned from (Ga,Mn)As can be as large as about 100null, four orders of magnitude greater than analogous effects previously observed in metallic ferromagnets. Accordingly, recent data provide sufficient resolution to enable real-time observations of the nucleation and field-induced propagation of individual magnetic domain walls within such monocrystalline devices. The magnitude of the GPHE is generally size-independent down to the submicron scale indicating that for applications involving nanostructures it is capable of sensitivity comparable to SQUID-based techniques.

Abstract translation: 基于铁磁性半导体的组合物，系统和方法，能够研究单个磁畴壁的动力学和磁阻，并且相对于金属铁磁体提供增强的磁切换效应。 本发明的方面可以通过最近对巨型平面霍尔效应（GPHE），特别是（Ga，Mn）As-based器件中的GPHE的研究来实现。 GPHE通常来自涉及单域反转的宏观和微电磁现象。 从（Ga，Mn）As图案化的多端，微米级结构中的GPHE引起的电阻变化可以高达约100Om，比先前在金属铁磁体中观察到的类似效应大四个数量级。 因此，最近的数据提供了足够的分辨率，以使得能够实时观察这些单晶器件内各个磁畴壁的成核和场诱导的传播。 GPHE的大小通常与尺寸无关，达到亚微米尺度，这表明对于涉及纳米结构的应用，它具有与基于SQUID的技术相当的灵敏度。

公开(公告)号：US06683448B1

公开(公告)日：2004-01-27

申请号：US09723440

申请日：2000-11-28

Applicant: Koji Ohtsuka

Inventor： Koji Ohtsuka

IPC: G01R3300

CPC classification number: H01L43/065 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A current detector having a Hall-effect device formed in a semiconductor substrate for giving an output voltage proportional to the magnitude of an electric current. Also included is a sheet-metal baseplate mechanically supporting the Hall-effect device. For handling a current of greater magnitude than heretofore, a U-shaped current path is defined in the baseplate as by cutting therein a J-shaped slit and a set of straight slits for bounding the opposite side edges of the path. The baseplate lies in sufficient proximity to the Hall-effect device to cause the same to develop a voltage indicative of the current magnitude on the current path.

Abstract translation: 一种电流检测器，具有形成在半导体衬底中的霍尔效应器件，用于给出与电流大小成比例的输出电压。 还包括机械支撑霍尔效应装置的金属板基板。 为了处理比迄今为止更大幅度的电流，在底板中限定了U形电流路径，因为在其中切割有J形狭缝和一组用于界定路径的相对侧边缘的直缝隙。 基板靠近霍尔效应装置，使其能够产生指示当前路径上的电流幅度的电压。

公开(公告)号：US06683359B2

公开(公告)日：2004-01-27

申请号：US10176002

申请日：2002-06-21

Applicant: Mark B. Johnson ,  Gary A. Prinz

Inventor： Mark B. Johnson ,  Gary A. Prinz

IPC: H01L2982

CPC classification number: H01L43/065 ,  G11C11/18

Abstract: A Hall effect device comprising: (a) an electrically-conductive layer or plate having a top surface: and (b) a ferromagnetic multilayer, where the conductive film or layer is composed of high mobility semiconductors. Also, a Hall effect device can be a device in which the Hall plate comprises an indium compound, germanium or mixtures thereof. The devices are useful for a variety of applications such as a memory element in a nonvolatile random access memory array (NRAM) and as a logic gate.

Abstract translation: 一种霍尔效应装置，包括：（a）具有顶表面的导电层或板;和（b）铁磁多层，其中所述导电膜或层由高迁移率半导体构成。 此外，霍尔效应器件可以是其中霍尔板包括铟化合物，锗或其混合物的器件。 这些设备对于诸如非易失性随机存取存储器阵列（NRAM）中的存储元件和逻辑门的各种应用是有用的。

公开(公告)号：US20030197235A1

公开(公告)日：2003-10-23

申请号：US10126664

申请日：2002-04-22

Inventor： Mark B. Johnson ,  Gary A. Prinz

IPC: H01L043/00 ,  H01L029/82 ,  H01L027/14 ,  H01L031/00

CPC classification number: H01L43/065

Abstract: A Hall effect device comprising: (a) an electrically-conductive layer or plate having a top surface; and (b) a ferromagnetic layer, where the conductive film or layer is composed of high mobility semiconductors. Also, a Hall effect device can have a ferromagnetic element that is a multilayer (e.g., a bilayer), and a device in which the Hall plate comprises an indium compound, germanium or mixtures thereof. The devices are useful for a variety of applications such as a memory element in a nonvolatile random access memory array (NRAM) and as a logic gate.

Abstract translation: 一种霍尔效应装置，包括：（a）具有顶表面的导电层或板; 和（b）铁磁层，其中导电膜或层由高迁移率半导体组成。 此外，霍尔效应器件可以具有多层（例如，双层）的铁磁元件，其中霍尔板包括铟化合物，锗或其混合物的器件。 这些设备对于诸如非易失性随机存取存储器阵列（NRAM）中的存储元件和逻辑门的各种应用是有用的。

公开(公告)号：US20030164530A1

公开(公告)日：2003-09-04

申请号：US10374656

申请日：2003-02-26

Applicant: Centre National de la Recherche Scientifique - CNRS, a corporation of France

Inventor： Jean-Louis Robert ,  Julien Pernot ,  Jean Camassel ,  Sylvie Contreras

IPC: H01L029/82 ,  H01L043/00

CPC classification number: G01R33/07 ,  H01L43/065

Abstract: A Hall effect sensor formed in a multilayer structure including a thin active layer deposited on a substrate, wherein the substrate is an insulating, semi-insulating or semiconductor material of type pnull or nnull, respectively, to electrically isolate the active layer of the substrate and wherein the active layer is a weakly doped semiconductor material of type nnull or pnull in an exhaustion regime.

Abstract translation: 一种霍尔效应传感器，其形成在包括沉积在基板上的薄有源层的多层结构中，其中所述基板分别是p型或n +型的绝缘半绝缘或半导体材料，以电隔离衬底的有源层 并且其中所述有源层是在耗尽状态下为n型或p-型的弱掺杂半导体材料。

公开(公告)号：US06388916B1

公开(公告)日：2002-05-14

申请号：US09532706

申请日：2000-03-22

Applicant: Mark B. Johnson

Inventor： Mark B. Johnson

IPC: G11C1100

CPC classification number: H01L29/66984 ,  G11B5/378 ,  G11C11/16 ,  G11C11/18 ,  G11C11/5607 ,  H01L43/065 ,  H03K19/18

Abstract: A hybrid memory device combines a ferromagnetic layer and a Hall Effect device. The ferromagnetic layer is magnetically coupled to a portion of a Hall plate, and when such plate is appropriately biased, a Hall Effect signal can be generated whose value is directly related to the magnetization state of the ferromagnetic layer. The magnetization state of the ferromagnetic layer can be set to correspond to different values of a data item to be stored in the hybrid memory device. The magnetization state is non-volatile, and a write circuit can be coupled to the ferromagnetic layer to reset or change the magnetization state to a different value. The memory device can also be fabricated to include an associated transistor (or other suitable switch) that functions as an isolation element to reduce cross-talk and as a selector for the output of the device when such is used in a memory array. This latter arrangement also permits a bias supply to be applied to each cell in the array, increasing the output signal level, and the signal to noise ratio. A high resistance element such as a resistor or diode can also be used as the isolation element depending on the particular application. In a preferred embodiment, the hybrid memory device and associated selector are combined and integrally fabricated using conventional semiconductor processing techniques to increase the integration density of memory arrays using such devices.

Abstract translation: 混合存储器件结合了铁磁层和霍尔效应器件。 铁磁层磁耦合到霍尔板的一部分，当这种板被适当地偏置时，可以产生其值与铁磁层的磁化状态直接相关的霍尔效应信号。 铁磁层的磁化状态可以被设置为对应于要存储在混合存储器件中的数据项的不同值。 磁化状态是非易失性的，并且写入电路可以耦合到铁磁层以将磁化状态重置或改变为不同的值。 存储器件还可以被制造成包括用作隔离元件的相关联的晶体管（或其他合适的开关），以减少串扰，并且当用于存储器阵列时用作输出器件的选择器。 后一种布置还允许将偏置电源施加到阵列中的每个单元，增加输出信号电平和信噪比。 根据具体应用，也可以使用诸如电阻器或二极管的高电阻元件作为隔离元件。 在优选实施例中，使用常规半导体处理技术将混合存储器件和相关选择器组合并整体制造，以增加使用这种器件的存储器阵列的集成密度。

公开(公告)号：US5883564A

公开(公告)日：1999-03-16

申请号：US710125

申请日：1996-09-11

Applicant: Dale Lee Partin

Inventor： Dale Lee Partin

IPC: G01R33/06 ,  H01L43/06 ,  H01L43/08 ,  H01L43/00

CPC classification number: H01L43/065 ,  G01R33/06 ,  H01L43/08

Abstract: A magnetic field sensor is described that has a 0.25-0.6 micrometer thick magnetically active layer of very high electron mobility that consists essentially of epitaxial indium antimonide. The indium antimonide layer is disposed on a 0.03-1.0 micrometer thick buffer layer of In.sub.1-x Al.sub.x Sb, where "x" is about 0.01-0.2, that is substantially lattice-matched to the indium antimonide active layer.

Abstract translation: 描述了一种磁场传感器，其具有基本上由外延铟锑化物组成的非常高的电子迁移率的0.25-0.6微米厚的磁性有源层。 锑化铟层设置在In1-xAlxSb的0.03-1.0微米厚的缓冲层上，其中“x”约为0.01-0.2，与铟锑化物活性层基本上晶格匹配。