公开(公告)号：US07956778B2

公开(公告)日：2011-06-07

申请号：US12656490

申请日：2010-02-01

Applicant: Tetsuhiro Koyama

Inventor： Tetsuhiro Koyama

IPC: H03M1/66

CPC classification number: H03M1/201 ,  H03M1/20 ,  H03M1/60

Abstract: There is provided an analog-to-digital converter capable of performing analog-to-digital conversion with good accuracy. The analog-to-digital converter in accordance with the present invention includes a dither generation circuit 11 which generates dither; an input polarity switching unit 1 which switches a polarity of an input signal; an integrator 2; an integrator output regulator circuit 5 which regulates an output voltage of the integrator 2; a window comparator 3; a control circuit 4 which uses the comparison result of the window comparator 3 to control the input polarity switching unit 1, the integrator output regulator circuit 5, and the window comparator 3 as well as to generate a digital signal. The dither generation circuit 11 generates dither in such a manner that a cycle in which the digital signal is read is an integral multiple of a dither cycle. Further, the dither generation circuit 11 generates dither in such a manner that the number of times the count value is generated in the first half of one cycle of the dither is different from the number of times the count value is generated in the second half cycle thereof.

Abstract translation: 提供了能够以高精度执行模数转换的模数转换器。 根据本发明的模拟 - 数字转换器包括产生抖动的抖动产生电路11; 输入极性切换单元1，其切换输入信号的极性; 积分器2; 积分器输出调节器电路5，其调节积分器2的输出电压; 窗口比较器3; 使用窗口比较器3的比较结果来控制输入极性切换单元1，积分器输出调节器电路5和窗口比较器3以及生成数字信号的控制电路4。 抖动产生电路11产生抖动，使得读取数字信号的周期是抖动周期的整数倍。 此外，抖动发生电路11产生抖动，使得在抖动的一个周期的前半部分中产生计数值的次数与在第二个半周期中产生计数值的次数不同 其中。

公开(公告)号：US07893861B2

公开(公告)日：2011-02-22

申请号：US12494496

申请日：2009-06-30

Applicant: John F. Bulzacchelli ,  Daniel J. Friedman ,  Shahrzad Naraghi ,  Sergey V. Rylov ,  Alexander V. Rylyakov ,  Zeynep Toprak-Deniz

Inventor： John F. Bulzacchelli ,  Daniel J. Friedman ,  Shahrzad Naraghi ,  Sergey V. Rylov ,  Alexander V. Rylyakov ,  Zeynep Toprak-Deniz

IPC: H03M1/50

CPC classification number: H03M1/20 ,  H03M1/1215 ,  H03M1/502

Abstract: Apparatus and methods are provided relating to time-to-digital based analog-to-digital converter. An apparatus includes a time-to-digital converter based analog-to-digital converter for generating a first signal and a second signal having a timing relationship between a rising edge of the first signal and a rising edge of the second signal based on a sampled input analog voltage level, and converting the timing relationship into a corresponding time-to-digital representation. The time-to-digital representation is obtained without any voltage comparison and current comparison.

Abstract translation: 提供了关于基于时间到数字的模数转换器的装置和方法。 一种装置包括：基于时间 - 数字转换器的模数转换器，用于产生第一信号;以及第二信号，其具有基于采样的第一信号的上升沿和第二信号的上升沿之间的定时关系 输入模拟电压电平，并将定时关系转换成相应的时间 - 数字表示。 在没有任何电压比较和电流比较的情况下获得时间到数字表示。

公开(公告)号：US07642943B1

公开(公告)日：2010-01-05

申请号：US11963314

申请日：2007-12-21

Applicant: Joseph Cetin ,  Jason Muriby ,  Matthew Sienko ,  Ibrahim Yayla

Inventor： Joseph Cetin ,  Jason Muriby ,  Matthew Sienko ,  Ibrahim Yayla

IPC: H03M1/12

CPC classification number: H03M1/007 ,  H03M1/162 ,  H03M1/20

Abstract: Disclosed are a circuit and a method for an analog-to-digital conversion with programmable resolution. The circuit includes a resistor ladder comprising a plurality of resistors coupled to a plurality of comparators; wherein the resistor ladder is further coupled to a switch logic circuit and a plurality of current sources; and wherein the switch logic circuit is configured to control an operation of a plurality of switches to alter conversion resolution of the ADC, and an error correction circuit coupled to the outputs of the plurality of comparators, wherein the ADC is configured to perform a first conversion step and a second conversion step, and wherein the ADC is configured to perform only the first conversion step when programmed for lower conversion accuracy and higher conversion speed.

Abstract translation: 公开了一种具有可编程分辨率的模数转换的电路和方法。 该电路包括一个电阻梯，包括耦合到多个比较器的多个电阻器; 其中所述电阻梯还进一步耦合到开关逻辑电路和多个电流源; 并且其中所述开关逻辑电路被配置为控制多个开关的操作以改变所述ADC的转换分辨率，以及耦合到所述多个比较器的输出的纠错电路，其中所述ADC被配置为执行第一转换 步骤和第二转换步骤，并且其中所述ADC被配置为仅当编程为较低转换精度和较高转换速度时才执行第一转换步骤。

公开(公告)号：US07233275B2

公开(公告)日：2007-06-19

申请号：US11280086

申请日：2005-11-16

Applicant: Devrim Y. Aksin ,  Mohammad A. Al-Shyoukh

Inventor： Devrim Y. Aksin ,  Mohammad A. Al-Shyoukh

IPC: H03M1/34

CPC classification number: H03K17/063 ,  H03K3/356113 ,  H03M1/129 ,  H03M1/20

Abstract: An analog-to-digital converter device capable of measuring inputs beyond a supply voltage including: an N bit analog-to-digital converter powered by a supply voltage and a reference voltage; a range resolution stage capable of receiving inputs at higher voltages than the supply voltage, providing an input to the analog-to-digital converter, and outputting a logic value of one for the N+1th bit in response to an input signal higher than the reference voltage; and a bootstrapped input multiplexer stage for connecting low voltage input signals directly to the analog-to-digital converter and for connecting input signals that can exceed the supply voltage to the range resolution stage.

Abstract translation: 一种能够测量超过电源电压的输入的模拟 - 数字转换器装置，包括：由电源电压和参考电压供电的N位模数转换器; 范围分辨率级，其能够以比电源电压更高的电压接收输入，向模数转换器提供输入，并且响应于高于所述模数转换器的输入信号，输出针对第N + 1位的逻辑值1 参考电压; 以及用于将低电压输入信号直接连接到模拟 - 数字转换器并用于将可以超过电源电压的输入信号连接到范围分辨率级的自举输入多路复用器级。

公开(公告)号：US07176742B2

公开(公告)日：2007-02-13

申请号：US11168035

申请日：2005-06-27

Applicant: Devrim Y. Aksin ,  Mohammad A. Al-Shyoukh

Inventor： Devrim Y. Aksin ,  Mohammad A. Al-Shyoukh

IPC: H03K17/16

CPC classification number: H03K17/063 ,  H03K3/356113 ,  H03M1/129 ,  H03M1/20

Abstract: A bootstrapping circuit capable of sampling inputs beyond a supply voltage which includes a bootstrapped switch coupled between an input node and an output node, a first transistor having a first end coupled to a control node of the bootstrapped switch, a first capacitor having a first end coupled to a second end of the first transistor, a second transistor coupled between the first end of the first transistor and a supply node, and having a control node coupled to a first clock signal node, a third transistor coupled between the second end of the first transistor and the supply node, a charge pump having an output coupled to a control node of the third transistor, a level shifter having an output coupled to a second end of the first capacitor, a fourth transistor cross-coupled with, the first transistor, a fifth transistor having a second end coupled to the first end of the fourth transistor, and having a control node coupled to the output of the level shifter, and a sixth transistor coupled between the first end of the fifth transistor and a common node and having a control node coupled to the first clock signal node.

Abstract translation: 一种自举电路，其能够对输入超过电源电压的输入进行采样，所述电源电压包括耦合在输入节点和输出节点之间的自举开关，第一晶体管具有耦合到所述自举开关的控制节点的第一端，第一电容器， 耦合到第一晶体管的第二端，耦合在第一晶体管的第一端和电源节点之间并具有耦合到第一时钟信号节点的控制节点的第二晶体管，耦合在第一晶体管的第二端之间的第三晶体管， 第一晶体管和供电节点，具有耦合到第三晶体管的控制节点的输出的电荷泵，具有耦合到第一电容器的第二端的输出的电平移位器，与第一晶体管交叉耦合的第四晶体管 ，第五晶体管，具有耦合到第四晶体管的第一端的第二端，并且具有耦合到电平移位器的输出的控制节点，以及第六晶体管 耦合在第五晶体管的第一端和公共节点之间，并且具有耦合到第一时钟信号节点的控制节点。

公开(公告)号：US20060092067A1

公开(公告)日：2006-05-04

申请号：US10904216

申请日：2004-10-29

Applicant: Don Liu

Inventor： Don Liu

IPC: H03M1/12

CPC classification number: H03M1/0863 ,  H03M1/20

Abstract: A front end circuit of a voltage regulator is provided. The front end circuit comprises an analog front end, a low-resolution analog-to-digital converter, and a reference voltage provider. The front end circuit emulates the performance of a high-resolution analog-to-digital converter by coupling the analog front end to the low-resolution analog-to-digital converter. The reference voltage provider provides two closely interrelated reference voltages which track each other. The digital design can remove narrow pulses easily. Therefore the front end circuit has a higher noise resistance, and costs much lower than the high-resolution analog-to-digital converter of the prior art.

Abstract translation: 提供电压调节器的前端电路。 前端电路包括模拟前端，低分辨率模数转换器和参考电压提供器。 前端电路通过将模拟前端耦合到低分辨率模数转换器来模拟高分辨率模拟 - 数字转换器的性能。 参考电压提供器提供了彼此跟踪的两个紧密相关的参考电压。 数字设计可以轻松消除窄脉冲。 因此，前端电路具有更高的抗噪声性能，并且成本远低于现有技术的高分辨率模数转换器。

公开(公告)号：US06590513B2

公开(公告)日：2003-07-08

申请号：US10141394

申请日：2002-05-08

Applicant: Philip S. Stetson ,  Teddy D. Thomas

Inventor： Philip S. Stetson ,  Teddy D. Thomas

IPC: H03M300

CPC classification number: H03M1/208 ,  H03M1/20

Abstract: A data acquisition system uses an analog-to-digital converter (ADC) that includes a prediction feedback element. Using the computing power of a digital signal processor, the system predicts the next sample of the target signal based on pre-defined rules and previous samples. This digital prediction is converted to an analog signal using a digital-to-analog converter (DAC). An analog error summer compares the predicted signal with the target signal and creates an error signal. The digital signal processor uses the prediction error to more accurately predict the next sample. A negative feedback loop is thus formed by this system to drive the prediction error toward zero. Operating on the relatively small error signal in the forward and feedback paths enhances the conversion performance and data transfer efficiency.

公开(公告)号：US20030011501A1

公开(公告)日：2003-01-16

申请号：US10241419

申请日：2002-09-10

Applicant: Micron Technology, Inc

Inventor： Vladimir Berezin

IPC: H03M001/12

CPC classification number: H03M1/20 ,  H03M1/46

Abstract: An A/D converter oversamples an image signal, and uses the oversampled information to obtain additional resolution.

Abstract translation: A / D转换器对图像信号进行过采样，并使用过采样信息获得额外的分辨率。

公开(公告)号：US5610943A

公开(公告)日：1997-03-11

申请号：US436928

申请日：1995-05-08

Applicant: Mitsuo Kakuishi ,  Tsuyoshi Ueshima

Inventor： Mitsuo Kakuishi ,  Tsuyoshi Ueshima

IPC: H03M1/12 ,  H03M1/20 ,  H04B14/02 ,  H03H17/02

CPC classification number: H03M1/20 ,  H03M1/1235

Abstract: The present invention provides a two-system A/D converter, which provides a digital output signal with a higher conversion precision than is achieved by a single-system A/D converter. Conversely, by using a two-system D/A converter with a lower conversion precision, the present invention provides an analog output signal with a higher conversion precision than is achieved by a single-system D/A converter. Further, a digital signal clock changing unit produces data by performing high sampling of the first digital data trains, and the second digital data is synchronized with a second clock through an interpolation processing based on the timing difference between the first and second clocks. A high-precision A/D and D/A converter apparatus is thus realized by using two pulse code modulation coder/decoders (PCM.CODECs) and one digital signal processor (DSP).

Abstract translation: 本发明提供了一种双系统A / D转换器，其提供比由单系统A / D转换器实现的更高的转换精度的数字输出信号。 相反，通过使用具有较低转换精度的双系数D / A转换器，本发明提供了一种比由单系统D / A转换器实现的转换精度更高的模拟输出信号。 此外，数字信号时钟改变单元通过执行第一数字数据列的高采样产生数据，并且通过基于第一和第二时钟之间的定时差的内插处理将第二数字数据与第二时钟同步。 因此，通过使用两个脉冲编码调制编码器/解码器（PCM.CODEC）和一个数字信号处理器（DSP）来实现高精度A / D和D / A转换器装置。

公开(公告)号：US4800364A

公开(公告)日：1989-01-24

申请号：US57686

申请日：1987-05-27

Applicant: David W. Mortara

Inventor： David W. Mortara

IPC: H03M1/00 ,  H03M1/46

CPC classification number: H03M1/0639 ,  H03M1/16 ,  H03M1/20 ,  H03M1/50

Abstract: An analog-to-digital converter (ADC) controlled in a manner to increase its precision. The signal to be digitized is one input to an analog signal summing means whose output is the input to the ADC. A stepped or dither voltage signal is applied to the other summing means input during each analog signal sampling period of the ADC. The dither voltage steps are equal to the voltage equivalent of one ADC count plus 1/N where N is the number of steps per ADC count chosen to obtain a desired degree of precision in the digital signals that are output by the ADC. The dither voltage step that is combined with the current analog signal sample in the summing means amounts to displacing the sample in steps within each count of the ADC. The ADC converts each combined signal during a sampling interval to a succession of binary digital values which are summed. The result of the summation is a binary number having a value that corresponds more precisely to the true value of the analog signal samples than would be the case if they were converted directly by the ADC.

Abstract translation: 以提高其精度的方式控制的模拟 - 数字转换器（ADC）。 要被数字化的信号是模拟信号求和装置的一个输入，其输出是ADC的输入。 在ADC的每个模拟信号采样周期期间，向另一求和装置输入阶跃或抖动电压信号。 抖动电压步长等于一个ADC计数加上1 / N的等效电压，其中N是为了在ADC输出的数字信号中获得所需的精度而选择的每个ADC计数的步数。 与求和装置中的当前模拟信号样本组合的抖动电压步长相当于在ADC的每个计数内逐步移位样本。 ADC将采样间隔期间的每个组合信号转换成相加的二进制数字值。 求和的结果是一个二进制数，其值比模拟信号样本的真实值更精确地对应，与直接由ADC直接转换的情况相反。