公开(公告)号：US20040263374A1

公开(公告)日：2004-12-30

申请号：US10826239

申请日：2004-04-16

Inventor： Donald T. Comer ,  Darren S. Korth

IPC: H03M001/12

CPC classification number: H03M1/206 ,  H03M1/365

Abstract: An apparatus and method for increasing the resolution of analog-to-digital conversion devices and systems is described. The described apparatus and method operate without significantly increasing the complexity or conversion time of conventional analog-to-digital conversion architectures. The improved resolution is accomplished by detecting the time-dependent response characteristics of comparators used within an analog-to-digital converter. The detected response characteristics, such as the response pattern or the response time, are used to estimate the overdrive voltage on the comparator of interest and to thereby provide additional bits to the analog-to-digital conversion process. In those applications where the response characteristics affect the settling characteristics of the converter output bits, additional resolution may be attained by detecting the settling characteristics, such as the settling pattern or settling time, of the converter output bits, particularly the least significant bit.

Abstract translation: 描述了用于增加模数转换装置和系统的分辨率的装置和方法。 所描述的装置和方法操作而不显着增加常规模数转换架构的复杂性或转换时间。 通过检测在模数转换器内使用的比较器的时间依赖性响应特性来实现改进的分辨率。 检测到的响应特性，例如响应模式或响应时间，用于估计感兴趣的比较器上的过驱动电压，从而为模数转换过程提供额外的位。 在响应特性影响转换器输出位的稳定特性的那些应用中，通过检测转换器输出位，特别是最低有效位的稳定特性，如稳定模式或建立时间，可以获得额外的分辨率。

公开(公告)号：US06831585B2

公开(公告)日：2004-12-14

申请号：US10684444

申请日：2003-10-15

Applicant: Jan Mulder ,  Christopher Michael Ward

Inventor： Jan Mulder ,  Christopher Michael Ward

IPC: H03M112

CPC classification number: H03K17/04106 ,  H03M1/0646 ,  H03M1/146 ,  H03M1/204 ,  H03M1/206 ,  H03M1/361 ,  H03M1/365

Abstract: An analog to digital converter includes a first amplifier array connected to taps from a reference ladder, a second amplifier array, wherein each amplifier in the first amplifier array is connected to only two amplifiers of the second amplifier array, a third amplifier array, wherein each amplifier in the second amplifier array is connected to only two amplifiers of the third amplifier array, and an encoder connected to outputs of the third amplifier array that converts the outputs to an N-bit digital signal.

Abstract translation: 模数转换器包括连接到参考梯形图的抽头的第一放大器阵列，第二放大器阵列，其中第一放大器阵列中的每个放大器仅连接到第二放大器阵列的两个放大器，第三放大器阵列，其中每个 第二放大器阵列中的放大器仅连接到第三放大器阵列的两个放大器，以及连接到第三放大器阵列的输出的编码器，其将输出转换为N位数字信号。

公开(公告)号：US06816091B1

公开(公告)日：2004-11-09

申请号：US10742007

申请日：2003-12-18

Applicant: Colin Chong Hin Chee

Inventor： Colin Chong Hin Chee

IPC: H03M122

CPC classification number: H03M1/206 ,  G01D5/36 ,  H03M1/303

Abstract: An interpolation circuit and method for interpolating first and second out-of-phase ramp signals are disclosed. The interpolation circuit generates fractional ramp signals from the ramp signals and utilizes four multiplexers and two comparators to compare selected ones of the ramp signals. The comparator outputs are used by a finite state machine to provide a next state for the interpolator from the current state and the comparator outputs. The signals selected by the multiplexers are determined by the current state generated by the finite state machine. The finite state machine also detects a startup condition and determines the correct current state from the comparator outputs when different ramp signals are applied to the comparators. The ramp signals can be generated from out-of-phase signals from an optical comparator. The interpolation circuit generates new out-of-phase signals having a larger number of states per cycle.

Abstract translation: 公开了用于内插第一和第二异相斜坡信号的内插电路和方法。 内插电路从斜坡信号产生分数斜坡信号，并利用四个多路复用器和两个比较器来比较所选择的斜坡信号。 比较器输出由有限状态机使用以从当前状态和比较器输出提供内插器的下一个状态。 由多路复用器选择的信号由有限状态机产生的当前状态确定。 有限状态机还检测启动条件，并且当比较器施加不同的斜坡信号时，从比较器输出确定正确的当前状态。 斜波信号可以由来自光学比较器的异相信号产生。 内插电路产生每个周期具有较大数量的状态的新的异相信号。

公开(公告)号：US20040145509A1

公开(公告)日：2004-07-29

申请号：US10687300

申请日：2003-10-15

Applicant: ESS Technology, Inc.

Inventor： Andrew Martin Mallinson

IPC: H03M001/36

CPC classification number: H03M1/0854 ,  H03M1/1235 ,  H03M1/144 ,  H03M1/206 ,  H03M1/367

Abstract: An analog-to-digital converter in which each of a plurality of comparators is, in a successive approximation manner, selectively enabled or disabled and the outputs from those comparators summed together to produce a digital signal therefrom. By weighting and mixing outputs of adjacent comparators in proportions calculated to provide an interpolated output of a virtual comparator between the actual comparators, many such virtual comparators can be created without the need for additional fixed hardware elements in the converter. By doing so, the converter is able to produce a digital output having n bits using only N actual hardware elements for comparing signals, where N

公开(公告)号：US20040080443A1

公开(公告)日：2004-04-29

申请号：US10684444

申请日：2003-10-15

Applicant: Broadcom Corporation

Inventor： Jan Mulder ,  Christopher Michael Ward

IPC: H03M001/34

CPC classification number: H03K17/04106 ,  H03M1/0646 ,  H03M1/146 ,  H03M1/204 ,  H03M1/206 ,  H03M1/361 ,  H03M1/365

Abstract: An analog to digital converter includes a first amplifier array connected to taps from a reference ladder, a second amplifier array, wherein each amplifier in the first amplifier array is connected to only two amplifiers of the second amplifier array, a third amplifier array, wherein each amplifier in the second amplifier array is connected to only two amplifiers of the third amplifier array, and an encoder connected to outputs of the third amplifier array that converts the outputs to an N-bit digital signal.

公开(公告)号：US06677874B1

公开(公告)日：2004-01-13

申请号：US10351267

申请日：2003-01-23

Applicant: Andrew Martin Mallinson

Inventor： Andrew Martin Mallinson

IPC: H03M100

CPC classification number: H03M1/0854 ,  H03M1/1235 ,  H03M1/144 ,  H03M1/206 ,  H03M1/367

Abstract: An analog-to-digital converter in which each of a plurality of comparators is, in a successive approximation manner, selectively enabled or disabled and the outputs from those comparators summed together to produce a digital signal therefrom. By weighting and mixing outputs of adjacent comparators in proportions calculated to provide an interpolated output of a virtual comparator between the actual comparators, many such virtual comparators can be created without the need for additional fixed hardware elements in the converter. By doing so, the converter is able to produce a digital output having n bits using only N actual hardware elements for comparing signals, where N

Abstract translation: 一种模数转换器，其中多个比较器中的每一个以逐次近似的方式被选择性地使能或禁止，并且来自这些比较器的输出相加在一起以产生数字信号。 通过对实际比较器之间的虚拟比较器的内插输出进行加权和混合来计算相邻比较器的输出，可以创建许多这样的虚拟比较器，而不需要在转换器中额外的固定硬件元件。 通过这样做，转换器能够使用仅N个实际硬件元件产生具有n位的数字输出，用于比较信号，其中N <2 -1。 转换器中的多个比较器中的每一个具有用于使能信号的输入，该使能信号可以被操纵以启用或禁用各个比较器并修改其输出。 一种使用这种转换器将模拟输入信号转换为数字信号的方法。

公开(公告)号：US06654508B1

公开(公告)日：2003-11-25

申请号：US09722183

申请日：2000-11-27

Applicant: Roger G. Markham

Inventor： Roger G. Markham

IPC: G06K900

CPC classification number: H03M1/206 ,  B41J19/202 ,  G01D5/24461 ,  H03M1/303 ,  H03M1/305

Abstract: The present invention provides a method for referencing the position of a moving component. The method includes generating a first signal in response to the relative movement between a first sensor and encoder strip having a repeating pattern of fiducial marks, the first signal including a plurality of transitions corresponding to the repeating pattern; generating a second signal in response to the relative movement of a second sensor and the encoder strip, the second signal including a plurality of transitions corresponding to the repeating pattern; estimating a position of the moving component based upon the transitions within the first sensor signal; and identifying a direction of movement of the moving component in response to the first and second signals.

Abstract translation: 本发明提供一种用于参考移动部件的位置的方法。 该方法包括响应于第一传感器和具有重复基准标记图案的编码器条之间的相对移动产生第一信号，第一信号包括对应于重复图案的多个转换; 响应于第二传感器和编码器条的相对运动产生第二信号，第二信号包括对应于重复图案的多个转换; 基于第一传感器信号内的转换来估计移动部件的位置; 以及响应于所述第一和第二信号识别所述移动部件的移动方向。

公开(公告)号：US06628224B1

公开(公告)日：2003-09-30

申请号：US10153709

申请日：2002-05-24

Applicant: Jan Mulder ,  Christopher Michael Ward

Inventor： Jan Mulder ,  Christopher Michael Ward

IPC: H03M112

CPC classification number: H03K17/04106 ,  H03M1/0646 ,  H03M1/146 ,  H03M1/204 ,  H03M1/206 ,  H03M1/361 ,  H03M1/365

Abstract: An analog to digital converter includes a first amplifier array connected to taps from a reference ladder, a second amplifier array, wherein each amplifier in the first amplifier array is connected to only two amplifiers of the second amplifier array, a third amplifier array, wherein each amplifier in the second amplifier array is connected to only two amplifiers of the third amplifier array, and an encoder connected to outputs of the third amplifier array that converts the outputs to an N-bit digital signal.

Abstract translation: 模数转换器包括连接到参考梯形图的抽头的第一放大器阵列，第二放大器阵列，其中第一放大器阵列中的每个放大器仅连接到第二放大器阵列的两个放大器，第三放大器阵列，其中每个 第二放大器阵列中的放大器仅连接到第三放大器阵列的两个放大器，以及连接到第三放大器阵列的输出的编码器，其将输出转换为N位数字信号。

公开(公告)号：US5945935A

公开(公告)日：1999-08-31

申请号：US974708

申请日：1997-11-19

Applicant: Keiichi Kusumoto ,  Akira Matsuzawa

Inventor： Keiichi Kusumoto ,  Akira Matsuzawa

IPC: H03M1/36

CPC classification number: H03M1/206 ,  H03M1/365 ,  H03M1/50

Abstract: The A/D converter realizes a high-rate and high-precision A/D conversion using amplifier circuits. Each amplifier circuit amplifies a difference between the voltage of an analog signal to be converted and a predetermined reference voltage. Each bank of holding circuits holds the output signals of an oscillator circuit, the levels of which signals are variable with the passage of time, when the output voltage of the associated amplifier circuit exceeds a predetermined value. The signals held in each said bank of holding circuits are output as a value representing the amplification time of the associated amplifier circuit. An operation means identifies a first amplifier circuit having a reference voltage higher than the analog signal voltage and a second amplifier circuit having a reference voltage lower than the analog signal voltage based on the values representing the amplification times, and determines a voltage, at a point interiorly dividing a difference between the reference voltages of the first and the second amplifier circuits by a ratio of the amplification time of the second amplifier circuit to the amplification time of the first amplifier circuit, as the analog signal voltage, thereby computing a digital value representing the analog signal.

Abstract translation: A / D转换器使用放大器电路实现高速率和高精度的A / D转换。 每个放大器电路放大要转换的模拟信号的电压与预定参考电压之间的差。 每个保持电路组保持振荡器电路的输出信号，当相关联的放大器电路的输出电压超过预定值时，其电平随着时间的推移而变化。 保持在每个保持电路组中的信号作为表示相关放大器电路的放大时间的值被输出。 操作装置识别具有高于模拟信号电压的参考电压的第一放大器电路和基于表示放大时间的值的具有低于模拟信号电压的参考电压的第二放大器电路，并且在一点上确定电压 以第二放大电路的放大时间与第一放大电路的放大时间的比值将第一和第二放大器电路的参考电压之间的差分内部划分为模拟信号电压，由此计算代表 模拟信号。

公开(公告)号：US5793202A

公开(公告)日：1998-08-11

申请号：US604828

申请日：1996-02-23

Applicant: Takeshi Ikemoto

Inventor： Takeshi Ikemoto

IPC: G01B7/00 ,  G01D5/20 ,  G01D5/244 ,  G01D5/245 ,  H03M1/20 ,  H03M1/30 ,  G01D5/243 ,  H03M1/64

CPC classification number: H03M1/206 ,  G01D5/2073 ,  G01D5/24404 ,  H03M1/303

Abstract: A position sensor is provided with a displacement signal output circuit 1 that amplifies an electromagnetically induced and detected current signal from a slider and converts the result to a rectangular wave signal; a phase difference detection circuit that compares the output signal from the displacement signal output circuit with a clock signal employed for producing the alternating current component from the scaler and detects the phase difference; and an interpolation pulse counter that determines digital displacement data from the phase difference detected at phase difference detection circuit using interpolation pulses. Further, an averaging circuit is provided at the output stage of this interpolation pulse counter which calculates and outputs an average value of a plurality of instances of digital displacement data successively calculated by the interpolation pulse counter.

Abstract translation: 位置传感器设置有位移信号输出电路1，其从滑块放大电磁感应和检测的电流信号，并将结果转换为矩形波信号; 相位差检测电路，将来自位移信号输出电路的输出信号与用于从定标器产生交流分量的时钟信号进行比较，检测相位差; 以及内插脉冲计数器，其使用内插脉冲从相位差检测电路检测到的相位差确定数字位移数据。 此外，在该内插脉冲计数器的输出级设置平均电路，其计算并输出由内插脉冲计数器连续计算的多个数字位移数据的平均值。