Abstract:
A circuit and a system that uses the circuit for connecting a plurality of input channels to a receiving device. The circuit includes a plurality of DMOS switches, each of which connects a respective one of the input channels to the receiving device in response to a respective control signal. The control signals are referenced to a ground signal. Each input channel includes a common mode voltage that is non-referenced to the ground signal. The circuit also includes a switch driver that generates the control signals such that the input channels are activated one at a time.
Abstract:
A locking/unlocking mechanism for a contactless gesture detection system of a device is described herein. The locking/unlocking mechanism can facilitate automatic locking, manual locking, and/or manual unlocking of the contactless gesture detection system. The contactless gesture detection system can implement the locking/unlocking mechanisms described herein to control a contactless gesture-based user interface state of the device. In various implementations, the controlling can include detecting gestures associated with a user in a contactless space associated with the device; detecting a defined gesture sequence over a defined time period from the detected gestures; and transitioning the device to a contactless gesture-based user interface locked state or a contactless gesture-based user interface unlocked state based on the defined gesture sequence.
Abstract:
A transmission system may include an oscillator, a serializer, and a driver. The oscillator may generate at least two clock signals. The serializer may modulate a plurality of data streams based upon the at least two clock signals and a plurality of channels of data. The driver may receive and combine the plurality of data streams into a single output data stream, wherein the single output data stream has a clock frequency higher than frequency of each of the at least two clock signals.
Abstract:
In one particular example, this disclosure provides an efficient mechanism to determine the degree of parallelization possible for a loop in the presence of possible memory aliases that cannot be resolved at compile-time. Hardware instructions are provided that test memory addresses at run-time and set a mode or register that enables a single instance of a loop to run the maximum number of SIMD (Single Instruction, Multiple Data) lanes to run in parallel that obey the semantics of the original scalar loop. Other hardware features that extend applicability or performance of such instructions are enumerated.
Abstract:
A flash ADC circuit may include a reference ladder providing reference signals and a plurality of comparators, each providing an output based on a comparison of a pair of input signals to a pair of reference signals. At least one pair of the comparators may receive the same pair of reference signals with a different orientation of the reference signals at each of the comparators. The flash ADC may include a switch network for swapping the pair of reference signals between the pair of comparators.
Abstract:
A multi-string DAC is described and comprises at least two DAC stages. Each DAC stage comprises a string of impedance elements and a switching network. In one configuration, the multi-string DAC is configured to use the voltage change at terminals of a first string separately to the voltage drop across a first switching network that couples the first and second strings to provide an analog output in response to a digital input to the DAC.
Abstract:
Apparatus and methods for current sensing in switching regulators are provided. In certain implementations, a switching regulator includes a switch transistor, a replica transistor, a sense resistor, and a current sensing circuit. The drain and gate of the switch transistor can be electrically connected to the drain and gate of the replica transistor, respectively. The current sensing circuit can generate an output current that varies in response to a sense current from a source of the replica transistor. Additionally, the current sensing circuit can sink the sense current when the sense current flows from the drain to the source of the replica transistor and source the sense current when the sense current flows from the source to the drain of the replica transistor. The sense resistor can receive the output current such that the voltage across the sense resistor changes in relation to the current through the switch transistor.
Abstract:
A low drop out voltage regulator comprising: a transistor having an input node, an output node, and a control node; a differential amplifier having an output connected to the control node of the transistor and having a first input node; and a feedback capacitor connected between the output node of the transistor and the first input of the differential amplifier, wherein a voltage at the output of the transistor is dependent on a charge across the feedback capacitor.
Abstract:
A MEMS sensor includes a micro-electromechanical structure, a detection circuit, and a self-test circuit to test the health of the MEMS sensor during runtime operations. The self-test circuit is configured to inject into the micro-electromechanical structure a plurality of injected test signals that are broad-band frequency-varying frequency signals, which are based on spread spectrum based modulation. The injected test signals may a magnitude that is below an observable threshold of the sensor signal as well as a test-signal bandwidth that overlaps with a substantial portion of the sensor bandwidth, including the stimulus of interest.
Abstract:
A system and method for removing noise from images are disclosed herein. An exemplary system includes an edge-detection-based adaptive filter that identifies edge pixels and non-edge pixels in an image and selects a filtering technique for at least one non-edge pixel based on a comparison of the at least one non-edge pixel to a neighboring pixel region, wherein such comparison indicates whether the at least one non-edge pixel is a result of low-light noise.