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公开(公告)号：US09973975B2
公开(公告)日：2018-05-15
申请号：US15727267
申请日：2017-10-06
申请人： Maxlinear, Inc.
发明人： Timothy Gallagher
摘要： Methods and systems for providing reduced bandwidth acquisition latency may comprise communicating a reservation request for bandwidth allocation for devices operating under a wired network protocol, where the reservation request may be sent by wired network devices via a wireless network protocol over a wireless network. Bandwidth may be allocated in the wired network for the requesting devices by a network controller. Data may be communicated with the requesting devices via the wired network. The wired network communication protocol may comprise a multimedia over cable alliance (MoCA) standard. The wireless protocol may comprise an IEEE 802.11x standard, a Bluetooth standard, and/or any non-public network protocol. The communication of the reservation request via the wireless protocol may decrease a latency of the wired network. A medium access plan (MAP) may be generated by the network controller based on the reservation request and may comprise a bandwidth allocation for the requesting devices.
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公开(公告)号：US09942598B2
公开(公告)日：2018-04-10
申请号：US14948907
申请日：2015-11-23
申请人： MaxLinear, Inc.
发明人： Madhukar Reddy , Curtis Ling , Tim Gallagher
IPC分类号： H04B1/16 , H04N21/426 , H04B1/00 , H04N5/50 , H04N21/438 , H04N21/454 , H04N21/61 , H04N5/455
CPC分类号： H04N21/4263 , H04B1/0014 , H04N5/455 , H04N5/50 , H04N21/4382 , H04N21/4383 , H04N21/454 , H04N21/6143 , H04N21/6193
摘要： A wideband receiver system comprises a mixer module, a wideband analog-to-digital converter (ADC) module, and digital circuitry. The mixer module is configured to downconvert a plurality of frequencies that comprises a plurality of desired television channels and a plurality of undesired television channels. The wideband ADC module is configured to digitize the swatch of frequencies comprising the plurality of desired television channels and the plurality of undesired television channels. The digital circuitry is configured to select the desired plurality of television channels from the digitized plurality of frequencies, and output the selected plurality of television channels to a demodulator as a digital datastream.
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公开(公告)号：US09923547B2
公开(公告)日：2018-03-20
申请号：US15236372
申请日：2016-08-12
申请人： Maxlinear, Inc.
CPC分类号： H03H11/30 , H03B1/00 , H03B5/00 , H03B5/1237 , H03B25/00 , H03B27/00 , H03B2200/0072
摘要： Methods and systems for a distributed transmission line multiplexer for a multi-core multi-mode voltage-controlled oscillator (VCO) may comprise a plurality of voltage controlled oscillators (VCOs) arranged adjacent to each other, where each of the plurality of VCOs are operable to generate an output signal at a configurable frequency, an impedance matching circuit comprising a respective driver and impedance matching elements coupled to each of the plurality of VCOs, and an output device coupled to the impedance matching circuit. The impedance matching elements may include capacitors and inductors. Between each adjacent pair of the respective drivers coupled to each of the plurality of VCOs, the impedance matching elements may include two inductors coupled in series between the drivers and a capacitor coupled to ground and to a common node between the two inductors. Impedance values of the capacitors and inductors may be configurable. The impedance matching elements may include a resistor coupled to a bias voltage VDD and to a common node with a capacitor that is coupled to ground, where the common node is coupled to one of the inductors. The output device may include a prescaler that is an integer or fractional frequency-N divider, or a buffer. The respective drivers coupled to each of the plurality of VCOs may be configured to provide a constant output power no matter which of said plurality of VCOs is enabled.
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公开(公告)号：US09916878B2
公开(公告)日：2018-03-13
申请号：US15459639
申请日：2017-03-15
申请人： MaxLinear, Inc.
发明人： Jian-Hung Lin
CPC分类号： G11C7/1012 , G11C7/1006 , G11C7/1057 , G11C7/1084 , G11C7/22 , H03M13/271 , H03M13/6561
摘要： Systems and methods are provided for parallel column twist interleaving. Parallel bit-interleaving with column twist may be applied to an input bitstream based on one or more interleaving parameters. Bits in the input bitstream may be read, in sets having size based on a first interleaving parameter, and may then be processed based on a second interleaving parameter. The processing may comprise applying a shift to a combination of bits that include a current bit set and additional bits corresponding to previously processed bit sets and/or pre-set bits. The shift may be determined based on a column twist associated with the current corresponding. Bits generated based on processing in current and/or previous cycles may be stored into memory, and bits may be read from the memory, based on a third interleaving parameter, for generating an output interleaved bitstream.
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公开(公告)号：US09912402B2
公开(公告)日：2018-03-06
申请号：US14245658
申请日：2014-04-04
申请人： MaxLinear, Inc.
发明人： Glenn Chang , Curtis Ling , Sridhar Ramesh
CPC分类号： H04B7/18523
摘要： A direct broadcast satellite (DBS) reception assembly may receive a desired satellite signal and process the desired satellite signal for output to a gateway. The DBS assembly may also receive one or more undesired satellite signals and determine a performance metric of the one or more undesired satellite signals. The elevation angle of the assembly and/or the azimuth angle of the assembly may be adjusted based on the performance metric(s) of the undesired satellite signal(s). The adjusting of the elevation angle and/or the azimuth angle may comprise electronically steering a directivity of a receive radiation pattern of the DBS reception assembly and/or mechanically steering one or more components of the assembly via motors, servos, actuators, MEMS, and/or the like. The performance metric may be received signal strength of the undesired signals, received signal strength of the desired signal, SNR of the desired signal, and/or SNR of the undesired signals.
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公开(公告)号：US09888294B2
公开(公告)日：2018-02-06
申请号：US14616397
申请日：2015-02-06
申请人： MaxLinear, Inc.
IPC分类号： H04N7/20 , H04N21/647 , H04N21/438 , H04N21/442 , H04N21/61
CPC分类号： H04N21/64738 , H04N21/438 , H04N21/44209 , H04N21/6143
摘要： A signal receiver may be configured to determine when signal generation adjustments directed to particular components of signals received by the signal receiver, cause performance changes relating to effects of the signal generation adjustments on other components of the received signals. Operations of the signal receiver may then be controlled based on the performance changes, to mitigate at least some of the effects on the one or more other components of the signals. The performance changes may comprise amplitude glitches, phase glitches, and/or bit or packet errors. The signal generation adjustments may comprise channel-to-frequency re-assignment. Controlling operations of the signal receiver may comprise adjusting such parameters as amplification gain and/or tracking loop bandwidth, and/or determining whether (or not) to ignore bit/packet errors.
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公开(公告)号：US09887767B2
公开(公告)日：2018-02-06
申请号：US14267706
申请日：2014-05-01
申请人： MaxLinear, Inc.
发明人： Curtis Ling
IPC分类号： H04B7/26
CPC分类号： H04B7/2606
摘要： Methods and systems are provided for hot-swappable hardware for communication links (e.g., wireless microwave links). A communication assembly that comprises processing circuitry may be configured to allow replacing a circuitry element during active operation of the communication assembly. The replacing may comprise configuring the communication assembly to communicate signals based on a first configuration, using the circuitry element being replaced; receiving addition of a replacement circuitry element; configuring the communication assembly to communicate signals based on a second configuration, using the replacement circuitry element; and after the communication assembly is fully configured to communicate signals based on the second configuration, removing the circuitry element being replaced.
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公开(公告)号：US09825694B2
公开(公告)日：2017-11-21
申请号：US15238877
申请日：2016-08-17
申请人： Maxlinear, Inc.
发明人： Timothy Gallagher , Curtis Ling
摘要： Aspects of methods and systems for transceiver array synchronization are provided. An array based communications system comprises a plurality of transceiver circuits and an array coordinator. Each transceiver circuit of the plurality of transceiver circuits comprises a plurality of wireless transmitters and a local oscillator generator. Each wireless transmitter of the plurality of wireless transmitters is able to modulate a local oscillator signal from the local oscillator generator based on a weighted sum of a plurality of digital datastreams. The array coordinator is able to adjust a phase of a first local oscillator signal based on a phase difference between the first local oscillator signal and a second local oscillator signal. The first local oscillator signal is generated by a first local oscillator generator of a first transceiver circuit. The second local oscillator signal is generated by a second local oscillator generator of a second transceiver circuit.
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89.发明授权公开(公告)号：US09768796B2
公开(公告)日：2017-09-19
申请号：US15076920
申请日：2016-03-22
申请人： MaxLinear, Inc.
发明人： Raja Pullela , Curtis Ling
摘要： Method and systems are provided for controlling adjustments of reception functions. Communication links may be setup between a transmitter and a receiver along with sideband control channels. Conditions and/or parameters, affecting estimated performance of reception, via the communication links, at the receiver, may then be monitored at the transmit-side, and information relating to the monitored conditions may then be communicated, via the sideband control channels, to enable adjusting reception related functions at the receiver. The reception related functions comprise analog-to-digital conversion, which may be configured to function in an interleaved manner.
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公开(公告)号：US09768787B2
公开(公告)日：2017-09-19
申请号：US15285122
申请日：2016-10-04
申请人： MaxLinear, Inc.
CPC分类号： H03L7/00 , H03B5/1864 , H03L1/00
摘要： Systems and methods are provided for detection and compensation of dielectric resonator oscillator frequency drift. DRO frequency drift detection and compensation may comprise, for a received input signal, detecting one or more channels in the input signal, determine frequency offset for each of the detected channels; determining determine dielectric resonator oscillator (DRO) frequency drift based on combining frequency offsets of the detected channels, and determining, based on the DRO frequency drift, one or more adjustments for compensating for the DRO frequency drift. The DRO frequency drift may be determined based on analysis of an intermediate signal generated during processing of the input signal.
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