公开(公告)号：US20060244346A1

公开(公告)日：2006-11-02

申请号：US11475815

申请日：2006-06-26

申请人： Hirokazu Iwata

发明人： Hirokazu Iwata

IPC分类号： H01L41/08

CPC分类号： H03H9/0547 ,  H03H3/04 ,  H03H9/1021 ,  H03H9/17 ,  H03H2003/022 ,  H03H2003/0485

摘要： In the case where an ultraminiature piezoelectric substrate, which has a resonating portion formed by making a concavity by etching in the surface of the piezoelectric substrate made of an anisotropic crystal material, is mass-produced by batch operation using a large-area piezoelectric substrate wafer, an annular portion surrounding each concavity is formed sufficiently thick to prevent cracking from occurring when the wafer is severed. A piezoelectric substrate 2 of an anisotropic piezoelectric crystal material has a thin resonating portion 4 and a thick annular portion 5 integrally surrounding the outer marginal edge of the resonating portion to form a concavity 3 in at least one of major surfaces of the substrate; the inner wall 5a of the annular portion in the one crystal orientation slopes gently more than the inner wall in the other crystal orientation perpendicular to said one crystal orientation, and the piezoelectric substrate is longer in said one crystal orientation than in the other crystal orientation.

摘要翻译： 在通过使用大面积压电基板晶片的批量操作来批量生产具有通过在由各向异性晶体材料制成的压电基板的表面中通过蚀刻形成凹陷而形成的谐振部分的超微压电基板的情况下 围绕每个凹部的环形部分形成得足够厚以防止当晶片断开时发生裂纹。 各向异性压电晶体材料的压电基片2具有薄的谐振部分4和一个围绕谐振部分的外边缘的厚的环形部分5，以在基片的至少一个主表面中形成凹陷3; 在一个晶体取向中的环形部分的内壁5a在垂直于所述一个晶体取向的另一个晶体取向中比内壁平缓地倾斜，并且压电基片在所述一个晶体取向上比在另一个晶体取向上更长 。

公开(公告)号：US07109814B2

公开(公告)日：2006-09-19

申请号：US10931763

申请日：2004-09-01

申请人： Norio Nomura

发明人： Norio Nomura

IPC分类号： H03B5/32

CPC分类号： H03B5/362

摘要： In a Colpitts quartz oscillation circuit, large negative resistance values are obtained in a high frequency band, and in the GHz band in particular. In a piezoelectric oscillator having a Colpitts oscillator, a voltage control circuit, and a coupling capacitor that couples the Colpitts oscillator and the voltage control circuit, an output of the voltage control circuit is feed back to a collector of the Colpitts oscillator via the coupling capacitor.

摘要翻译： 在Colpitts石英振荡电路中，在高频带，特别是在GHz频带中获得了大的负电阻值。 在具有Colpitts振荡器，电压控制电路和连接Colpitts振荡器和电压控制电路的耦合电容器的压电振荡器中，电压控制电路的输出通过耦合电容器反馈到Colpitts振荡器的集电极 。

公开(公告)号：US06963600B1

公开(公告)日：2005-11-08

申请号：US09647557

申请日：2000-01-26

申请人： Pingzhi Fan ,  Naoki Suehiro ,  Noriyoshi Kuroyanagi

发明人： Pingzhi Fan ,  Naoki Suehiro ,  Noriyoshi Kuroyanagi

IPC分类号： H04B1/707 ,  H04J13/00 ,  H04Q7/38 ,  H04B1/69 ,  H04B7/216

CPC分类号： H04J13/14 ,  H04J13/0055

摘要： A direct sequence spread spectrum system consisting of modulator and demodulator wherein the spreading sequence with zero correlation zone properties, and the despreading consists of multiplying the received signal with the same spreading sequence, followed by a low pass filter, decoder and deinterleaver. The bit rate of the spreading sequence for each user is normally much higher than the input encoded data bit rate, and therefore it spreads the system spectrum.

摘要翻译： 由调制器和解调器组成的直接序列扩频系统，其中具有零相关区属性的扩展序列，并且解扩包括将接收信号与相同的扩展序列相乘，随后是低通滤波器，解码器和解交织器。 每个用户的扩展序列的比特率通常远高于输入编码的数据比特率，因此扩展了系统频谱。

公开(公告)号：US20050062916A1

公开(公告)日：2005-03-24

申请号：US10852809

申请日：2004-05-25

申请人： Hiroshi Matsumoto ,  Masayuki Ooto ,  Satoshi Kaizawa

发明人： Hiroshi Matsumoto ,  Masayuki Ooto ,  Satoshi Kaizawa

IPC分类号： G02B5/30 ,  G02B27/28 ,  G11B7/135 ,  G11B7/1365 ,  G02F1/1335

CPC分类号： G11B7/1365 ,  G02B5/3083

摘要： It is an object of the present invention to provide a wave plate which functions as a 1/4 wave plate where wave front aberration, temperature characteristics, and incident angle dependence are improved with respect to a plurality of wavelengths of an optical pickup unit or the like compatible with DVD and CD, and an optical pickup using the wave plate. In the laminated wave plate where a wave plate whose phase difference is a with respect to a monochromatic light of a wavelength λ and a wave plate whose phase difference is β are laminated so that their optical axes cross, and which the laminated wave plate functions as the 1/4 wave plate, a relationship between the phase difference a and the phase difference β satisfies the following condition: α=πn β=πm/2 however, n>1, and m>1 a material of one wave plate is a film having birefringence characteristics and a material of the other wave plate is quarts.

摘要翻译： 本发明的目的是提供一种作为1/4波片的波片，其波长像差，温度特性和入射角依赖性相对于光学拾取单元的多个波长或 如DVD和CD兼容，以及使用波片的光学拾取器。 在层叠波片中，相对于波长λ的单色光和相位差为β的波片的相位差为a的波片被层叠，使得它们的光轴交叉，层叠波片作为 1/4波片，相位差a和相位差β之间的关系满足以下条件：α= pin beta = pim / 2然而，n> 1，并且m≥1，一个波片的材料是 具有双折射特性的膜和另一个波片的材料是夸脱的。

公开(公告)号：US20040189413A1

公开(公告)日：2004-09-30

申请号：US10802628

申请日：2004-03-17

申请人： Toyo Communication Equipment Co., Ltd.

发明人： Tomio Satoh

IPC分类号： H03B005/32

CPC分类号： H03B5/364 ,  H03K3/0307

摘要： In an inverter oscillation circuit an output terminal 2 of an inverter 1 with its input and output interconnected via a high resistance R1 is grounded via a series connection of a capacitor C1 and parallel tuning circuit composed of a capacitor C2 and an inductor L1 connected in parallel, and the connection point of this series connection is grounded via a parallel circuit of diodes D1 and D2 connected in opposite polarities. The connection point of the series connection is connected to an input terminal 3 of the inverter 1 via series-connected capacitors C3 and C4, and the connection point of this series connection is grounded via a piezoelectric vibrator Xtal and a frequency adjusting capacitor C7. The inverter oscillation circuit is configured to provide its output via a series circuit composed of a resistor R2 and a capacitor C6.

摘要翻译： 在逆变器振荡电路中，经由高电阻R1互连的反相器1的输出端子2经由电容器C1和由并联连接的电容器C2和电感器L1组成的并联调谐电路的串联连接而接地 并且该串联连接的连接点通过以相反极性连接的二极管D1和D2的并联电路接地。 串联连接点通过串联电容器C3和C4连接到逆变器1的输入端子3，并且该串联连接点通过压电振子Xtal和频率调节电容器C7接地。 逆变器振荡电路经由由电阻器R2和电容器C6构成的串联电路来提供输出。

公开(公告)号：US20040174092A1

公开(公告)日：2004-09-09

申请号：US10691238

申请日：2003-10-22

申请人： Toyo Communication Equipment Co., Ltd.

发明人： Hirokazu Iwata

IPC分类号： H01L041/04

CPC分类号： H03H9/0547 ,  H03H3/04 ,  H03H9/1021 ,  H03H9/17 ,  H03H2003/022 ,  H03H2003/0485

摘要： In the case where an ultraminiature piezoelectric substrate, which has a resonating portion formed by making a concavity by etching in the surface of the piezoelectric substrate made of an anisotropic crystal material, is mass-produced by batch operation using a large-area piezoelectric substrate wafer, an annular portion surrounding each concavity is formed sufficiently thick to prevent cracking from occurring when the wafer is severed. A piezoelectric substrate 2 of an anisotropic piezoelectric crystal material has a thin resonating portion 4 and a thick annular portion 5 integrally surrounding the outer marginal edge of the resonating portion to form a concavity 3 in at least one of major surfaces of the substrate; the inner wall 5a of the annular portion in the one crystal orientation slopes gently more than the inner wall in the other crystal orientation perpendicular to said one crystal orientation, and the piezoelectric substrate is longer in said one crystal orientation than in the other crystal orientation.

摘要翻译： 在通过使用大面积压电基板晶片的批量操作来批量生产具有通过在由各向异性晶体材料制成的压电基板的表面中通过蚀刻形成凹陷而形成的谐振部分的超微压电基板的情况下 围绕每个凹部的环形部分形成得足够厚以防止当晶片断开时发生裂纹。 各向异性压电晶体材料的压电基片2具有薄的谐振部分4和一个围绕谐振部分的外边缘的厚的环形部分5，以在基片的至少一个主表面中形成凹陷3; 一个晶体取向中的环形部分的内壁5a在垂直于所述一个晶体取向的另一个晶体取向中比内壁轻轻地倾斜，并且压电基片在所述一个晶体取向上比在另一个晶体取向上更长。

公开(公告)号：US6114801A

公开(公告)日：2000-09-05

申请号：US202737

申请日：1998-12-14

申请人： Yoshiaki Tanaka ,  Mitsuhiro Nishida ,  Toshio Sugiyama ,  Hiroyuki Kobayashi

发明人： Yoshiaki Tanaka ,  Mitsuhiro Nishida ,  Toshio Sugiyama ,  Hiroyuki Kobayashi

IPC分类号： H03H3/04 ,  H03H9/19 ,  H01L41/08

CPC分类号： H03H9/19 ,  H03H3/04 ,  Y10T29/42

摘要： In an AT-cut quartz resonator having excitation electrodes formed on two principal surfaces of an AT-cut quartz substrate, the two electrodes are displaced a predetermined amount apart in a direction orthogonal to the X-axis direction so that a frequency deviation in a temperature range of from -10.degree. C. to 50.degree. C. is less than .+-.2.5 ppm. Further, in an AT-cut quartz resonator in which vertically opposed electrodes on both principal surfaces of a quartz substrate are slightly displaced apart in opposite directions along the Z' axis of quartz crystal, a balancing load is formed on a piezoelectric substrate on the side opposite to the direction of displacement of the electrodes. Thus, the present invention dispenses with the need for raising the ratio of conforming to nonconforming quartz substrates by eliminating variations in their cutting angle, but makes it possible to use nonconforming quartz substrates to offer customers low-cost quartz resonators of oscillation frequencies following various specs, by making easy, simple structural modifications of slightly changing the electrode arrangement or structure, or by making simple improvements to the conventional quartz resonator manufacturing process. In the manufacture of oscillators for use in consumer-electronics equipment, it is possible to fulfill any particular specs without inserting a temperature compensating circuit in the oscillation circuit. In regards to industrial equipment, any adjustments need not be made to the temperature compensating circuit in the oscillation circuit, and this improves the productivity of various communications equipment and various electronics equipment and reduces their manufacturing costs.

摘要翻译： PCT No.PCT / JP98 / 01526 Sec。 371 1998年12月14日第 102（e）1998年12月14日日期PCT提交1998年4月2日PCT公布。 第WO98 / 47226号公报 日期：1998年10月22日在AT切割石英振子中，在AT切割石英基板的两个主表面上形成有激励电极，两个电极沿与X轴方向正交的方向分开预定量， 在-10℃至50℃的温度范围内的频率偏差小于+/- 2.5ppm。 此外，在石英基板的两个主表面上的垂直相对的电极在沿石英晶体的Z'轴的相反方向上稍微偏移的AT切割石英谐振器中，在侧面的压电基板上形成平衡负载 与电极的位移方向相反。 因此，通过消除其切割角度的变化，本发明不需要提高符合不合格石英基板的比例，而是使用不合格石英基板为客户提供符合各种规格的低成本石英谐振器的振荡频率 通过对电极布置或结构稍微改变的简单，简单的结构修改，或通过简单改进传统的石英谐振器制造方法来实现。 在用于消费电子设备的振荡器的制造中，可以在振荡电路中不插入温度补偿电路来实现任何特定的规格。 关于工业设备，不需要对振荡电路中的温度补偿电路进行任何调整，这提高了各种通信设备和各种电子设备的生产率，并降低了其制造成本。

公开(公告)号：US6111341A

公开(公告)日：2000-08-29

申请号：US171698

申请日：1998-10-23

申请人： Kouichi Hirama

发明人： Kouichi Hirama

IPC分类号： H03H9/13 ,  H03H9/19 ,  H01L41/08

CPC分类号： H03H9/132 ,  H03H9/13 ,  H03H9/19

摘要： In a piezoelectric vibrator which has excitation electrodes respectively disposed on the top surface and undersurface of a piezoelectric substrate, at least one of the excitation electrodes being an inverted-mesa electrode that has a recess formed in the opposite side of the electrode from the side which contacts the piezoelectric substrate. Thus, an AT-cut quartz resonator in which the capacitance ratio .gamma. is reduced to a value below the limit value can be provided as a result of use of the inverted-mesa electrodes as excitation electrodes.

摘要翻译： PCT No.PCT / JP97 / 03807 Sec。 371 1998年12月21日第 102（e）日期1998年12月21日PCT提交1997年10月22日PCT公布。 公开号WO98 / 38736 日期：1998年9月3日在具有分别设置在压电基板的上表面和下表面上的激励电极的压电振动器中，至少一个激励电极是倒置台面电极，其具有形成在 电极从与压电基板接触的一侧。 因此，作为激励电极使用倒置台面电极的结果，可以提供将电容比γ降低到低于极限值的AT切割石英谐振器。

公开(公告)号：US5771249A

公开(公告)日：1998-06-23

申请号：US523191

申请日：1995-09-05

申请人： Shigeki Yanagisawa

发明人： Shigeki Yanagisawa

IPC分类号： H04L7/04 ,  H04L12/56 ,  H04Q11/04 ,  H03M13/00 ,  H04L7/00

CPC分类号： H04Q11/0478 ,  H04L7/048 ,  H04L2012/5673 ,  H04L2012/5674

摘要： An asynchronous transfer mode (ATM) cell synchronizing method and circuit used in a digital network system in which: an 8 bit ATM cell stream of a received signal is inputted into a five-stage D flip-flop and outputted to a first adder (exclusive OR) circuit through a remainder operation circuit; the adder circuit evaluates exclusive OR of the output of the remainder operation circuit and the inputted 8 bit ATM cell stream, the result of such an evaluation is inputted into a one-stage D flip-flop through a second adder; and the output of this one-stage D flip-flop is inputted into a CRC arithmetic operation circuit having a generating polyominal X.sup.8 +X.sup.2 +) X+1 and also into a decoder. The output of the CRC arithmetic operation circuit is inputted back to the second adder, and a cell synchronizing pulse is outputted from the decoder.

摘要翻译： 一种在数字网络系统中使用的异步传输模式（ATM）单元同步方法和电路，其中：接收信号的8位ATM信元流被输入到五级D触发器并输出到第一加法器 OR）电路通过余数运算电路; 加法器电路评估剩余运算电路的输出与输入的8位ATM信元流的异或运算，这样的评估结果通过第二加法器输入到一级D触发器; 并且该一级D触发器的输出被输入到具有生成多项式X8 + X2 +）X + 1的CRC运算电路，并且也被输入到解码器中。 CRC算术运算电路的输出被输入到第二加法器，从解码器输出单元同步脉冲。

公开(公告)号：US5764876A

公开(公告)日：1998-06-09

申请号：US513905

申请日：1995-08-28

申请人： Shigeki Yanagisawa ,  Tetsuya Morizumi

发明人： Shigeki Yanagisawa ,  Tetsuya Morizumi

IPC分类号： H04L1/00 ,  H03M13/00 ,  H03M13/15 ,  H03M13/33 ,  H04L7/00 ,  H04L7/04 ,  H04L12/70 ,  H04Q11/04 ,  H03M7/30

CPC分类号： H03M13/00 ,  H03M13/15 ,  H03M13/33 ,  H04L7/048 ,  H04Q11/0478 ,  H04L2012/5673 ,  H04L2012/5674

摘要： A method and device for detecting a cyclic code which detects an n-bit cyclic code or shortened cyclic code based on a degree-m generating polynomial or code with a predetermined bit pattern added to the cyclic code or shortened cyclic code in the bit sequence of a signal containing those codes by utilizing the principle that the remainder of division of those codes by the generating polynomial is zero or the added bit pattern.The method divides serially input receive data by the generating polynomial successively, and removes the remainder of division of X.sup.n by the generating polynomial from the remainder of the division of the bits up to the current bit if the nth bit before the current bit is 1 for each of the nth bit from the first bit and subsequent bits of the receive data. The device comprises a divider which divides serially input receive data by the generating polynomial successively and holds the remainder of the division hitherto performed, an n-stage shift register connected in parallel with the divider with respect to the input signal, and a decoder which receives the values of individual bits of the remainder calculated by the divider and outputs a predetermined detection signal when the values are all zero or form the predetermined bit pattern, and is constructed so as to remove the remainder of division of X.sup.n by the generating polynomial from the remainder calculated by the divider by utilizing the output signal of the last stage of the shift register when the value of the output of the last stage is 1.

摘要翻译： PCT No.PCT / JP94 / 00998 Sec。 371日期：1995年8月28日 102（e）日期1995年8月28日PCT提交1994年6月22日PCT公布。 公开号WO95 / 01683 日期1995年1月12日一种用于检测循环码的方法和装置，该循环码基于具有加到循环码或缩短循环码的预定比特模式的度m生成多项式或码来检测n比特循环码或缩短循环码 在包含这些代码的信号的比特序列中，通过利用生成多项式的那些代码的剩余余数为零或附加的比特模式的原理。 该方法依次生成多项式对串行输入的接收数据进行分割，如果当前位之前的第n位为1，则通过生成多项式从剩余的位除以当前位移除Xn的余数， 接收数据的第一位和后续位的第n位中的每一个。 该装置包括分频器，其通过生成多项式连续地分割串行输入的接收数据，并保持迄今执行的分割的剩余部分，相对于输入信号与分频器并联连接的n级移位寄存器，以及接收 由除法器计算出的余数的各个位的值，并且当该值全部为零时输出预定的检测信号，或者形成预定的位模式，并且被构造为通过来自该存储器的生成多项式去除Xn的余数 当最后一级的输出值为1时，通过利用移位寄存器的最后一级的输出信号由除法器计算的余数。