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81.发明公开公开(公告)号：US20240356537A1
公开(公告)日：2024-10-24
申请号：US18631798
申请日：2024-04-10
Applicant: STMicroelectronics International N.V.
Inventor： Massimo Pozzoni , Paolo Viola , Pasquale D'Argenio , Augusto Andrea Rossi
IPC: H03K3/017 , H03K5/24 , H03K17/567
CPC classification number: H03K3/017 , H03K5/24 , H03K17/567
Abstract: In embodiments, a clock signal calibration circuit for communication transmitters includes a multiplexer that creates a combined output pattern from input data patterns in reaction to the clock signal's edges. It uses a calibration data pattern generator, which supplies two sequential patterns—the second being a shifted copy of the first—to the multiplexer. An averaging circuit then generates two averaged signals corresponding to these patterns. Duty cycle control circuitry corrects clock signal imbalances if these averaged signals are unequal, thus adjusting the duty cycle distortion to achieve an ideal 50% duty cycle.
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公开(公告)号：US20240354742A1
公开(公告)日：2024-10-24
申请号：US18632120
申请日：2024-04-10
Applicant: STMicroelectronics International N.V.
Inventor： Philippe ALARY
CPC classification number: G06Q20/3552 , G06Q20/352 , G06V40/13
Abstract: A device facilitates personalizing an integrated circuit card including a fingerprint sensor. The device includes a support sheet, a first antenna located on top of and in contact with a surface of the support sheet, and at least one second antenna located on top of and in contact with the surface of the support sheet. The at least one second antenna is connected to the first antenna.
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公开(公告)号：US20240348188A1
公开(公告)日：2024-10-17
申请号：US18622199
申请日：2024-03-29
Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
Inventor： Laurent GONTHIER , Minjie LI
Abstract: The present disclosure relates to a control circuit of a triac or thyristor having its driving reference terminal connected to a first reference node and coupled to a voltage rectifier comprising at least a semiconductor device connected between the first reference node and a second reference node of the control circuit comprising: a first bipolar transistor; and a driving circuit of the first transistor referenced to the second reference node.
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公开(公告)号：US20240345229A1
公开(公告)日：2024-10-17
申请号：US18133299
申请日：2023-04-11
Applicant: STMicroelectronics International N.V.
Inventor： Colin CAMPBELL , Marco ANTONELLI , Calum RITCHIE , Bhagya Prakash BANDUSENA
IPC: G01S7/4865 , G01S17/10 , H01L31/0203 , H01L31/0216 , H01L31/173
CPC classification number: G01S7/4865 , G01S17/10 , H01L31/0203 , H01L31/02162 , H01L31/173
Abstract: A device includes an optical integrated circuit device mounted over an upper surface of a support substrate. The optical integrated circuit device includes an optical sensor array supported by a semiconductor substrate made of a first semiconductor material. A discrete semiconductor block, made of a second semiconductor material, is mounted over an upper surface of the optical integrated circuit device adjacent the optical sensor array. The first and second semiconductor materials have substantially matched coefficients of thermal expansion. A parallelpipedal-shaped optical filter is mounted over an upper surface of the discrete semiconductor block and extends over the optical sensor array. One or more edges/corners of the parallelpipedal-shaped optical filter cantilever over the optical sensor array without any provided support.
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公开(公告)号：US20240333430A1
公开(公告)日：2024-10-03
申请号：US18601352
申请日：2024-03-11
Applicant: STMicroelectronics International N.V.
Inventor： Roland Van Der Tuijn
IPC: H04L1/1607 , H04L5/00
CPC classification number: H04L1/1657 , H04L5/0055
Abstract: A method of controlling a receiver of radio frequency communications includes intervals between the reception of a data packet header and an acknowledgement sent by the receiver being constant, and, once a packet has been correctly received, circuits of the receiver are put into standby for a duration corresponding to the interval after each reception of a header of same rank as that of the correctly received packet.
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Patent Agency Ranking
公开(公告)号：US20240333318A1
公开(公告)日：2024-10-03
申请号：US18612222
申请日：2024-03-21
Applicant: STMicroelectronics International N.V.
Inventor： Nunzio Spina , Giuseppe Palmisano
IPC: H04B1/00
CPC classification number: H04B1/006 , H04B1/0078
Abstract: A circuit for transmitting/receiving signals through a galvanic isolation comprises an antenna transmitting/receiving radiofrequency signals modulated over a radiofrequency carrier, a transmitter receiving an input data signal, and a receiver delivering an output data signal. First and second capacitive circuitry are arranged between the antenna and the receiver and the transmitter, respectively. First and second switching circuitry couple the first and second capacitive circuitry to the antenna in an inductive-capacitive network, alternately: in a transmission mode, the first switching circuitry couples the first capacitive circuitry to ground with the receiver disabled, and the second switching circuitry decouples the second capacitive circuitry from the inductive-capacitive network with the transmitter enabled, and in a reception mode, the first switching circuitry decouples the first capacitive circuitry from ground, with the receiver enabled, and the second switching circuitry couples the second capacitive circuitry to the inductive-capacitive network with the transmitter disabled.
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公开(公告)号：US20240333302A1
公开(公告)日：2024-10-03
申请号：US18127848
申请日：2023-03-29
Inventor： Francesco STILGENBAUER , Edoardo BOTTI , Piero MALCOVATI , Paolo Stefano CROVETTI , Edoardo BONIZZONI , Matteo DE FERRARI
IPC: H03M3/00
Abstract: A delta-sigma modulator includes a loop filter circuit having a first input that receives an input signal and a second input that receives a feedback signal. The loop filter circuit generates a filtered signal. A quantizer circuit quantizes the integrated signal to generate an output signal. An anti-windup circuit detects instances where the integrated signal is outside an input signal input of the quantizer circuit and in response thereto generates a dead zone signal having a magnitude and sign corresponding to a difference between the filtered signal and the input signal range. The feedback signal is a sum of the output signal and the dead zone signal.
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公开(公告)号：US20240333293A1
公开(公告)日：2024-10-03
申请号：US18585766
申请日：2024-02-23
Applicant: STMicroelectronics International N.V.
Inventor： François Tailliet , Marc Battista
IPC: H03M1/12
CPC classification number: H03M1/12
Abstract: A method for controlling an analog-digital converter comprising first and second oscillators, and first and second elements, the method comprising a first step during which the first and second oscillators generate frequencies depending on an electrical characteristic of the first element and of the second element, respectively, and a second step during which the first and second oscillators generate frequencies depending on the electrical characteristic of the second element and of the first element, respectively.
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公开(公告)号：US20240333281A1
公开(公告)日：2024-10-03
申请号：US18598920
申请日：2024-03-07
Applicant: STMicroelectronics International N.V.
Inventor： Manoj Kumar TIWARI , Sandeep KAUSHIK , Zia PARVEEN
IPC: H03K17/56
CPC classification number: H03K17/56
Abstract: Provided is a circuit that sets a voltage of a failsafe node. The circuit includes a first voltage setting transistor configured to operate in a conductive state to set a voltage of the failsafe node to a supply voltage of a supply voltage node. The circuit includes first and second control transistors configured to control the first voltage setting transistor to operate in the conductive state in response to both the supply voltage and a pad node voltage of a pad node corresponding to logical one and control the first voltage setting transistor to operate in a nonconductive state in response to one of the supply voltage or the pad node voltage corresponding to the logical one and another one of the supply voltage or the pad node voltage corresponding to logical zero.
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公开(公告)号：US20240332955A1
公开(公告)日：2024-10-03
申请号：US18606918
申请日：2024-03-15
Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
Inventor： Jean-Michel SIMONNET , Romain PICHON
CPC classification number: H02H9/04 , H02H1/0007
Abstract: The present description concerns a circuit of protection against overvoltages appearing during a protection against overcurrents comprising: a first diode and a second diode having their cathodes coupled to a first node; a first transient voltage suppressor diode having its cathode coupled to a second node and having its anode coupled to the anode of the first diode; a thyristor having its cathode coupled to the anode of the second diode, having its anode coupled to the second node, and having its gate coupled to the anode of the first diode; and a switch having a first terminal coupled to the first node.
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