摘要:
A method of controlling a fuel injector assembly of an internal combustion engine includes the stop of generating a first injection pulse with an engine control module. The method also includes the step of injecting fuel into a cylinder of the engine in response to generation of the first injection pulse. The method further includes the step of detecting when fuel is injected into the cylinder and generating a control signal in response thereto. Moreover, the method includes the step of determining a time period between generation of the first injection pulse and generation of the control signal. The method also includes the step of adjusting initiation of a second injection pulse based on the time period. An apparatus for controlling a fuel injector assembly of an internal combustion engine is also disclosed.
摘要:
A micromechanical sensing apparatus includes a micromechanical sensor having a stationary element and a movable element which are electrically conductive, and a sensing circuit responsive to the micromechanical sensor for generating an output indicative of a sensed quantity. The sensing circuit may have a closed loop configuration or an open loop configuration. The sensing apparatus further includes an actuation circuit for applying to the micromechanical sensor an actuation signal, such as a test signal, for electrostatically deflecting the movable element relative to stationary element. The actuation circuit includes circuitry for limiting the bandwidth of the actuation signal such that the deflection of the movable element does not exceed maximum deflection limits. In the closed loop configuration, the bandwidth of the actuation signal is preferably limited to less than or equal to the closed loop bandwidth of the sensing circuit. As a result, electrostatic capture and/or contact between the movable element and the stationary element is prevented.
摘要:
A 12-bit sub-ranging A/D converter which operates through four successive sub-ranging cycles with an 8:1 gain change between the cycles. The residue signal for each cycle is directed to a four-bit flash converter the output of which sets the latches for corresponding bit-current-sources of a DAC. The flash converter input circuit comprises identical residue and reference amplifiers driving symmetrical residue and reference networks for controlling the flash converter comparators. The DAC output for each cycle is compared with the analog input signal to produce a corresponding new residue signal. There are 15 bit-current-sources, three for the first cycle, and four for each of the last three cycles. The MSB of each group of four bit-current sources is an overlap bit having the same current weighting as the LSB of the preceding group. Setting of the overlap bit makes it possible to develop a correct output for the DAC for each of the 2nd through 4th cycles without altering bits already determined in previous cycles. The converter provides an optional 5th cycle making possible a 14-bit output or an increased yield of 12-bit converters.