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    Apparatus and method for wavelength division multiplexing
    81.
    发明授权
    Apparatus and method for wavelength division multiplexing 失效
    用于波分复用的装置和方法

    公开(公告)号：US06684006B2

    公开(公告)日：2004-01-27

    申请号：US10021472

    申请日：2001-12-07

    Applicant: Bin Zhao

    Inventor： Bin Zhao

    IPC: G02B628

    CPC classification number: G02B6/2938 ,  G02B6/29353 ,  G02B6/29355 ,  G02B6/29386 ,  H04J14/02

    Abstract: A dispersion mitigating interleaver assembly has a first unbalanced Mach-Zehnder interferometer (MZI) assembly which includes first and second output ports and which has first transmission vs. wavelength curve and a first dispersion vs. wavelength curve. The dispersion mitigating interleaver assembly also includes a second unbalanced MZI assembly which has a second transmission vs. wavelength curve and a second dispersion vs. wavelength curve. The second unbalanced MZI assembly receives an output from one of the first and second output ports of the first unbalanced MZI assembly. The second transmission vs. wavelength curve is substantially the same as the first transmission vs. wavelength curve and the second dispersion vs. wavelength curve is substantially opposite with respect to the first dispersion vs. wavelength curve, such that dispersion is substantially cancelled by the cooperation of the first and second unbalanced MZI assemblies.

    Abstract translation: 分散减轻交错器组件具有第一不平衡马赫 - 曾德干涉仪（MZI）组件，其包括第一和第二输出端口，并且具有第一透射与波长曲线以及第一色散与波长曲线。 色散减轻交错器组件还包括第二不平衡MZI组件，其具有第二透射与波长曲线和第二色散相对于波长曲线。 第二不平衡MZI组件从第一不平衡MZI组件的第一和第二输出端口之一接收输出。 第二透射率与波长曲线基本上与第一透射率相对于波长曲线相同，并且第二色散对波长曲线相对于第一色散相对于波长曲线基本相反，使得色散基本上被合作消除 的第一和第二不平衡MZI组件。

    Tandem interleaver
    82.
    发明授权
    Tandem interleaver 失效
    串联交织器

    公开(公告)号：US06639707B2

    公开(公告)日：2003-10-28

    申请号：US10016362

    申请日：2001-11-30

    Applicant: Bin Zhao

    Inventor： Bin Zhao

    IPC: G02F103

    CPC classification number: G02B6/29302 ,  G02B6/272 ,  G02B6/2766 ,  G02B6/2773 ,  G02B6/29386

    Abstract: A low dispersion comb filter or interleaver comprises a first birefringent element assembly having at least one birefringent element and a second birefringent element assembly having at least one other birefringent element. The first birefringent element assembly and the second birefringent element assembly are configured so as to cooperate with one another in a manner which mitigates dispersion of the interleaver. By aligning the polarization directions of the odd channels and the even channels so as to be parallel with respect to one another prior to entering the second birefringent element assembly, zero or nearly zero dispersion is obtained simultaneously for both the odd and even channels.

    Abstract translation: 低色散梳状滤波器或交织器包括具有至少一个双折射元件的第一双折射元件组件和具有至少一个其它双折射元件的第二双折射元件组件。 第一双折射元件组件和第二双折射元件组件被配置为以减轻交错器的色散的方式彼此协作。 通过使奇数通道和偶数通道的偏振方向在进入第二双折射元件组件之前相对彼此平行对准，对奇数和偶数通道同时获得零或接近零的色散。

    Method for fabricating on-chip inductors and related structure
    83.
    发明授权
    Method for fabricating on-chip inductors and related structure 有权
    制造片上电感器及相关结构的方法

    公开(公告)号：US06396122B1

    公开(公告)日：2002-05-28

    申请号：US09658483

    申请日：2000-09-08

    Applicant: David Howard ,  Bin Zhao ,  Q. Z. Liu

    Inventor： David Howard ,  Bin Zhao ,  Q. Z. Liu

    IPC: H01L2900

    CPC classification number: H01L28/10 ,  H01L27/08

    Abstract: According to various disclosed embodiments, a conductor is patterned in a dielectric. The conductor can be patterned, for example, in the shape of a square spiral. The conductor can comprise, for example, copper, aluminum, or copper-aluminum alloy. The dielectric can be, for example, silicon oxide or a low-k dielectric. A spin-on matrix containing high permeability particles is then deposited adjacent to the patterned conductor. The high permeability particles comprise material having a permeability substantially higher than the permeability of the dielectric. The high permeability particles can comprise, for example, nickel, iron, nickel-iron alloy, or magnetic oxide. As a result, an inductor having a high inductance value is achieved without lowering the quality factor of the inductor.

    Abstract translation: 根据各种公开的实施例，导体在电介质中图案化。 导体可以被图案化，例如，呈正方形螺旋形。 导体可以包括例如铜，铝或铜 - 铝合金。 电介质可以是例如氧化硅或低k电介质。 然后将包含高磁导率颗粒的旋涂基体沉积在图案化导体附近。 高磁导率颗粒包括具有比电介质的磁导率显着更高的磁导率的材料。 高磁导率颗粒可以包括例如镍，铁，镍 - 铁合金或磁性氧化物。 结果，实现了具有高电感值的电感器，而不降低电感器的品质因数。

    Interconnect with low dielectric constant insulators for semiconductor integrated circuit manufacturing
    84.
    发明授权
    Interconnect with low dielectric constant insulators for semiconductor integrated circuit manufacturing 有权
    与半导体集成电路制造的低介电常数绝缘体互连

    公开(公告)号：US06187672B1

    公开(公告)日：2001-02-13

    申请号：US09158337

    申请日：1998-09-22

    Applicant: Bin Zhao ,  Maureen R. Brongo

    Inventor： Bin Zhao ,  Maureen R. Brongo

    IPC: H01L214763

    CPC classification number: H01L21/76802 ,  H01L21/76801 ,  H01L21/76819 ,  H01L21/76834

    Abstract: A method is provided for forming an improved interconnect structure on a semiconductor body. A first metal layer is deposited on the semiconductor body. A sacrificial layer having a height is deposited on the first metal layer. The sacrificial layer and the metal layer are patterned to form separate metal lines with the sacrificial layer remaining on said metal lines. A low-k material is then deposited to fill the gaps between metal lines and to cover the sacrificial layer. The low-k material is then removed to a level within the height of the sacrificial layer. The sacrificial layer is then removed. A protective layer is deposited on top of the metal lines and the low-k material. A dielectric layer is deposited over the protective layer. The protective layer protects the low-k material from attack by chemicals utilized by subsequent process steps to etch vias in the dielectric layer, to strip photo-resist, and to clean the vias. The protective layer is then selectively etched away to make contact between a via plug and the metal lines.

    Abstract translation: 提供了一种用于在半导体本体上形成改进的互连结构的方法。 第一金属层沉积在半导体本体上。 具有高度的牺牲层沉积在第一金属层上。 牺牲层和金属层被图案化以形成分离的金属线，牺牲层保留在所述金属线上。 然后沉积低k材料以填充金属线之间的间隙并覆盖牺牲层。 然后将低k材料去除到牺牲层的高度内的水平。 然后去除牺牲层。 保护层沉积在金属线和低k材料的顶部。 介电层沉积在保护层上。 保护层保护低k材料免受后续工艺步骤所用化学品的侵蚀，以蚀刻电介质层中的通孔，剥离光致抗蚀剂和清洁通孔。 然后选择性地蚀刻保护层以使通孔塞和金属线之间的接触。

    Electrocardiogram signal processing system
    89.
    发明授权
    Electrocardiogram signal processing system 有权
    心电图信号处理系统

    公开(公告)号：US08725238B2

    公开(公告)日：2014-05-13

    申请号：US12878800

    申请日：2010-09-09

    Applicant: Xin Liu ,  Yuanjin Zheng ,  Myint Wai Phyu ,  Bin Zhao

    Inventor： Xin Liu ,  Yuanjin Zheng ,  Myint Wai Phyu ,  Bin Zhao

    IPC: A61B5/0432

    CPC classification number: A61B5/0452 ,  A61B5/0472 ,  A61B5/7203 ,  A61B5/7232 ,  A61B5/726

    Abstract: An electrocardiogram signal processing system is provided which includes: a wavelet transformation unit comprising a plurality of outputs, each output being connected to one of a plurality of scales, wherein the wavelet transformation unit is adapted to transform an input electrocardiogram signal into a set of wavelets, each wavelet being output to one of the scales; a plurality of signal processing blocks, each of the signal processing blocks coupled to a respective output of the wavelet transformation unit and configured to receive and process the wavelet from the respective output, wherein the signal processing blocks provide processing functions which differ from one another.

    Abstract translation: 提供了一种心电图信号处理系统，其包括：小波变换单元，包括多个输出，每个输出连接到多个刻度中的一个，其中所述小波变换单元适于将输入的心电图信号变换成一组小波 每个小波输出到一个秤; 多个信号处理块，每个信号处理块耦合到小波变换单元的相应输出并且被配置为从相应的输出接收和处理小波，其中信号处理块提供彼此不同的处理功能。

    Differential sensing for voltage control in a power supply circuit
    90.
    发明授权
    Differential sensing for voltage control in a power supply circuit 有权
    差分感应电源电路中的电压控制

    公开(公告)号：US08633680B2

    公开(公告)日：2014-01-21

    申请号：US13216522

    申请日：2011-08-24

    Applicant: Bin Zhao ,  Jack Cornish ,  Victor Lee

    Inventor： Bin Zhao ,  Jack Cornish ,  Victor Lee

    IPC: G05F1/44 ,  G05F1/56

    CPC classification number: H02M3/00 ,  H02M2001/0003 ,  Y10T307/25

    Abstract: In one general aspect, an apparatus can include a controller, and a power stage coupled to the controller and configured to be coupled to a power source. The power stage is configured to deliver an output voltage to a load module in response to the controller. The apparatus also includes a reference voltage circuit coupled to the controller and configured to be grounded to a first ground voltage different from a second ground voltage associated with the load module.

    Abstract translation: 在一个一般方面，装置可以包括控制器和耦合到控制器并被配置为耦合到电源的功率级。 功率级被配置为响应于控制器将输出电压递送到负载模块。 该装置还包括耦合到控制器并被配置为接地到不同于与负载模块相关联的第二接地电压的第一接地电压的参考电压电路。

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