Spatial Correlation of Reference Cells in Resistive Memory Array
    81.
    发明申请
    Spatial Correlation of Reference Cells in Resistive Memory Array 有权
    参考细胞在电阻记忆阵列中的空间相关性

    公开(公告)号:US20100110761A1

    公开(公告)日:2010-05-06

    申请号:US12398256

    申请日:2009-03-05

    IPC分类号: G11C11/00

    摘要: The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array. Then a column or row is selected to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.

    摘要翻译: 本公开涉及将参考列或参考行选择性地放置在存储器阵列中的方法。 该方法包括测量存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值,并映射每个测量的可变电阻存储单元的位置,以形成多个可变电阻存储单元的电阻状态电阻值的映射 在内存阵列内。 然后,基于存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值的映射来选择列或行作为参考列或参考行,以最小化读取操作错误,以及形成可变电阻存储器 单元存储器阵列。

    Quiescent testing of non-volatile memory array
    82.
    发明授权
    Quiescent testing of non-volatile memory array 失效
    非易失性存储器阵列的静态测试

    公开(公告)号:US08526252B2

    公开(公告)日:2013-09-03

    申请号:US12405932

    申请日:2009-03-17

    IPC分类号: G11C29/00

    摘要: A method and apparatus for testing an array of non-volatile memory cells, such as a spin-torque transfer random access memory (STRAM). In some embodiments, an array of memory cells having a plurality of unit cells with a resistive sense element and a switching device has a row decoder and a column decoder connected to the plurality of unit cells. A test circuitry sends a non-operational test pattern through the array via the row and column decoders with a quiescent supply current to identify defects in the array of memory cells.

    摘要翻译: 用于测试非易失性存储器单元阵列的方法和装置,例如自旋转矩传递随机存取存储器(STRAM)。 在一些实施例中,具有多个具有电阻感测元件和开关器件的单位单元的存储器单元阵列具有连接到多个单位单元的行解码器和列解码器。 测试电路通过具有静态电源电流的行和列解码器通过阵列发送非操作测试模式,以识别存储器单元阵列中的缺陷。

    Bit set modes for a resistive sense memory cell array
    83.
    发明授权
    Bit set modes for a resistive sense memory cell array 有权
    电阻读出存储单元阵列的位设置模式

    公开(公告)号:US08934281B2

    公开(公告)日:2015-01-13

    申请号:US13274876

    申请日:2011-10-17

    摘要: Various embodiments of the present invention are generally directed to a method and apparatus for providing different bit set modes for a resistive sense memory (RSM) array, such as a spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM) array. In accordance with some embodiments, a group of RSM cells in a non-volatile semiconductor memory array is identified for application of a bit set operation. A bit set value is selected from a plurality of bit set values each separately writable to the RSM cells to place said cells in a selected resistive state. The selected bit set value is thereafter written to at least a portion of the RSM cells in the identified group.

    摘要翻译: 本发明的各种实施例一般涉及一种用于为电阻式感测存储器(RSM)阵列提供不同的比特设置模式的方法和装置,诸如自旋转矩传递随机存取存储器(STRAM)或电阻随机存取存储器(RRAM) )数组。 根据一些实施例,识别非易失性半导体存储器阵列中的一组RSM单元用于位设置操作的应用。 从对RSM单元分别写入的多个位设置值中选择位设置值,以将所述单元置于选择的电阻状态。 所选位设定值此后被写入所识别的组中的RSM单元的至少一部分。

    Spatial correlation of reference cells in resistive memory array
    84.
    发明授权
    Spatial correlation of reference cells in resistive memory array 有权
    参考电池在电阻式存储器阵列中的空间相关性

    公开(公告)号:US08526215B2

    公开(公告)日:2013-09-03

    申请号:US13410783

    申请日:2012-03-02

    IPC分类号: G11C11/00

    摘要: The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array. Then a column or row is selected to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.

    摘要翻译: 本公开涉及将参考列或参考行选择性地放置在存储器阵列中的方法。 该方法包括测量存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值,并映射每个测量的可变电阻存储单元的位置,以形成多个可变电阻存储单元的电阻状态电阻值的映射 在内存阵列内。 然后,基于存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值的映射来选择列或行作为参考列或参考行,以最小化读取操作错误,以及形成可变电阻存储器 单元存储器阵列。

    Spin-transfer torque memory self-reference read method
    85.
    发明授权
    Spin-transfer torque memory self-reference read method 有权
    自旋转矩存储器自参考读取方式

    公开(公告)号:US08411495B2

    公开(公告)日:2013-04-02

    申请号:US13349052

    申请日:2012-01-12

    IPC分类号: G11C11/00

    摘要: A spin-transfer torque memory apparatus and self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage, the magnetic tunnel junction data cell having a first resistance state and storing the first bit line read voltage in a first voltage storage device. Then applying a low resistance state polarized write current through the magnetic tunnel junction data cell, forming a low second resistance state magnetic tunnel junction data cell. A second read current is applied through the low second resistance state magnetic tunnel junction data cell to forming a second bit line read voltage. The second bit line read voltage is stored in a second voltage storage device. The method also includes comparing the first bit line read voltage with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.

    摘要翻译: 描述了自旋转移力矩存储装置和自参考读取方案。 读取自旋传递转矩存储单元的一种自参考方法包括:通过磁性隧道结数据单元施加第一读取电流并形成第一位线读取电压,所述磁性隧道结数据单元具有第一电阻状态并存储 第一电压存储装置中的第一位线读取电压。 然后通过磁性隧道结数据单元施加低电阻状态的极化写入电流,形成低的第二电阻状态磁隧道结数据单元。 第二读取电流通过低的第二电阻状态磁隧道结数据单元施加以形成第二位线读取电压。 第二位线读取电压被存储在第二电压存储装置中。 该方法还包括将第一位线读取电压与第二位线读取电压进行比较,以确定磁性隧道结数据单元的第一电阻状态是高电阻状态还是低电阻状态。

    TRANSMISSION GATE-BASED SPIN-TRANSFER TORQUE MEMORY UNIT
    86.
    发明申请
    TRANSMISSION GATE-BASED SPIN-TRANSFER TORQUE MEMORY UNIT 有权
    基于传输门控的转子转矩记忆单元

    公开(公告)号:US20120230093A1

    公开(公告)日:2012-09-13

    申请号:US13474839

    申请日:2012-05-18

    IPC分类号: G11C11/16

    摘要: A transmission gate-based spin-transfer torque memory unit is described. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. A NMOS transistor is in parallel electrical connection with a PMOS transistor and they are electrically connected with the source line and the magnetic tunnel junction data cell. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. The PMOS transistor and the NMOS transistor are separately addressable so that a first write current in a first direction flows through the PMOS transistor and a second write current in a second direction flows through the NMOS transistor.

    摘要翻译: 描述基于传输门的自旋转移转矩存储单元。 存储单元包括电耦合到位线和源极线的磁性隧道结数据单元。 NMOS晶体管与PMOS晶体管并联电连接,并且它们与源极线和磁性隧道结数据单元电连接。 磁隧道结数据单元被配置为通过使极化写入电流通过磁性隧道结数据单元在高电阻状态和低电阻状态之间切换。 PMOS晶体管和NMOS晶体管可单独寻址,使得第一方向上的第一写入电流流过PMOS晶体管,并且第二方向的第二写入电流流过NMOS晶体管。

    Memory cell with proportional current self-reference sensing
    87.
    发明授权
    Memory cell with proportional current self-reference sensing 有权
    具有比例电流自参考感测的存储单元

    公开(公告)号:US08203899B2

    公开(公告)日:2012-06-19

    申请号:US12946582

    申请日:2010-11-15

    IPC分类号: G11C7/02

    摘要: Various embodiments of the present invention are generally directed to a method and apparatus for sensing a programmed state of a memory cell, such as a spin-torque transfer random access memory (STRAM) cell. A first read current is applied to the memory cell to generate a first voltage. A second read current is subsequently applied to the memory cell to generate a second voltage, with the second read current being proportional in magnitude to the first read current. A comparison is made between the first and second voltages to determine the programmed state of the memory cell.

    摘要翻译: 本发明的各种实施例通常涉及用于感测诸如自旋扭矩传递随机存取存储器(STRAM)单元的存储器单元的编程状态的方法和装置。 将第一读取电流施加到存储器单元以产生第一电压。 随后将第二读取电流施加到存储器单元以产生第二电压,其中第二读取电流在幅度上与第一读取电流成比例。 在第一和第二电压之间进行比较以确定存储器单元的编程状态。

    Voltage reference generation with selectable dummy regions
    88.
    发明授权
    Voltage reference generation with selectable dummy regions 失效
    具有可选虚拟区域的电压参考生成

    公开(公告)号:US08203862B2

    公开(公告)日:2012-06-19

    申请号:US12502191

    申请日:2009-07-13

    IPC分类号: G11C11/00

    摘要: An apparatus and associated method for generating a reference voltage with dummy resistive sense element regions. A first resistance distribution is obtained for a first dummy region of resistance sense elements and a second resistance distribution is obtained for a second dummy region of resistive sense elements. A user resistive sense element from a user region is assigned to a selected resistive sense element of one of the first or second dummy regions in relation to the first and second resistance distributions.

    摘要翻译: 一种用于产生具有虚拟电阻感测元件区域的参考电压的装置和相关联的方法。 对于电阻感测元件的第一虚拟区域获得第一电阻分布,并且获得电阻感测元件的第二虚拟区域的第二电阻分布。 来自用户区域的用户电阻感测元件相对于第一和第二电阻分布被分配给第一或第二虚拟区域中的一个的所选择的电阻感测元件。

    Computer memory device with multiple interfaces
    89.
    发明授权
    Computer memory device with multiple interfaces 有权
    具有多个接口的计算机存储设备

    公开(公告)号:US08194437B2

    公开(公告)日:2012-06-05

    申请号:US12352713

    申请日:2009-01-13

    IPC分类号: G11C11/44

    CPC分类号: G11C11/22

    摘要: Various embodiments are generally directed to a method and apparatus associated with operating a first memory device with multiple interfaces and a status register. In some embodiments, a first interface is engaged by a host. A memory device that has a plurality of memory cells comprised of at least a magnetic tunneling junction and a spin polarizing magnetic material is connected to a second interface. A status register is maintained by logging at least an error or busy signal during data transfer operations through the first and second interfaces.

    摘要翻译: 各种实施例通常涉及与操作具有多个接口和状态寄存器的第一存储器件相关联的方法和装置。 在一些实施例中,主机接合第一接口。 具有由至少磁性隧道结和自旋极化磁性材料构成的多个存储单元的存储器件连接到第二接口。 通过在数据传输操作期间通过第一和第二接口记录至少一个错误或忙信号来维护状态寄存器。

    Spin-transfer torque memory non-destructive self-reference read method
    90.
    发明授权
    Spin-transfer torque memory non-destructive self-reference read method 有权
    旋转转矩记忆无损自参考读取方法

    公开(公告)号:US08116123B2

    公开(公告)日:2012-02-14

    申请号:US12147727

    申请日:2008-06-27

    IPC分类号: G11C11/00

    CPC分类号: G11C11/1673 G11C11/1693

    摘要: A spin-transfer torque memory apparatus and non-destructive self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage and storing the first bit line read voltage in a first voltage storage device. The magnetic tunnel junction data cell has a first resistance state. Then the method includes applying a second read current thorough the magnetic tunnel junction data cell having the first resistance state and forming a second bit line read voltage and storing the second bit line read voltage in a second voltage storage device. The first read current is less than the second read current. Then the stored first bit line read voltage is compared with the stored second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.

    摘要翻译: 描述了自旋转移力矩存储装置和非破坏性自参考读取方案。 读取自旋转移力矩存储单元的一种自参考方法包括:通过磁性隧道结数据单元施加第一读取电流并形成第一位线读取电压,并将第一位线读取电压存储在第一电压存储装置中。 磁性隧道结数据单元具有第一电阻状态。 然后,该方法包括通过具有第一电阻状态的磁性隧道结数据单元施加第二读取电流并形成第二位线读取电压,并将第二位线读取电压存储在第二电压存储器件中。 第一个读取电流小于第二个读取电流。 然后将存储的第一位线读取电压与存储的第二位线读取电压进行比较,以确定磁性隧道结数据单元的第一电阻状态是高电阻状态还是低电阻状态。