公开(公告)号：US20200294940A1

公开(公告)日：2020-09-17

申请号：US16397923

申请日：2019-04-29

Applicant: Intel Corporation

Inventor： Georgios Dogiamis ,  Aleksandar Aleksov ,  Adel A. Elsherbini ,  Henning Braunisch ,  Johanna M. Swan ,  Telesphor Kamgaing

IPC: H01L23/66 ,  G02B6/30 ,  H01P11/00 ,  H01P3/16

Abstract: Embodiments may relate to a semiconductor package that includes a package substrate coupled with a die. The package may further include a waveguide coupled with the first package substrate. The waveguide may include two or more layers of a dielectric material with a waveguide channel positioned between two layers of the two or more layers of the dielectric material. The waveguide channel may convey an electromagnetic signal with a frequency greater than 30 gigahertz (GHz). Other embodiments may be described or claimed.

公开(公告)号：US20200273824A1

公开(公告)日：2020-08-27

申请号：US16369836

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Telesphor Kamgaing ,  Georgios Dogiamis ,  Hyung-Jin Lee ,  Henning Braunisch ,  Richard Dischler

IPC: H01L23/66 ,  H01L23/00 ,  H01L21/48

Abstract: Embodiments may relate to a microelectronic package that includes a package substrate and a signal interconnect coupled with the face of the package substrate. The microelectronic package may further include a ground interconnect coupled with the face of the package substrate. The ground interconnect may at least partially surround the signal interconnect. Other embodiments may be described or claimed.

公开(公告)号：US20190287908A1

公开(公告)日：2019-09-19

申请号：US15963066

申请日：2018-04-25

Applicant: Intel Corporation

Inventor： Georgios Dogiamis ,  Johanna M. Swan

IPC: H01L23/538 ,  H01L23/66 ,  H01L25/065

Abstract: Disclosed herein are waveguide interconnect bridges for integrated circuit (IC) structures, as well as related methods and devices. In some embodiments, a waveguide interconnect bridge may include a waveguide material and one or more wall cavities in the waveguide material. The waveguide interconnect bridge may communicatively couple two dies in an IC package.

公开(公告)号：US20190097293A1

公开(公告)日：2019-03-28

申请号：US16186103

申请日：2018-11-09

Applicant: Intel Corporation

Inventor： Georgios Dogiamis ,  Adel A. Elsherbini ,  Henning Braunisch ,  Gilbert W. Dewey ,  Telesphor Kamgaing ,  Hyung-Jin Lee ,  Johanna M. Swan

IPC: H01P3/127 ,  H01P3/10 ,  H01P5/103

Abstract: There is disclosed in one example an electromagnetic wave launcher apparatus, including: an interface to an electromagnetic waveguide; a first launcher configured to launch a high-frequency electromagnetic signal onto a first cross-sectional portion of the waveguide; and a second launcher configured to launch a lower-frequency electromagnetic signal onto a second cross-sectional portion of the waveguide.

公开(公告)号：US12170244B2

公开(公告)日：2024-12-17

申请号：US16914062

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Feras Eid ,  Georgios Dogiamis ,  Henning Braunisch ,  Beomseok Choi ,  William J. Lambert ,  Stephen Morein ,  Ahmed Abou-Alfotouh ,  Johanna Swan

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/532 ,  H05K1/11 ,  H05K3/14

Abstract: An integrated circuit (IC) die package substrate comprises a first trace upon, or embedded within, a dielectric material. The first trace comprises a first metal and a first via coupled to the first trace. The first via comprises the first metal and a second trace upon, or embedded within, the dielectric material. A second via is coupled to the second trace, and at least one of the second trace or the second via comprises a second metal with a different microstructure or composition than the first metal.

公开(公告)号：US20240355725A1

公开(公告)日：2024-10-24

申请号：US18762484

申请日：2024-07-02

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Feras Eid ,  Georgios Dogiamis ,  Beomseok Choi ,  Henning Braunisch ,  William Lambert ,  Krishna Bharath ,  Johanna Swan

IPC: H01L23/50 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/48 ,  H01L25/00 ,  H01L25/065 ,  H05K1/18

CPC classification number: H01L23/50 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/3185 ,  H01L23/367 ,  H01L23/481 ,  H01L23/562 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H05K1/181 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/18161

Abstract: An integrated circuit assembly may be fabricated having an electronic substrate, an integrated circuit device having a first surface, an opposing second surface, at least one side extending between the first surface and the second surface, and at least one through-substrate via extending into the integrated circuit device from the second surface, wherein the first surface of the integrated circuit device is electrically attached to the electronic substrate; and at least one power delivery route electrically attached to the second surface of the integrated circuit device and to the electronic substrate, wherein the at least one power delivery route is conformal to the side of the integrated circuit device and the first surface of the electronic substrate.

公开(公告)号：US12107314B2

公开(公告)日：2024-10-01

申请号：US16911934

申请日：2020-06-25

Applicant: Intel Corporation

Inventor： Neelam Prabhu Gaunkar ,  Georgios Dogiamis ,  Telesphor Kamgaing ,  Henning Braunisch ,  Diego Correas-Serrano

IPC: H01P5/02 ,  H01P1/04 ,  H01P1/20 ,  H01P3/00 ,  H01P3/16 ,  H01Q5/328 ,  H01Q13/26

CPC classification number: H01P5/028 ,  H01P1/047 ,  H01P1/2002 ,  H01P3/003 ,  H01P3/16 ,  H01Q5/328 ,  H01Q13/26

Abstract: Disclosed herein are components for millimeter-wave communication, as well as related methods and systems.

公开(公告)号：US12087682B2

公开(公告)日：2024-09-10

申请号：US16907797

申请日：2020-06-22

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Feras Eid ,  Georgios Dogiamis ,  Beomseok Choi ,  Henning Braunisch ,  William Lambert ,  Krishna Bharath ,  Johanna Swan

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/48 ,  H01L23/50 ,  H01L25/00 ,  H01L25/065 ,  H05K1/18

CPC classification number: H01L23/50 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/3185 ,  H01L23/367 ,  H01L23/481 ,  H01L23/562 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H05K1/181 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/18161

Abstract: An integrated circuit assembly may be fabricated having an electronic substrate, an integrated circuit device having a first surface, an opposing second surface, at least one side extending between the first surface and the second surface, and at least one through-substrate via extending into the integrated circuit device from the second surface, wherein the first surface of the integrated circuit device is electrically attached to the electronic substrate; and at least one power delivery route electrically attached to the second surface of the integrated circuit device and to the electronic substrate, wherein the at least one power delivery route is conformal to the side of the integrated circuit device and the first surface of the electronic substrate.

公开(公告)号：US11887944B2

公开(公告)日：2024-01-30

申请号：US16909258

申请日：2020-06-23

Applicant: Intel Corporation

Inventor： Georgios Dogiamis ,  Feras Eid ,  Adel Elsherbini

IPC: H01L23/66 ,  H01L23/00 ,  H01L23/367 ,  H01L23/498 ,  H01L23/544 ,  H01L21/48 ,  H01P11/00 ,  H01P3/06

CPC classification number: H01L23/66 ,  H01L21/4853 ,  H01L21/4871 ,  H01L23/3675 ,  H01L23/49838 ,  H01L23/544 ,  H01L24/16 ,  H01P3/06 ,  H01P11/005 ,  H01L2223/54426 ,  H01L2223/6627 ,  H01L2224/16227

Abstract: Cables, cable connectors, and support structures for cantilever package and/or cable attachment may be fabricated using additive processes, such as a coldspray technique, for integrated circuit assemblies. In one embodiment, cable connectors may be additively fabricated directly on an electronic substrate. In another embodiment, seam lines of cables and/or between cables and cable connectors may be additively fused. In a further embodiment, integrated circuit assembly attachment and/or cable attachment support structures may be additively formed on an integrated circuit assembly.

公开(公告)号：US11842826B2

公开(公告)日：2023-12-12

申请号：US16909264

申请日：2020-06-23

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Feras Eid ,  Johanna Swan ,  Georgios Dogiamis

IPC: H01L21/786 ,  H01B13/22 ,  H01B13/00 ,  H01B7/00 ,  H01B7/18 ,  H01L21/768 ,  B33Y10/00 ,  B33Y80/00

CPC classification number: H01B13/0036 ,  H01B7/0018 ,  H01B7/1805 ,  H01B13/002 ,  H01B13/0026 ,  H01B13/22 ,  H01L21/76885 ,  B33Y10/00 ,  B33Y80/00

Abstract: Cables, cable connectors, and support structures for cantilever package and/or cable attachment may be fabricated using additive processes, such as a coldspray technique, for integrated circuit assemblies. In one embodiment, cable connectors may be additively fabricated directly on an electronic substrate. In another embodiment, seam lines of cables and/or between cables and cable connectors may be additively fused. In a further embodiment, integrated circuit assembly attachment and/or cable attachment support structures may be additively formed on an integrated circuit assembly.