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224 条记录 (耗时 0.032 秒)

    Self-aligned patterned etch stop layers for semiconductor devices
    83.
    发明授权
    Self-aligned patterned etch stop layers for semiconductor devices 失效
    用于半导体器件的自对准图案蚀刻停止层

    公开(公告)号：US08367544B2

    公开(公告)日：2013-02-05

    申请号：US12582137

    申请日：2009-10-20

    申请人： Kangguo Cheng ,  Lawrence A. Clevenger ,  Johnathan E. Faltermeier ,  Stephan Grunow ,  Kaushik A. Kumar ,  Kevin S. Petrarca

    发明人： Kangguo Cheng ,  Lawrence A. Clevenger ,  Johnathan E. Faltermeier ,  Stephan Grunow ,  Kaushik A. Kumar ,  Kevin S. Petrarca

    IPC分类号： H01L21/44

    CPC分类号： H01L21/76808 ,  H01L21/76802 ,  H01L21/7681 ,  H01L21/76825 ,  H01L21/76829

    摘要： A method of forming a semiconductor device includes patterning a photoresist layer formed over a homogeneous semiconductor device layer to be etched; subjecting the semiconductor device to an implant process that selectively implants a sacrificial etch stop layer that is self-aligned in accordance with locations of features to be etched within the homogeneous semiconductor device layer, and at a desired depth for the features to be etched; etching a feature pattern defined by the patterned photoresist layer into the homogenous semiconductor device layer, stopping on the implanted sacrificial etch stop layer; and removing remaining portion of the implanted sacrificial etch stop layer prior to filling the etched feature pattern with a fill material.

    摘要翻译： 形成半导体器件的方法包括：图案化在待蚀刻的均匀半导体器件层上形成的光致抗蚀剂层; 对半导体器件进行注入工艺，该注入工艺根据待均匀半导体器件层内待蚀刻的特征的位置以及在要蚀刻的特征的期望深度选择性地埋入自对准的牺牲蚀刻停止层; 将由图案化的光致抗蚀剂层限定的特征图案蚀刻成均匀的半导体器件层，停止在注入的牺牲蚀刻停止层上; 以及在用填充材料填充蚀刻的特征图案之前去除注入的牺牲蚀刻停止层的剩余部分。

    SOLAR CELL CLASSIFICATION METHOD
    85.
    发明申请
    SOLAR CELL CLASSIFICATION METHOD 审中-公开
    太阳能电池分类方法

    公开(公告)号：US20120160295A1

    公开(公告)日：2012-06-28

    申请号：US13167792

    申请日：2011-06-24

    申请人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer Klaus Krause ,  Kevin S. Petrarca ,  Gerd Pfeiffer ,  Kevin Prettyman ,  Brian C. Sapp

    发明人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer Klaus Krause ,  Kevin S. Petrarca ,  Gerd Pfeiffer ,  Kevin Prettyman ,  Brian C. Sapp

    IPC分类号： H01L31/042 ,  H01L31/18 ,  G01R31/10

    CPC分类号： H02S50/10

    摘要： A method for characterizing the electronic properties of a solar cell to be used in a photovoltaic module comprises the steps of performing a room temperature IV curve measurement of the solar cell and classifying the solar cell based on this IV curve measurement. In order to take stress-related effects into account, the solar cells are reclassified depending on the result of an additional measurement conducted on the solar cells under stress. This stress-related measurement may be gained from light induced thermography (LIT) yielding information on diode shunt areas within the solar cell.

    摘要翻译： 用于表征在光伏模块中使用的太阳能电池的电子特性的方法包括以下步骤：基于该IV曲线测量，执行太阳能电池的室温IV曲线测量并对太阳能电池进行分类。 为了考虑应力相关的影响，太阳能电池根据在应力下对太阳能电池进行的额外测量的结果重新分类。 该应力相关测量可以从光诱导热成像（LIT）获得，产生关于太阳能电池内的二极管分流区域的信息。

    Semitubular metal-oxide-semiconductor field effect transistor
    89.
    发明授权
    Semitubular metal-oxide-semiconductor field effect transistor 有权
    半金属氧化物半导体场效应晶体管

    公开(公告)号：US07868374B2

    公开(公告)日：2011-01-11

    申请号：US12034899

    申请日：2008-02-21

    申请人： Kangguo Cheng ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  Louis L. Hsu ,  Jack A. Mandelman

    发明人： Kangguo Cheng ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  Louis L. Hsu ,  Jack A. Mandelman

    IPC分类号： H01L29/788

    CPC分类号： H01L27/108 ,  H01L27/10802 ,  H01L27/10826 ,  H01L29/66795 ,  H01L29/7841 ,  H01L29/7853

    摘要： An epitaxial semiconductor layer or a stack of a silicon germanium alloy layer and an epitaxial strained silicon layer is formed on outer sidewalls of a porous silicon portion on a substrate. The porous silicon portion and any silicon germanium alloy material are removed and a semitubular epitaxial semiconductor structure in a three-walled configuration is formed. A semitubular field effect transistor comprising inner and outer gate dielectric layers, an inner gate electrode, an outer gate electrode, and source and drain regions is formed on the semitubular epitaxial semiconductor structure. The semitubular field effect transistor may operate as an SOI transistor with a tighter channel control through the inner and outer gate electrodes, or as a memory device storing electrical charges in the body region within the semitubular epitaxial semiconductor structure.

    摘要翻译： 在衬底上的多孔硅部分的外侧壁上形成硅锗合金层和外延应变硅层的外延半导体层或叠层。 去除多孔硅部分和任何硅锗合金材料，并形成三壁结构的半管状外延半导体结构。 在半管外延半导体结构上形成包括内栅电介质层和外栅电介质层，内栅电极，外栅电极以及源极和漏极区的半管场效应晶体管。 半管场效应晶体管可以作为具有通过内部和外部栅极电极的更严格的沟道控制的SOI晶体管，或作为在半管外延半导体结构内的体区中存储电荷的存储器件。