-
公开(公告)号:US20200379908A1
公开(公告)日:2020-12-03
申请号:US16424421
申请日:2019-05-28
Applicant: Micron Technology, Inc.
Inventor: Kenneth Marion Curewitz , Ameen D. Akel , Samuel E. Bradshaw , Sean Stephen Eilert , Dmitri Yudanov
IPC: G06F12/0837 , G06F12/1027 , G06F12/1009 , G06F11/14 , G06F9/38
Abstract: Systems, methods and apparatuses to intelligently migrate content involving borrowed memory are described. For example, after the prediction of a time period during which a network connection between computing devices having borrowed memory degrades, the computing devices can make a migration decision for content of a virtual memory address region, based at least in part on a predicted usage of content, a scheduled operation, a predicted operation, a battery level, etc. The migration decision can be made based on a memory usage history, a battery usage history, a location history, etc. using an artificial neural network; and the content migration can be performed by remapping virtual memory regions in the memory maps of the computing devices.
-
公开(公告)号:US20240330667A1
公开(公告)日:2024-10-03
申请号:US18738644
申请日:2024-06-10
Applicant: Micron Technology, Inc.
Inventor: Dmitri Yudanov , Sean S. Eilert , Hernan A. Castro , William A. Melton
CPC classification number: G06N3/063 , G06F3/0604 , G06F3/0661 , G06F3/0673 , G06N3/04 , G11C7/06 , G11C8/08 , G11C11/54 , H03M1/46
Abstract: Methods, apparatuses, and systems for in- or near-memory processing are described. Bits of a first number may be stored on a number of memory elements, wherein each memory element of the number of memory elements intersects a digit line and an access line of a number of access lines. A number of signals corresponding to bits of a second number may be driven on the number of access lines to generate a number of output signals. A value equal to a product of the first number and the second number may be generated based on the number of output signals.
-
83.
公开(公告)号:US20240273349A1
公开(公告)日:2024-08-15
申请号:US18642669
申请日:2024-04-22
Applicant: Micron Technology, Inc.
Inventor: Dmitri Yudanov , Sean S. Eilert , Hernan A. Castro , Ameen D. Akel
Abstract: Spiking events in a spiking neural network may be processed via a memory system. A memory system may store data corresponding to a group of destination neurons. The memory system may, at each time interval of a SNN, pass through data corresponding to a group of pre-synaptic spike events from respective source neurons. The data corresponding to the group of pre-synaptic spike events may be subsequently stored in the memory system.
-
84.
公开(公告)号:US20240232601A1
公开(公告)日:2024-07-11
申请号:US18582467
申请日:2024-02-20
Applicant: Micron Technology, Inc.
Inventor: Dmitri Yudanov , Sean S. Eilert , Hernan A. Castro , Ameen D. Akel
CPC classification number: G06N3/063 , G06F12/0646 , G06N3/04 , G06F2212/1008
Abstract: Methods, apparatuses, and systems for in- or near-memory processing are described. Spiking events in a spiking neural network may be processed via a memory system. A memory system may store a group of destination neurons, and at each time interval in a series of time intervals of a spiking neural network (SNN), pass through a group of pre-synaptic spike events from respective source neurons, wherein the group of pre-synaptic spike events are subsequently stored in memory.
-
公开(公告)号:US20240220205A1
公开(公告)日:2024-07-04
申请号:US18607653
申请日:2024-03-18
Applicant: Micron Technology, Inc.
Inventor: Dmitri Yudanov
CPC classification number: G06F7/5443 , G06F3/0604 , G06F3/0659 , G06F3/0673 , G06F7/523 , G06N3/08
Abstract: The present disclosure is directed to systems and methods for a memory device such as, for example, a Processing-In-Memory Device that is configured to perform multiplication operations in memory using a popcount operation. A multiplication operation may include a summation of multipliers being multiplied with corresponding multiplicands. The inputs may be arranged in particular configurations within a memory array. Sense amplifiers may be used to perform the popcount by counting active bits along bit lines. One or more registers may accumulate results for performing the multiplication operations.
-
公开(公告)号:US11941455B2
公开(公告)日:2024-03-26
申请号:US16713996
申请日:2019-12-13
Applicant: Micron Technology, Inc.
Inventor: Dmitri Yudanov
CPC classification number: G06F9/5083 , G06N20/00 , H04W88/08
Abstract: Systems and methods for implementing shadow computations in base stations. The systems and methods can include a method including initiating, at a base station (such as a cellular base station), a shadow computation of a main computation executing for a mobile device. The main computation can include a computational task, and the shadow computation can be at least a part of or a derivative of the main computation. The method can also include executing, by the base station, the shadow computation.
-
公开(公告)号:US11862242B2
公开(公告)日:2024-01-02
申请号:US17690223
申请日:2022-03-09
Applicant: Micron Technology, Inc.
Inventor: Dmitri Yudanov
IPC: G11C16/00 , G11C13/00 , G06F16/2458 , G06N3/04
CPC classification number: G11C13/004 , G06F16/2468 , G11C13/0026 , G06N3/04
Abstract: Systems and methods for performing a pattern matching operation in a memory device are disclosed. The memory device may include a controller and memory arrays where the memory arrays store different patterns along bit lines. An input pattern is applied to the memory array(s) to determine whether the pattern is stored in the memory device. Word lines may be activated in series or in parallel to search for patterns within the memory array. The memory array may include memory cells that store binary digits, discrete values or analog values.
-
公开(公告)号:US11829729B2
公开(公告)日:2023-11-28
申请号:US16888345
申请日:2020-05-29
Applicant: Micron Technology, Inc.
Inventor: Sean S. Eilert , Shivasankar Gunasekaran , Ameen D. Akel , Dmitri Yudanov , Sivagnanam Parthasarathy
CPC classification number: G06F7/5443 , G06F17/16
Abstract: Systems, apparatuses, and methods of operating memory systems are described. Processing-in-memory capable memory devices are also described, and methods of performing fused-multiply-add operations within the same. Bit positions of bits stored at one or more portions of one or more memory arrays, may be accessed via data lines by activating the same or different access lines. A sensing circuit operatively coupled to a data line may be temporarily formed and measured to determine a state (e.g., a count of the number of bits that are a logic “1”) of accessed bit positions of a data line, and state information may be used to determine a computational result.
-
公开(公告)号:US20230229234A1
公开(公告)日:2023-07-20
申请号:US18190005
申请日:2023-03-24
Applicant: Micron Technology, Inc.
Inventor: Dmitri Yudanov , Samuel E. Bradshaw
IPC: G06F3/01 , G06F3/0487 , G02B27/01 , G06V40/19
CPC classification number: G06F3/013 , G06F3/0487 , G06F3/017 , G02B27/0101 , G06V40/19
Abstract: An apparatus having a computing device and a user interface—such as a user interface having a display that can provide a graphical user interface (GUI). The apparatus also includes a camera, and a processor in the computing device. The camera can be connected to the computing device and/or the user interface, and the camera can be configured to capture pupil location and/or eye movement of a user. The processor can be configured to: identify a visual focal point of the user relative to the user interface based on the captured pupil location, and/or identify a type of eye movement of the user (such as a saccade) based on the captured eye movement. The processor can also be configured to control parameters of the user interface based at least partially on the identified visual focal point and/or the identified type of eye movement.
-
公开(公告)号:US20230205575A1
公开(公告)日:2023-06-29
申请号:US18179228
申请日:2023-03-06
Applicant: Micron Technology, Inc.
Inventor: Dmitri Yudanov , Samuel E. Bradshaw
IPC: G06F9/48 , G11C11/409 , G06F11/30 , G06F9/38
CPC classification number: G06F9/485 , G06F9/3842 , G06F11/302 , G11C11/409
Abstract: A computing device (e.g., a mobile device) can execute a root process of an application to an initial point according to patterns of prior executions of the application. The root process can be one of many respective customized root processes of individual applications in the computing device. The device can receive a request to start the application from a user of the device. And, the device can start the application upon receiving the request to start the application and by using the root process of the application. At least one of the executing, receiving, or starting can be performed by an operating system in the device. The device can also fork the root process of the application into multiple processes, and can start upon receiving the request to start the application and by using at least one of the multiple processes according to the request to start the application.
-
-
-
-
-
-
-
-
-