公开(公告)号：US07929814B2

公开(公告)日：2011-04-19

申请号：US10830571

申请日：2004-04-23

申请人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

发明人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

IPC分类号： G02B6/10 ,  G02B6/12

CPC分类号： G02B6/136 ,  G02B6/12007 ,  G02B6/122 ,  G02B6/124 ,  G02B6/125 ,  G02B6/2813 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02B2006/12102 ,  G02B2006/12104 ,  G02B2006/12107 ,  G02B2006/12147 ,  G02B2006/12159 ,  G02B2006/12173

摘要： A set of planar, two-dimensional optical devices is able to be created in a sub-micron surface layer of an SOI structure, or within a sub-micron thick combination of an SOI surface layer and an overlying polysilicon layer. Conventional masking/etching techniques may be used to form a variety of passive and optical devices in this SOI platform. Various regions of the devices may be doped to form the active device structures. Additionally, the polysilicon layer may be separately patterned to provide a region of effective mode index change for a propagating optical signal.

摘要翻译： 能够在SOI结构的亚微米表面层中或在SOI表面层和上覆多晶硅层的亚微米厚度组合内产生一组平面二维光学器件。 传统的掩模/蚀刻技术可用于在该SOI平台中形成各种无源和光学器件。 可以掺杂器件的各个区域以形成有源器件结构。 另外，多晶硅层可以被分开构图以提供传播光信号的有效模式折射率变化的区域。

公开(公告)号：US07539358B2

公开(公告)日：2009-05-26

申请号：US11807959

申请日：2007-05-31

申请人： Robert Keith Montgomery ,  Vipulkumar Patel

发明人： Robert Keith Montgomery ,  Vipulkumar Patel

IPC分类号： G02F1/35

CPC分类号： G02F1/025 ,  G02F1/2257

摘要： The surface silicon layer (SOI layer) of an SOI-based optical modulator is processed to exhibit a corrugated surface along the direction of optical signal propagation. The required dielectric layer (i.e., relatively thin “gate oxide”) is formed over the corrugated structure in a manner that preserves the corrugated topology. A second silicon layer, required to form the modulator structure, is then formed over the gate oxide in a manner that follows the corrugated topology, where the overlapping portion of the corrugated SOI layer, gate oxide and second silicon layer defines the active region of the modulator. The utilization of the corrugated active region increases the area over which optical field intensity will overlap with the free carrier modulation region, improving the modulator's efficiency.

摘要翻译： 处理基于SOI的光调制器的表面硅层（SOI层）沿着光信号传播的方向呈现波纹状表面。 所需的电介质层（即相对较薄的“栅极氧化物”）以保持波纹拓扑的方式形成在波纹状结构上。 形成调制器结构所需的第二硅层然后以跟随波纹拓扑的方式形成在栅极氧化物上，其中波纹SOI层，栅极氧化物和第二硅层的重叠部分限定了 调制器。 波纹有源区域的利用增加了光场强度将与自由载波调制区域重叠的面积，从而提高了调制器的效率。

公开(公告)号：US20080105940A1

公开(公告)日：2008-05-08

申请号：US11811799

申请日：2007-06-12

申请人： David Piede ,  Vipulkumar Patel ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery

发明人： David Piede ,  Vipulkumar Patel ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery

IPC分类号： H01L31/0232

CPC分类号： H01L31/03529 ,  H01L31/103 ,  Y02E10/50

摘要： A photodetector integrated within a silicon-on-insulator (SOI) structure is formed directly upon an inverse nanotaper endface coupling region to reduce polarization sensitivity at the detector's input. The photodetector may be germanium-based PN (PIN) junction photodetector, a SiGe photodetector, a metal/silicon Schottky barrier photodetector, or any other suitable silicon-based photodetector. The inverse nanotaper photodetector may also be formed as an in-line monitoring device, converting only a portion of the in-coupled optical signal and allowing for the remainder to thereafter propagate along an associated optical waveguide.

摘要翻译： 集成在绝缘体上硅（SOI）结构中的光电检测器直接形成在反向纳米锥端面耦合区域上，以降低检测器输入处的偏振灵敏度。 光电检测器可以是基于锗的PN（PIN）结光电检测器，SiGe光电检测器，金属/硅肖特基势垒光电检测器或任何其它合适的硅基光电检测器。 反向纳米管光电检测器也可以形成为在线监测装置，仅转换一部分耦合内的光信号，并允许剩余部分随后沿相关联的光波导传播。

公开(公告)号：US07358585B2

公开(公告)日：2008-04-15

申请号：US10990725

申请日：2004-11-17

申请人： Vipulkumar Patel ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Soham Pathak ,  David Piede ,  Kalpendu Shastri ,  Katherine A. Yanushefski

发明人： Vipulkumar Patel ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Soham Pathak ,  David Piede ,  Kalpendu Shastri ,  Katherine A. Yanushefski

IPC分类号： G02B6/10 ,  H01L31/0224

CPC分类号： H01L31/108 ,  G02B6/12004 ,  G02B6/1228 ,  H01L31/022408 ,  H01L31/0232 ,  H01L31/03921 ,  H01L31/153 ,  Y02E10/50

摘要： A silicon-based IR photodetector is formed within a silicon-on-insulator (SOI) structure by placing a metallic strip (preferably, a silicide) over a portion of an optical waveguide formed within a planar silicon surface layer (i.e., “planar SOI layer”) of the SOI structure, the planar SOI layer comprising a thickness of less than one micron. Room temperature operation of the photodetector is accomplished as a result of the relatively low dark current associated with the SOI-based structure and the ability to use a relatively small surface area silicide strip to collect the photocurrent. The planar SOI layer may be doped, and the geometry of the silicide strip may be modified, as desired, to achieve improved results over prior art silicon-based photodetectors.

摘要翻译： 通过将金属条（优选硅化物）放置在形成在平面硅表面层内的光波导的一部分（即，“平面SOI”）上，在绝缘体上硅（SOI）结构中形成硅基红外光电检测器 层“），平面SOI层包括小于1微米的厚度。 由于与基于SOI的结构相关联的相对较低的暗电流和使用相对小的表面积硅化物带收集光电流的能力，光电检测器的室温操作是完成的。 可以掺杂平面SOI层，并且根据需要可以修改硅化物带的几何形状，以实现相对于现有技术的硅基光电探测器的改进的结果。

公开(公告)号：US20070292075A1

公开(公告)日：2007-12-20

申请号：US11810591

申请日：2007-06-06

申请人： Robert Keith Montgomery ,  Margaret Ghiron ,  Prakash Gothoskar ,  Paulius Mindaugas Mosinskis ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Mark Webster

发明人： Robert Keith Montgomery ,  Margaret Ghiron ,  Prakash Gothoskar ,  Paulius Mindaugas Mosinskis ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Mark Webster

IPC分类号： G02B6/12

CPC分类号： G02F1/025 ,  G02F1/0147 ,  G02F1/225 ,  G02F2201/126

摘要： A silicon-based optical modulator structure includes one or more separate localized heating elements for changing the refractive index of an associated portion of the structure and thereby providing corrective adjustments to address unwanted variations in device performance. Heating is provided by thermo-optic devices such as, for example, silicon-based resistors, silicide resistors, forward-biased PN junctions, and the like, where any of these structures may easily be incorporated with a silicon-based optical modulator. The application of a DC voltage to any of these structures will generate heat, which then transfers into the waveguiding area. The increase in local temperature of the waveguiding area will, in turn, increase the refractive index of the waveguiding in the area. Control of the applied DC voltage results in controlling the refractive index

摘要翻译： 基于硅的光学调制器结构包括一个或多个单独的局部加热元件，用于改变结构的相关部分的折射率，从而提供校正调整以解决器件性能的不期望的变化。 加热由诸如硅基电阻器，硅化物电阻器，正向偏置PN结等的热光器件提供，其中这些结构中的任何一种可以容易地与硅基光学调制器结合。 对这些结构中的任何一个施加直流电压将产生热量，然后传递到波导区域。 波导区域的局部温度的增加又将增加该区域中波导的折射率。 施加的直流电压的控制导致控制折射率

公开(公告)号：US07113676B2

公开(公告)日：2006-09-26

申请号：US11005286

申请日：2004-12-06

申请人： David Piede ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski ,  Harvey Wagner

发明人： David Piede ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski ,  Harvey Wagner

IPC分类号： G02B6/26 ,  G02B6/42

CPC分类号： G02B6/1228 ,  G02B6/125 ,  G02B6/4207

摘要： A planar optical isolator is formed within the silicon surface layer of an SOI structure. A forward-directed signal is applied to an input waveguiding section of the isolator and thereafter propagates through a non-reciprocal waveguide coupling region into an output waveguide section. A rearward-directed signal enters via the output waveguide section and is thereafter coupled into the non-reciprocal waveguide structure, where the geometry of the structure functions to couple only a small amount of the reflected signal into the input waveguide section. In one embodiment, the non-reciprocal structure comprises an N-way directional coupler (with one output waveguide, one input waveguide and N−1 isolating waveguides). In another embodiment, the non-reciprocal structure comprises a waveguide expansion region including a tapered, mode-matching portion coupled to the output waveguide and an enlarged, non-mode matching portion coupled to the input waveguide such that a majority of a reflected signal will be mismatched with respect to the input waveguide section. By cascading a number of such planar SOI-based structures, increased isolation can be achieved—advantageously within a monolithic arrangement.

摘要翻译： 在SOI结构的硅表面层内形成平面光隔离器。 正向信号被施加到隔离器的输入波导部分，然后通过非互易波导耦合区域传播到输出波导部分中。 后向信号经由输出波导部分进入，然后耦合到不可逆波导结构中，其中结构的几何结构仅将少量的反射信号耦合到输入波导部分中。 在一个实施例中，非互易结构包括N路定向耦合器（具有一个输出波导，一个输入波导和N-1个隔离波导）。 在另一个实施例中，不可逆结构包括波导扩展区域，其包括耦合到输出波导的锥形模式匹配部分和耦合到输入波导的放大的非模式匹配部分，使得反射信号的大部分将 相对于输入波导部分不匹配。 通过级联多个这种平面的基于SOI的结构，可以实现增加的隔离 - 有利地在单片布置中。

公开(公告)号：US07109739B2

公开(公告)日：2006-09-19

申请号：US11075430

申请日：2005-03-08

申请人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Soham Pathak ,  David Piede ,  Katherine A. Yanushefski

发明人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Soham Pathak ,  David Piede ,  Katherine A. Yanushefski

IPC分类号： G01R31/26 ,  G01R31/00

CPC分类号： G02B6/30 ,  G02B6/34 ,  G02B2006/12107

摘要： A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto-electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.

摘要翻译： 用于在绝缘体上硅（SOI）晶片结构中形成的光电器件的晶片级测试装置利用单个光电测试元件执行光学和电学测试。 光束转向光学元件可以形成在测试元件上，并且用于促进光学探针信号与形成在SOI结构的顶表面上的光耦合元件（例如，棱镜耦合器，光栅）之间的耦合。 此后，光学测试信号被引导到形成在SOI结构的顶层中的光波导中。 光电测试元件还包括多个电测试引脚，其被定位成接触光电器件上的多个接合焊盘测试点并执行电测试操作。 光学测试信号结果可以转换为SOI结构内的电气表示，并因此作为电信号返回到测试元件。

公开(公告)号：US07058261B2

公开(公告)日：2006-06-06

申请号：US10935146

申请日：2004-09-07

申请人： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine A. Yanushefski

发明人： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine A. Yanushefski

IPC分类号： G02B6/34

CPC分类号： G02B6/12007 ,  G02B6/124 ,  G02B6/34

摘要： An arrangement for achieving and maintaining high efficiency coupling of light between a multi-wavelength optical signal and a relatively thin (e.g., sub-micron) silicon optical waveguide uses a prism coupler in association with an evanescent coupling layer. A grating structure having a period less than the wavelengths of transmission is formed in the coupling region (either formed in the silicon waveguide, evanescent coupling layer, prism coupler, or any combination thereof) so as to increase the effective refractive index “seen” by the multi-wavelength optical signal in the area where the beam exiting/entering the prism coupler intercepts the waveguide surface (referred to as the “prism coupling surface”). The period and/or duty cycle of the grating can be controlled to modify the effective refractive index profile in the direction away from the coupling region so as to reduce the effective refractive index from the relatively high value useful in multi-wavelength coupling to the lower value associated with maintaining confinement of the optical signals within the surface waveguide structure, thus reducing reflections along the transition region.

摘要翻译： 用于实现和维持多波长光信号和较薄（例如亚微米）硅光波导之间的高效率耦合的布置使用与渐逝耦合层相关联的棱镜耦合器。 在耦合区域（形成在硅波导，ev逝耦合层，棱镜耦合器或其任何组合中）形成具有小于透射波长的周期的光栅结构，以便通过“看到”来提高有效折射率 离开/进入棱镜耦合器的光束截取波导表面（称为“棱镜耦合表面”）的区域中的多波长光信号。 可以控制光栅的周期和/或占空比以在远离耦合区域的方向上改变有效折射率分布，以便将有效折射率从在多波长耦合中的有用折射率降低到较低的值 与保持表面波导结构内的光信号的限制相关联的值，从而减少沿着过渡区域的反射。

公开(公告)号：US20060074111A1

公开(公告)日：2006-04-06

申请号：US10518778

申请日：2003-06-18

申请人： Paul Beswick ,  John Harling ,  Savvas Kleanthous ,  Millard Lambert ,  Vipulkumar Patel ,  Juliet Simpson

发明人： Paul Beswick ,  John Harling ,  Savvas Kleanthous ,  Millard Lambert ,  Vipulkumar Patel ,  Juliet Simpson

IPC分类号： C07D213/55 ,  A61K31/44 ,  A61K31/195

CPC分类号： C07D213/74 ,  C07C217/58 ,  C07C217/80 ,  C07C233/18 ,  C07C255/58 ,  C07C311/08 ,  C07C311/29 ,  C07C323/25 ,  C07C2601/02 ,  C07D239/42 ,  C07D241/20

摘要： A compound of formula (I) or a pharmaceutically acceptable salt, solvate, or hydrolysable ester thereof, Wherein: R1 and R2 are independently hydrogen or C1-3 alkyl; X represents a bond, CH2 or O; R3 and R4 are independently hydrogen, C1-6 alkyl, OCH3, CF3, allyl or halogen; X1 is CH2, SO2, or CO; R5 is —C1-6 alkyl (optionally substituted by C1-6alkoxy or C1-6alkylthio), —C2-6 alkenyl, —C0-6 alkyl phenyl (wherein the phenyl is optionally substituted by one or more CF3, halogen, C1-3 alkyl, C1-3 alkoxy), —COC1-6 alkyl, SO2C1-6 alkyl; R6 is phenyl or a 6 membered heteroaryl group containing 1, 2 or 3 N atoms wherein the phenyl or heteroaryl group is optionally substituted with 1, 2 or 3 moieties selected from the group consisting of C1-6 alkyl, halogen, —OC1-6 alkyl, —SO2C1-3 alkyl, phenyl (optionally substituted by one or more groups selected from halogen, CF3, C1-3 alkyl, OC1-3 alkyl, acetyl, CN).

摘要翻译： 式（I）化合物或其药学上可接受的盐，溶剂化物或可水解的酯，其中R 1和R 2独立地是氢或C 1 -3 烷基; X表示键，CH 2或O; R 3和R 4独立地是氢，C 1-6烷基，OCH 3，CF 3， 3，烯丙基或卤素; X 1是CH 2，SO 2，或CO; R 5是-C 1-6 - 烷基（任选被C 1-6烷氧基或C 1-6 - 烷基取代） 烷硫基），-C 2-6亚烯基，-C 0-6烷基苯基（其中苯基任选被一个或多个CF 3取代） 卤素，C 1-3烷基，C 1-3烷氧基），-COC 1-6烷基，SO 3 - 2个C 1-6烷基; R 6是苯基或含有1,2或3个N原子的6元杂芳基，其中苯基或杂芳基任选被1,2或3个选自C

公开(公告)号：US06968110B2

公开(公告)日：2005-11-22

申请号：US10828898

申请日：2004-04-21

申请人： Vipulkumar Patel ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

发明人： Vipulkumar Patel ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

IPC分类号： G02B6/12 ,  G02F1/025 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/13 ,  H01L27/146 ,  H01L31/12 ,  G02B6/10

CPC分类号： H01L27/14689 ,  G02B6/12004 ,  G02F1/025 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/13 ,  H01L27/14636 ,  H01L27/14643 ,  H01L31/12

摘要： A conventional CMOS fabrication technique is used to integrate the formation of passive optical devices and active electro-optic devices with standard CMOS electrical devices on a common SOI structure. The electrical devices and optical devices share the same surface SOI layer (a relatively thin, single crystal silicon layer), with various required semiconductor layers then formed over the SOI layer. In some instances, a set of process steps may be used to simultaneously form regions in both electrical and optical devices. Advantageously, the same metallization process is used to provide electrical connections to the electrical devices and the active electro-optic devices.

摘要翻译： 传统的CMOS制造技术被用于将无源光学器件和有源电光器件与标准CMOS电气器件的形成集成在公共SOI结构上。 电子器件和光学器件共享相同的表面SOI层（相对薄的单晶硅层），然后在SOI层上形成各种所需的半导体层。 在一些情况下，可以使用一组处理步骤来同时形成电和光学装置中的区域。 有利地，使用相同的金属化工艺来提供到电气装置和主动电光装置的电连接。