公开(公告)号：US09548361B1

公开(公告)日：2017-01-17

申请号：US14755663

申请日：2015-06-30

Applicant: STMicroelectronics, Inc.

Inventor： Nicolas Loubet ,  Pierre Morin

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L29/06 ,  H01L29/161

CPC classification number: H01L29/785 ,  H01L27/0886 ,  H01L29/0623 ,  H01L29/0649 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/41791 ,  H01L29/495 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7849 ,  H01L2029/7858

Abstract: A self-aligned SiGe FinFET device features a relaxed channel region having a high germanium concentration. Instead of first introducing germanium into the channel and then attempting to relax the resulting strained film, a relaxed channel is formed initially to accept the germanium. In this way, a presence of germanium can be established without straining or damaging the lattice. Gate structures are patterned relative to intrinsic silicon fins, to ensure that the gates are properly aligned, prior to introducing germanium into the fin lattice structure. After aligning the gate structures, the silicon fins are segmented to elastically relax the silicon lattice. Then, germanium is introduced into the relaxed silicon lattice, to produce a SiGe channel that is substantially stress-free and also defect-free. Using the method described, concentration of germanium achieved in a structurally stable film can be increased to a level greater than 85%.

Abstract translation: 自对准SiGe FinFET器件具有具有高锗浓度的松弛沟道区。 不是首先将锗引入通道，然后尝试松弛所得到的应变膜，最初形成松弛的通道以接受锗。 以这种方式，可以建立锗的存在而不会使晶格变形或损坏。 在将锗引入鳍状晶格结构之前，门结构相对于本征硅散热片图案化，以确保栅极正确对准。 在对齐栅极结构之后，将硅片段分段以弹性地松弛硅晶格。 然后，将锗引入松弛的硅晶格中，以产生基本上无应力且也无缺陷的SiGe沟道。 使用所述方法，在结构稳定的膜中实现的锗的浓度可以增加到大于85％的水平。

公开(公告)号：US09431538B2

公开(公告)日：2016-08-30

申请号：US14950833

申请日：2015-11-24

Applicant: Commissariat a l'energie atomique et aux energies alternatives ,  STMICROELECTRONICS, Inc.

Inventor： Shay Reboh ,  Pierre Morin

IPC: H01L21/336 ,  H01L29/78 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66 ,  H01L29/06

CPC classification number: H01L29/7848 ,  H01L29/0649 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66636

Abstract: Method of making at least one transistor strained channel semiconducting structure, comprising steps to form a sacrificial gate block and insulating spacers arranged in contact with the lateral faces of the sacrificial gate block, form sacrificial regions in contact with the lateral faces of said semiconducting zone, said sacrificial regions being configured so as to apply a strain on said semiconducting zone, remove said sacrificial gate block between said insulating spacers, replace said sacrificial gate block by a replacement gate block between said insulating spacers, remove said sacrificial regions, and replace said sacrificial regions by replacement regions in contact with the lateral faces of said semiconducting zone, on a semiconducting zone that will form a transistor channel region.

Abstract translation: 制造至少一个晶体管应变通道半导体结构的方法，包括形成牺牲栅极块的步骤和与牺牲栅极块的侧面接触地布置的绝缘间隔物，形成与所述半导体区域的侧面接触的牺牲区域， 所述牺牲区域被配置为在所述半导体区域上施加应变，去除所述绝缘间隔物之间​​的所述牺牲栅极块，用所述绝缘间隔物之间​​的置换栅极块代替所述牺牲栅极块，去除所述牺牲区域， 区域，其与形成晶体管沟道区域的半导体区域相接触，与所述半导体区域的侧面接触。

公开(公告)号：US20160035820A1

公开(公告)日：2016-02-04

申请号：US14447678

申请日：2014-07-31

Applicant: STMicroelectronics, Inc. ,  Commissariat a l'Energie Atomique et aux Energies Alternatives ,  GLOBALFOUNDRIES Inc.

Inventor： Pierre Morin ,  Maud Vinet ,  Laurent Grenouillet ,  Ajey Poovannummoottil Jacob

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/0607 ,  H01L21/02636 ,  H01L21/283 ,  H01L21/3086 ,  H01L21/32 ,  H01L21/762 ,  H01L21/76264 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/84 ,  H01L21/845 ,  H01L27/1203 ,  H01L27/1211 ,  H01L29/0653 ,  H01L29/0665 ,  H01L29/1066 ,  H01L29/66477 ,  H01L29/66795 ,  H01L29/78 ,  H01L29/7847 ,  H01L29/7849

Abstract: Methods and structures for forming uniaxially-strained, nanoscale, semiconductor bars from a biaxially-strained semiconductor layer are described. A spatially-doubled mandrel process may be used to form a mask for patterning dense, narrow trenches through the biaxially-strained semiconductor layer. The resulting slicing of the biaxially-strained layer enhances carrier mobility and can increase device performance.

公开(公告)号：US20150325686A1

公开(公告)日：2015-11-12

申请号：US14272660

申请日：2014-05-08

Applicant: SOITEC ,  STMICROELECTRONICS, INC.

Inventor： Frédéric Allibert ,  Pierre Morin

IPC: H01L29/66 ,  H01L29/205 ,  H01L21/8238 ,  H01L21/02

CPC classification number: H01L29/66795 ,  H01L21/02532 ,  H01L21/02614 ,  H01L21/02694 ,  H01L21/823821 ,  H01L21/845 ,  H01L29/205

Abstract: Methods of fabricating semiconductor structures involve the formation of fins for finFET transistors having different stress/strain states. Fins of one stress/strain state may be employed to form n-type finFETS, while fins of another stress/strain state may be employed to form p-type finFETs. The fins having different stress/strain states may be fabricated from a common layer of semiconductor material. Semiconductor structures and devices are fabricated using such methods.

Abstract translation: 制造半导体结构的方法涉及形成具有不同应力/应变状态的finFET晶体管的翅片。 可以使用一个应力/应变状态的芯来形成n型finFET，而可以采用另一个应力/应变状态的翅片来形成p型finFET。 具有不同应力/应变状态的翅片可以由公共半导体材料层制造。 使用这种方法制造半导体结构和器件。

公开(公告)号：US20150249153A1

公开(公告)日：2015-09-03

申请号：US14194215

申请日：2014-02-28

Applicant: STMicroelectronics, Inc.

Inventor： Pierre Morin ,  Nicolas Loubet

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L27/10879 ,  H01L21/2251 ,  H01L29/0649 ,  H01L29/1054 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/4236 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/7825 ,  H01L29/7838 ,  H01L29/7849 ,  H01L29/785 ,  H01L29/7855 ,  H01L29/78603 ,  H01L29/78654

Abstract: Methods and structures for forming a localized, strained region of a substrate are described. Trenches may be formed at boundaries of a localized region of a substrate. An upper portion of sidewalls at the localized region may be covered with a covering layer, and a lower portion of the sidewalls at the localized region may not be covered. A converting material may be formed in contact with the lower portion of the localized region, and the substrate heated. The heating may introduce a chemical species from the converting material into the lower portion, which creates stress in the localized region. The methods may be used to form strained-channel finFETs.

Abstract translation: 描述了形成基底的局部应变区域的方法和结构。 可以在衬底的局部区域的边界处形成沟槽。 局部区域的侧壁的上部可以被覆盖层覆盖，并且局部区域的侧壁的下部可能不被覆盖。 可以将转换材料形成为与局部区域的下部接触，并且加热衬底。 加热可以将化学物质从转化材料引入下部，这在局部区域中产生应力。 这些方法可以用于形成应变通道的finFET。

公开(公告)号：US08952420B1

公开(公告)日：2015-02-10

申请号：US13953551

申请日：2013-07-29

Applicant: STMicroelectronics, Inc.

Inventor： Nicolas Loubet ,  Pierre Morin

IPC: H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/7848 ,  H01L29/1054 ,  H01L29/155 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

Abstract: Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed in two epitaxial layers that are grown over a bulk substrate. A first thin epitaxial layer may be cut and used to impart strain to an adjacent channel region of the finFET via elastic relaxation. The structures exhibit a preferred design range for increasing induced strain and uniformity of the strain over the fin height.

Abstract translation: 描述形成应变通道鳍状FET的方法和结构。 用于finFET的鳍结构可以形成在生长在块状衬底上的两个外延层中。 可以将第一薄外延层切割并用于通过弹性弛豫向finFET的相邻沟道区施加应变。 该结构表现出优选的设计范围，用于增加应变在翅片高度上的诱导应变和均匀性。